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calculation time for a memory operand , to transfer the second byte of the operand word), after which the CPU would begin executing the next instruction of the program. Thus, a system with an 8087 was capable of true parallel processing, performing one operation in the integer ALU of the main CPU while at the same time performing a floating-point operation in the 8087 coprocessor. Since the 8086 or 8088 exclusively controlled the instruction flow and timing and had no direct access to the internal status of the 8087, and because the 8087 could execute only one instruction at a time, programs for the combined 8086/8087 or 8088/8087 system had to ensure that the 8087 had time to complete the last instruction issued to it before it was issued another one. The WAIT instruction (of the main CPU) was provided for this purpose, and most assemblers implicitly asserted a WAIT instruction before each instance of most floating-point coprocessor instructions. (It is not necessary to use a WAIT instruction before an 8087 operation if the program uses other means to ensure that enough time elapses between the issuance of timing-sensitive 8087 instructions so that the 8087 can never receive such an instruction before it completes the previous one. It is also not necessary, if a WAIT is used, that it immediately precede the next 8087 instruction.) The WAIT instruction waited for the −TEST input pin of the 8086/8088 to be asserted (low), and this pin was connected to the BUSY pin of the 8087 in all systems that had an 8087 (so TEST was asserted when BUSY was deasserted).
518:
into any CPU register or perform any operation on it; the 8087 would observe the bus and decode the instruction stream in sync with the 8086, recognizing the coprocessor instructions meant for itself. For an 8087 instruction with a memory operand, if the instruction called for the operand to be read, the 8087 would take the word of data read by the main CPU from the data bus. If the operand to be read was longer than one word, the 8087 would also copy the address from the address bus; then, after completion of the data read cycle driven by the CPU, the 8087 would immediately use DMA to take control of the bus and transfer the additional bytes of the operand itself. If an 8087 instruction with a memory operand called for that operand to be written, the 8087 would ignore the read word on the data bus and just copy the address, then request DMA and write the entire operand, in the same way that it would read the end of an extended operand. In this way, the main CPU maintained general control of the bus and bus timing, while the 8087 handled all other aspects of execution of coprocessor instructions, except for brief DMA periods when the 8087 would take over the bus to read or write operands to/from its own internal registers. As a consequence of this design, the 8087 could only operate on operands taken either from memory or from its own registers, and any exchange of data between the 8087 and the 8086 or 8088 was only through RAM.
526:
bus. The 8086 and 8088 have two queue status signals connected to the coprocessor to allow it to synchronize with the CPU's internal timing of execution of instructions from its prefetch queue. The 8087 maintains its own identical prefetch queue, from which it reads the coprocessor opcodes that it actually executes. Because the 8086 and 8088 prefetch queues have different sizes and different management algorithms, the 8087 determines which type of CPU it is attached to by observing a certain CPU bus line when the system is reset, and the 8087 adjusts its internal instruction queue accordingly. The redundant duplication of prefetch queue hardware in the CPU and the coprocessor is inefficient in terms of power usage and total die area, but it allowed the coprocessor interface to use very few dedicated IC pins, which was important. At the time when the 8086, which defined the coprocessor interface, was introduced, IC packages with more than 40 pins were rare, expensive, and suffered from problems such as excessive lead capacitance, a major limiting factor for signalling speeds.
863:" section). There was a potential crash problem if the coprocessor instruction failed to decode to one that the coprocessor understood. Intel's later coprocessors did not connect to the buses in the same way, but received instructions through the main processor I/O ports. This yielded an execution time penalty, but the potential crash problem was avoided because the main processor would ignore the instruction if the coprocessor refused to accept it. The 8087 was able to detect whether it was connected to an 8088 or an 8086 by monitoring the data bus during the reset cycle.
549:
303:
27:
482:
real number, with a stack architecture CPU and eight 80-bit stack registers, with a computationally rich instruction set. The design solved a few outstanding known problems in numerical computing and numerical software: rounding-error problems were eliminated for 64-bit operands, and numerical mode conversions were solved for all 64-bit numbers. Palmer credited
838:(selected by the status register). With affine closure, positive and negative infinities are treated as different values. With projective closure, infinity is treated as an unsigned representation for very small or very large numbers. These two methods of handling infinity were incorporated into the draft version of the
854:
The 8087 differed from subsequent Intel coprocessors in that it was directly connected to the address and data buses. The 8087 looked for instructions that commenced with the "11011" sequence and acted on them, immediately requesting DMA from the main CPU as necessary to access memory operands longer
539:
Application programs had to be written to make use of the special floating-point instructions. At run time, software could detect the coprocessor and use it for floating-point operations. When detected absent, similar floating-point functions had to be calculated in software, or the whole coprocessor
481:
In 1977 Pohlman got the go ahead to design the 8087 math chip. Bruce
Ravenel was assigned as architect, and John Palmer was hired to be co-architect and mathematician for the project. The two came up with a revolutionary design with 64 bits of mantissa and 16 bits of exponent for the longest-format
517:
When the 8086 or 8088 CPU executed the ESC instruction, if the second byte (the ModR/M byte) specified a memory operand, the CPU would execute a bus cycle to read one word from the memory location specified in the instruction (using any 8086 addressing mode), but it would not store the read operand
525:
Because the instruction prefetch queues of the 8086 and 8088 make the time when an instruction is executed not always the same as the time it is fetched, a coprocessor such as the 8087 cannot determine when an instruction for itself is the next instruction to be executed purely by watching the CPU
489:
The 8087 design initially met a cool reception in Santa Clara due to its aggressive design. Eventually, the design was assigned to Intel Israel, and Rafi Nave was assigned to lead the implementation of the chip. Palmer, Ravenel and Nave were awarded patents for the design. Robert
Koehler and John
866:
The 8087 was, in theory, capable of working concurrently while the 8086/8 processes additional instructions. In practice, there was the potential for program failure if the coprocessor issued a new instruction before the last one had completed. The assembler would automatically insert an FWAIT
521:
The main CPU program continued to execute while the 8087 executed an instruction; from the perspective of the main 8086 or 8088 CPU, a coprocessor instruction took only as long as the processing of the opcode and any memory operand cycle (2 clock cycles for no operand, 8 clock cycles plus the EA
313:
The 8087 was an advanced integrated circuit, pushing the limits of manufacturing technology of the period. Basic operations on the 8087 such as addition and subtraction can take over 100 machine cycles to execute and some instructions exceed 1000 cycles. The chip lacks a hardware multiplier and
514:." The instruction mnemonic assigned by Intel for these coprocessor instructions is "ESC." The 8087 was expensive and difficult to manufacture with low yields. It also ran quite hot, forcing Intel to use a more expensive ceramic package for improved thermal dissipation.
891:. Starting with the 80486, the later Intel processors did not use a separate floating-point coprocessor; virtually all included it on the main processor die, with the significant exception of the 80486SX, which was a modified 80486DX with the FPU disabled.
535:
The first three "x" bits are the first three bits of the floating-point opcode. Then two "m" bits, then the latter half three bits of the floating-point opcode, followed by three "r" bits. The "m" and "r" bits specify the addressing-mode information.
1256:
1150:
The ROM contains 16 arctangent values, the arctans of 2. It also contains 14 log values, the base-2 logs of (1+2). These may seem like unusual values, but they are used in an efficient algorithm called CORDIC, which was invented in
1237:
357:
processors featured integrated floating-point coprocessors; floating-point functions were integrated with the processor. Intel 486SX processors have a disabled or absent floating-point unit but allow for a separate 80487.
477:
The 8087 was initially conceived by Bill
Pohlman, the engineering manager at Intel who oversaw the development of the 8086 chip. Bill took steps to be sure that the 8086 chip could support a yet-to-be-developed math chip.
846:) was dropped from the later formal issue of IEEE 754-1985. The 80287 retained projective closure as an option, but the 80387 and subsequent floating-point processors (including the 80187) only supported affine closure.
564:
structure ranging from st0 to st7, where st0 is the top. The x87 instructions operate by pushing, calculating, and popping values on this stack. However, dyadic operations such as FADD, FMUL, FCMP, and so on may either
505:
begin with F, such as FADD, FMUL, FCOM and so on, making them easily distinguishable from 8086 instructions. The binary encodings for all 8087 instructions begin with the bit pattern 11011, decimal 27, the same as the
601:
When Intel designed the 8087, it aimed to make a standard floating-point format for future designs. An important aspect of the 8087 from a historical perspective was that it became the basis for the
1196:
Intel
Corporation, "Price List for Intel Personal Computer Enhancement Products Effective November 1, 1989", Personal Computer Enhancement Operation, Order No. 245.2, 10-89/75K/AL/GO, October 1989
621:
internal temporary format (that could also be stored in memory) to improve accuracy over large and complex calculations. Apart from this, the 8087 offered an 80-bit/18-digit packed BCD (
867:
instruction after every coprocessor opcode, forcing the 8086/8 to halt execution until the 8087 signalled that it had finished. This limitation was removed from later designs.
859:
hold up execution of the program until the coprocessor instruction was complete, and the program had to explicitly synchronize the two processors, as explained above (in the "
295:
calculations. The performance enhancements were from approximately 20% to over 500%, depending on the specific application. The 8087 could perform about 50,000
1409:
1059:
605:
floating-point standard. The 8087 did not implement the eventual IEEE 754 standard in all its details, as the standard was not finished until 1985, but the
1162:
Yoshida, Stacy, "Math
Coprocessors: Keeping Your Computer Up for the Count", Intel Corporation, Microcomputer Solutions, September/October 1990, page 16
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577:(i.e. as a combined destination and left operand) and can also be exchanged with any of the eight stack registers using an instruction called FXCH st
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Bayliss were also awarded a patent for the technique where some instructions with a particular bit pattern were offloaded to the coprocessor.
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Just as the 8088 and 8086 processors were superseded by later parts, so was the 8087 superseded. Other Intel coprocessors were the
843:
498:
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585:). This makes the x87 stack usable as seven freely addressable registers plus an accumulator. This is especially applicable on
1388:
1281:
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character ESC, although in the higher-order bits of a byte; similar instruction prefixes are also sometimes referred to as "
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1579:
1503:
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or similar processors and used an 8-bit data bus. They were interfaced to a host system either through programmed I/O or a
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2611:
1518:
1513:
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1306:
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The 8087 had 65,000 transistors and was manufactured as a 4.5 μm (then shrunk to 3 μm) depletion-load
329:
standard for floating-point arithmetic. The available speed version were 4.77 (5), 8, and 10 MHz. There were later
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and its associated products were discontinued on March 30, 2007 for orders and
September 28, 2007 for shipments.
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than one word (16 bits), then immediately releasing bus control back to the main CPU. The coprocessor
155:
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set such as the main registers of the x86 processors; instead, the x87 registers form an eight-level deep
529:
The coprocessor operation codes are encoded in 6 bits across 2 bytes, beginning with the escape sequence:
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1232:
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1436:
256:
2321:
1473:
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307:
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of 1993 and later), where these exchange instructions are optimized down to a zero-clock penalty.
321:
Sales of the 8087 received a significant boost when a coprocessor socket was included on the 1981
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2585:
2560:
2154:
574:
280:
127:
1179:
931:
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1414:
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106:
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204:
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8:
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2013:
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1965:
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1038:
835:
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181:
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222:
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1326:
532:┌───────────┬───────────┐ │ 1101 1xxx │ mmxx xrrr │ └───────────┴───────────┘
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2132:
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circuit. It worked in tandem with the 8086 or 8088 and introduced about 60 new
268:
245:
2304:
2172:
2605:
2095:
2085:
2044:
1781:
907:, and later processors include floating-point functionality on the CPU core.
900:
602:
483:
326:
292:
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1042:
1035:
AFIPS '80, Proceedings of the, May 19–22, 1980, National
Computer Conference
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486:'s writings on floating point as a significant influence on their design.
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1998:
1992:
1986:
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chip with an extra pin. When installed, it disabled the 80486SX CPU. The
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586:
361:
350:
338:
334:
276:
264:
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164:
1410:
Coprocessor.info: 8087 math coprocessor history information and pictures
1273:
Assembly
Language and Systems Programming for the IBM PC and Compatibles
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could be emulated in software for more precise numerical compatibility.
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1980:
1974:
1949:
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130:
168:
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memory operand or register; the st0 register may thus be used as an
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2127:
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502:
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line of microprocessors. The purpose of the chip was to speed up
880:
2503:
2269:
2122:
2107:
1816:
1648:
1134:"Extracting ROM constants from the 8087 math coprocessor's die"
892:
888:
884:
876:
322:
315:
1422:"Die analysis of the 8087 math coprocessor's fast bit shifter"
1254:, "Duplex central processing unit synchronization circuit"
26:
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1603:
606:
507:
296:
232:
111:
78:
1344:
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use the topmost st0 and st1 or may use st0 together with an
2415:
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2102:
2080:
1876:
1213:
494:
342:
2009:
1961:
1748:
1210:, Intel catalog no. C-864/280/150K/CP, pages 8-21, 8-28.
354:
330:
160:
82:
1235:, "Fraction bus for use in a numeric data processor"
842:
floating-point standard. However, projective closure (
625:) format and 16-, 32-, and 64-bit integer data types.
1087:
1085:
556:The x87 family does not use a directly addressable
1405:Intel 80x87 math coprocessors at cpu-collection.de
1054:
1052:
883:, as Intel moved to a CMOS process by that time),
2603:
1320:
1318:
1082:
325:motherboard. Development of the 8087 led to the
1381:Software Solutions for Engineers and Scientists
1049:
596:
1815:
1037:. Anaheim, California: ACM. pp. 887–893.
1444:
1415:Datasheet for the Intel 8087 Math Coprocessor
1378:
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1315:
1219:
617:floating-point data types and an additional
1125:
860:
16:Floating-point microprocessor made by Intel
1451:
1437:
25:
1379:Sanchez, Julio; Canton, Maria P. (2007).
1290:
1019:
993:
447:
1419:
1131:
1111:
1028:"The INTEL® 8087 Numeric Data Processor"
849:
844:projectively extended real number system
547:
301:
2529:Process–architecture–optimization model
1301:(2nd ed.). Que. pp. 395–403.
1296:
967:
452:Intel had previously manufactured the
2627:Computer-related introductions in 1980
2604:
1362:
1324:
1269:
1025:
999:
973:
947:
1432:
1458:
1325:Shvets, Gennadiy (8 October 2011).
1000:Shvets, Gennadiy (8 October 2011).
974:Shvets, Gennadiy (8 October 2011).
948:Shvets, Gennadiy (8 October 2011).
466:. These were designed for use with
244:, announced in 1980, was the first
13:
314:implements calculations using the
14:
2638:
1398:
609:did. The 8087 provided two basic
552:Simplified 8087 microarchitecture
2544:Intel HD, UHD, and Iris Graphics
1140:. Self-published by Ken Shirriff
1002:"Cyrix 8087 floating-point unit"
1632:P6 variant (Enhanced Pentium M)
1372:
1356:
1263:
1244:
1225:
1200:
1189:
1165:
1156:
723:80-bit extended-precision real
434:
140:Architecture and classification
976:"AMD 8087 floating-point unit"
950:"IBM 8087 floating-point unit"
941:
917:
349:processors. Starting with the
1:
1276:. Little Brown. p. 302.
1173:"Product Change Notification"
925:"Product Change Notification"
910:
870:
755:32-bit single-precision real
739:64-bit double-precision real
1178:. 2 May 2006. Archived from
930:. 2 May 2006. Archived from
597:IEEE floating-point standard
543:
7:
1299:Upgrading and repairing PCs
1208:Component Data Catalog 1980
821:
367:
44:; 44 years ago
10:
2643:
1420:Shirriff, Ken (May 2020).
1132:Shirriff, Ken (May 2020).
806:
793:
785:
776:
768:
759:
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719:
630:
457:Arithmetic processing unit
2612:Intel x86 microprocessors
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2008:
1959:
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1889:
1808:
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1647:
1602:
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1351:Sanchez & Canton 2007
1270:Lemone, Karen A. (1985).
1220:Sanchez & Canton 2007
895:was in fact a full-blown
811:
808:
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772:18-digit decimal integer
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257:floating-point arithmetic
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135:4 MHz to 10 MHz
125:
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96:
88:
74:
56:
38:
33:
24:
1026:Palmer, John F. (1980).
464:Floating Point Processor
299:using around 2.4 watts.
281:transcendental functions
1297:Mueller, Scott (1992).
1043:10.1145/1500518.1500674
176:Physical specifications
60:September 28, 2007
1627:P6 variant (Pentium M)
1119:"Intel 8087 Datasheet"
1066:. 2007. Archived from
861:Design and development
815:16-bit binary integer
802:32-bit binary integer
789:64-bit binary integer
553:
448:Design and development
310:
62:; 16 years ago
850:Coprocessor interface
551:
501:. Most 8087 assembly
333:coprocessors for the
305:
1070:on 30 September 2011
1064:Coprocessor Dot Info
623:binary-coded decimal
440:Suggested Unit Price
259:operations, such as
156:Instruction set
146:Technology node
97:Common manufacturers
1327:"Intel 8087 family"
279:. It also computes
34:General information
21:
2426:Sandy Bridge-based
1595:Microarchitectures
1580:Microarchitectures
1185:on 9 October 2006.
937:on 9 October 2006.
836:projective closure
554:
311:
19:
2599:
2598:
2512:
2511:
1885:
1884:
1804:
1803:
1390:978-1-4200-4302-0
1283:978-0-316-52069-0
1097:cpu-collection.de
830:values by either
826:The 8087 handles
819:
818:
430:
429:
238:
237:
150:4.5->3 μm
2634:
2431:Ivy Bridge-based
2022:8/16-bit databus
1894:
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1809:Current products
1600:
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1460:Intel processors
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589:x86 processors (
581:(codes D9C8–D9CF
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2524:Tick–tock model
2508:
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2441:Broadwell-based
2332:Extreme Edition
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2004:
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632:8087 data types
619:extended 80-bit
599:
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116:
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2049:32-bit databus
2047:
2042:
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2032:
2031:16-bit databus
2029:
2023:
2019:
2017:
2006:
2005:
2003:
2002:
1996:
1990:
1984:
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1971:
1969:
1957:
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1399:External links
1397:
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1353:, p. 110.
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1199:
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1155:
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966:
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872:
869:
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832:affine closure
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708:(bit position)
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269:multiplication
246:floating-point
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2446:Skylake-based
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2436:Haswell-based
2434:
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2421:Nehalem-based
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2011:
2007:
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1782:Goldmont Plus
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1383:. CRC Press.
1382:
1377:
1376:
1365:, p. 300
1364:
1359:
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1347:
1332:
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1321:
1319:
1310:
1308:0-88022-856-3
1304:
1300:
1293:
1285:
1279:
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1274:
1266:
1253:
1247:
1234:
1228:
1222:, p. 96.
1221:
1216:
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1197:
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1029:
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1007:
1003:
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981:
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898:
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847:
845:
841:
837:
833:
829:
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792:
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762:
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742:
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685:
682:
677:
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669:
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637:
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629:
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568:
563:
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541:
537:
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500:
496:
491:
487:
485:
484:William Kahan
479:
475:
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469:
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458:
455:
437:
433:
425:
422:
419:
416:
415:
411:
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388:
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380:
377:
374:
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365:
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348:
344:
340:
336:
332:
328:
327:IEEE 754-1985
324:
319:
317:
309:
304:
300:
298:
294:
293:trigonometric
290:
286:
282:
278:
274:
270:
266:
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258:
254:
250:
247:
243:
234:
231:
227:
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221:
217:
212:
206:
202:
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199:
195:
188:
187:
185:
183:
179:
174:
170:
167:extension of
166:
162:
159:
157:
153:
149:
147:
143:
138:
134:
132:
129:
124:
119:
113:
110:
108:
105:
102:
101:
99:
95:
91:
87:
84:
80:
77:
73:
59:
55:
41:
37:
32:
28:
23:
2617:Coprocessors
2025:
1890:Discontinued
1727:Cypress Cove
1686:Sandy Bridge
1380:
1373:Bibliography
1358:
1346:
1334:. Retrieved
1330:
1298:
1292:
1272:
1265:
1246:
1227:
1215:
1207:
1202:
1191:
1180:the original
1167:
1158:
1149:
1142:. Retrieved
1137:
1127:
1113:
1101:. Retrieved
1096:
1072:. Retrieved
1068:the original
1063:
1034:
1021:
1009:. Retrieved
1005:
995:
983:. Retrieved
979:
969:
957:. Retrieved
953:
943:
932:the original
919:
879:(actually -
874:
865:
856:
853:
825:
769:BCD Integer
707:
631:
600:
578:
570:
566:
555:
538:
534:
528:
524:
520:
516:
512:escape codes
499:instructions
492:
488:
480:
476:
474:controller.
463:
456:
451:
436:
375:Model Number
360:
320:
312:
241:
239:
57:Discontinued
1739:Golden Cove
1734:Willow Cove
1715:Cannon Lake
1363:Lemone 1985
1144:3 September
1093:"Intel FPU"
887:, and the
587:superscalar
575:accumulator
362:Intel 80186
318:algorithm.
306:Intel 8087
289:logarithmic
285:exponential
277:square root
265:subtraction
249:coprocessor
219:Predecessor
182:Transistors
165:coprocessor
121:Performance
89:Designed by
75:Marketed by
2606:Categories
2534:Intel GPUs
2248:Core-based
2012:(external
1900:oriented (
1770:Silvermont
1722:Sunny Cove
1691:Ivy Bridge
1474:Processors
1336:1 December
1252:US 4270167
1233:US 4484259
1138:righto.com
1103:1 December
1074:1 December
1011:1 December
985:1 December
959:1 December
911:References
871:Successors
567:implicitly
459:, and the
381:Model Name
242:Intel 8087
131:clock rate
67:2007-09-28
20:Intel 8087
2586:Codenames
2499:StrongARM
2337:Dual-Core
2310:Dual-Core
2221:Dual-Core
2191:OverDrive
2140:A100/A110
2133:OverDrive
1927:pre-x86 (
1794:Gracemont
1703:Broadwell
1331:CPU World
1006:CPU World
980:CPU World
954:CPU World
752:Fraction
749:Exponent
736:Fraction
733:Exponent
720:Fraction
717:Exponent
544:Registers
503:mnemonics
423:BOX8087-1
409:BOX8087-2
378:Frequency
229:Successor
223:8231/8232
2591:Larrabee
2469:iAPX 432
2404:11th gen
2399:10th gen
2238:P6-based
2128:RapidCAD
1870:14th gen
1865:13th gen
1860:12th gen
1855:11th gen
1850:10th gen
1777:Goldmont
1765:Saltwell
1679:Westmere
1639:NetBurst
1585:Chipsets
840:IEEE 754
828:infinity
822:Infinity
812:Integer
799:Integer
786:Integer
603:IEEE 754
571:explicit
558:register
368:Variants
353:, Intel
283:such as
273:division
261:addition
251:for the
39:Launched
2581:Stratix
2517:Related
2479:Itanium
2394:9th gen
2389:8th gen
2384:7th gen
2379:6th gen
2374:5th gen
2369:4th gen
2364:3rd gen
2359:2nd gen
2354:1st gen
2317:Pentium
2300:Celeron
2260:Tolapai
2181:Pentium
2164:(1998)
2162:Celeron
2053:80387DX
2045:80387SX
1840:Pentium
1835:Celeron
1789:Tremont
1760:Bonnell
1710:Skylake
1698:Haswell
1674:Nehalem
1573:Itanium
1489:Pentium
1484:Celeron
905:Pentium
901:80486DX
897:80486DX
857:did not
591:Pentium
395:BOX8087
351:80486DX
347:80386SX
214:History
203:40-pin
197:Package
65: (
47: (
2504:XScale
2274:64-bit
2270:x86-64
2175:(2004)
2072:32-bit
2035:80C187
2028:(1980)
2001:(1982)
1995:(1982)
1989:(1982)
1983:(1979)
1977:(1978)
1966:16-bit
1960:Early
1952:(1977)
1946:(1974)
1940:(1972)
1919:(1974)
1913:(1971)
1821:64-bit
1817:x86-64
1667:Penryn
1653:64-bit
1649:x86-64
1608:32-bit
1387:
1305:
1280:
1258:
1239:
1206:Intel
1099:. 2011
1060:"8087"
881:80C287
615:64-bit
426:$ 270
420:10 MHz
417:8087-1
412:$ 205
403:8087-2
398:$ 142
384:(USD)
345:, and
323:IBM PC
316:CORDIC
275:, and
169:x86-16
2576:PIIXs
2457:Other
2255:Quark
2068:IA-32
2058:80487
2040:80287
1999:80286
1993:80188
1987:80186
1929:8-bit
1902:4-bit
1604:IA-32
1568:Quark
1467:Lists
1183:(PDF)
1176:(PDF)
1151:1958.
1031:(PDF)
935:(PDF)
928:(PDF)
893:80487
889:80187
885:80387
877:80287
607:80387
562:stack
508:ASCII
406:8 MHz
392:5 MHz
343:80386
339:80286
335:80186
297:FLOPS
233:80287
189:65000
126:Max.
112:Cyrix
103:Intel
92:Intel
79:Intel
2571:ICHs
2566:SCHs
2561:PCHs
2494:i960
2489:i860
2484:RISC
2474:EPIC
2464:CISC
2416:Xeon
2344:Core
2283:Atom
2233:Xeon
2228:Core
2145:Atom
2103:i486
2081:i386
2074:x86)
2026:8087
2014:FPUs
1981:8088
1975:8086
1950:8085
1944:8080
1938:8008
1917:4040
1911:4004
1877:Xeon
1845:Core
1830:Atom
1662:Core
1610:x86)
1563:Xeon
1526:Core
1479:Atom
1385:ISBN
1338:2011
1303:ISBN
1278:ISBN
1146:2020
1105:2011
1076:2011
1013:2011
987:2011
961:2011
699:...
691:...
683:...
675:...
667:...
659:...
651:...
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