617:
209:
677:
mandatory in EABI v2.0 cannot be rectified without considerable effort: backwards incompatibility for Linux distributions is not a viable option. At present this leaves new OpenPOWER implementors wishing to run standard Linux distributions having to implement a massive 962 instructions. By contrast, RISC-V RV64GC, the minimum to run Linux, requires only 165.
513:
These levels include optional and mandatory requirements, however one common misunderstanding is that there is nothing stopping an implementation from being compliant at a lower level but having additional selected functions from higher levels and custom extensions. It is however recommended that an
967:
The specification for Power ISA v.3.0 was released in
November 2015. It is the first to come out after the founding of the OpenPOWER Foundation and includes enhancements for a broad spectrum of workloads and removes the server and embedded categories while retaining backwards compatibility and adds
979:
The spec was revised in March 2017 to the Power ISA v.3.0 B spec, and revised again to v3.0C in May 2020. One major change from v3.0 to v3.0B is the removal of support for hardware assisted garbage collection. The key difference between v3.0B and v3.0C is that the
Compliancy Levels listed in v3.1
676:
Regarding the Linux
Compliancy subset having VSX (SIMD) optional: in 2003–4, 64-bit EABI v1.9 made SIMD optional, but in July 2015, to improve performance for IBM POWER9 systems, SIMD was made mandatory in EABI v2.0. This discrepancy between SIMD being optional in the Linux Compliancy level but
250:
Prior to version 3.0, the ISA is divided into several categories. Processors implement a set of these categories as required for their task. Different classes of processors are required to implement certain categories, for example a server-class processor includes the categories:
509:
New in version 3 of the Power ISA is that you don't have to implement the entire specification to be compliant. The sprawl of instructions and technologies has made the complete specification unwieldy, so the OpenPOWER Foundation have decided to enabled tiered compliancy.
447:
covers the base instruction set available to the application programmer. Memory reference, flow control, Integer, floating point, numeric acceleration, application-level programming. It includes chapters regarding auxiliary processing units like
1019:
long, "prefixed instructions", compared to the usual four byte "word instructions". A lot of new functions to SIMD and VSX instructions are also added. VSX and the SVP64 extension provide hardware support for 16-bit half precision floats.
1014:
The specification for Power ISA v.3.1 was released in May 2020. Mainly giving support for new functions introduced in Power10, but also includes the notion of optionality to the PowerISA specification. Instructions can now be eight
500:
defines alternative instructions and definitions from Books I–III, intended for higher instruction density and very-low-end applications. They use 16-bit instructions and big-endian byte ordering.
1491:
243:
ISA, created by the mergers of the core PowerPC ISA and the optional Book E for embedded applications. The merger of these two components in 2006 was led by Power.org founders IBM and
850:
The specification for Power ISA v.2.06 was released in
February 2009, and revised in July 2010. It is based on Power ISA v.2.05 and includes extensions for the POWER7 processor and
565:– Linux Compliancy Subset. 962 instructions. Intended for server grade Linux, adding features like 64-bit, optional SIMD/VSX, Radix MMU, little-endian mode and hypervisor support.
1634:
575:
Compliancy Subset. 1099 instructions. Intended to run AIX, adding features like decimal and quad-precision floating point, big-endian mode and symmetric multiprocessing.
1275:
3046:
375:
482:– Defines the supervisor instructions used for general-purpose/server implementations. It is mainly the contents of the Book III of the former PowerPC ISA.
333:
special registers of various sizes: Counter
Register (CTR), link register (LR), time base (TBU, TBL), alternate time base (ATBU, ATBL), accumulator (ACC),
466:
defines the storage model available to the application programmer, including timing, synchronization, cache management, storage features, byte ordering.
862:
also includes significant enhancement for the embedded specification regarding hypervisor and virtualisation on single and multi core implementations.
1349:
1303:
1250:
1163:
1139:
2018:
341:
Instructions up to version 3.0 have a length of 32 bits, with the exception of the VLE (variable-length encoding) subset that provides for higher
3954:
3157:
2340:
909:
580:
May include any of the features of the LCS and ACS as
Optional or pick from the Always Optional features like matrix math and power management.
1195:
2859:
594:
If the extension is general-purpose enough, the OpenPOWER Foundation asks that implementors submit it as a
Request for Comments (RFC) to the
2137:
1740:
1219:
3016:
2582:
2399:
759:
The specification for Power ISA v.2.04 was finalized in June 2007. It is based on Power ISA v.2.03 and includes changes primarily to the
810:
The specification for Power ISA v.2.05 was released in
December 2007. It is based on Power ISA v.2.04 and includes changes primarily to
3370:
1116:
2362:
916:, expanded performance monitoring, new storage control features, additions to the VMX and VSX vector facilities (VSX-2), along with
908:
The specification for Power ISA v.2.07 was released in May 2013. It is based on Power ISA v.2.06 and includes major enhancements to
583:
Optional features, if chosen, must be implemented in their entirety (partial implementation of an
Optional feature is not permitted)
3011:
345:
for low-end embedded applications, and version 3.1 which introduced prefixing to create 64-bit instructions. Most instructions are
476:
includes exceptions, interrupts, memory management, debug facilities and special control functions. It is divided into two parts.
3083:
1416:
3949:
3365:
2836:
350:
973:
3780:
2904:
2167:
2011:
3790:
2931:
2058:
1702:"We released the Instruction Set Architecture for POWER10. Power ISA v3.1 is available at the IBM Portal for OpenPOWER"
1279:
3098:
2926:
2899:
2278:
1426:
660:
361:
642:
517:
A design must be compliant at its declared subset level to make use of the
Foundation's protection regarding use of
3964:
3913:
3476:
2369:
2335:
2330:
2249:
2214:
1749:
1733:
764:
488:– Defines the supervisor instructions used for embedded applications. It is derived from the former PowerPC Book E.
220:
94:
865:
The spec was revised in November 2010 to the Power ISA v.2.06 revision B spec, enhancing virtualization features.
549:– Scalar Fixed-point Subset. 129 instructions. Basic fixed point and load/store instructions, which is really the
3888:
3785:
3186:
3093:
2894:
2115:
2004:
3959:
2914:
2633:
2068:
1053:
627:
1094:
1072:
1023:
One key benefit of the new 64-bit prefixed instructions is the extension of immediates in branches to 34-bit.
3969:
3088:
2936:
2909:
2770:
2384:
2345:
2202:
559:– Scalar Fixed-point + Floating-point Subset. 214 instructions. Adding floating-point operations to the Base.
368:
1402:
1377:
3525:
3287:
2763:
2724:
2379:
2374:
2308:
2120:
917:
224:
1307:
1254:
968:
support for VSX-3 instructions. New functions include 128-bit quad-precision floating-point operations, a
3152:
2849:
2547:
2244:
1726:
1167:
1146:
1718:
3802:
3449:
2866:
2357:
2325:
2095:
2083:
2063:
1503:
3893:
3856:
3846:
2234:
1276:"Power.org Debuts Specification Advances and New Services At Power Architecture Developer Conference"
818:, including significant enhancements such as decimal arithmetic (Category: Decimal Floating-Point in
121:
1418:
Performance Optimization and Tuning Techniques for IBM Power Systems Processors Including IBM POWER8
3908:
3315:
3251:
3228:
3078:
3040:
2876:
2826:
2821:
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2192:
2100:
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156:
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1803:
1701:
969:
929:
638:
271:
244:
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2967:
2871:
2775:
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2605:
2467:
2110:
1977:
1226:
855:
798:
700:
specification. The Book I included five new chapters regarding auxiliary processing units like
379:
357:
364:(SIMD) operations on integer and floating-point data on up to 16 elements in one instruction.
3841:
3750:
3496:
3208:
3026:
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2623:
2424:
2239:
2229:
2219:
2209:
2179:
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2027:
1524:
1471:
518:
514:
option be provided to disable any added functions beyond the design's declared subset level.
286:
160:
89:
386:
addressing with separate categories for moded and per-page endianness, and support for both
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3807:
3393:
3115:
3005:
2952:
2484:
2197:
2053:
2035:
1924:
1808:
1576:
913:
378:, and support for unified caches. Memory operations are strictly load/store, but allow for
309:Ă— 64-bit floating-point registers (FPRs) as part of the VSRs for floating-point operations.
228:
36:
598:. Note that it is not strictly necessary to join the OpenPOWER Foundation to submit RFCs.
138:
8:
3918:
3903:
3723:
3574:
3556:
3520:
3508:
3162:
3109:
2886:
2802:
2684:
2539:
2434:
2293:
1842:
997:
921:
673:
The EABI specifications predate the announcement and creation of the Compliancy subsets.
300:
427:– floating point, vector, signal processing, cache locking, decimal floating point, etc.
3775:
3767:
3619:
3594:
3398:
3273:
2797:
2738:
2618:
2350:
2078:
1868:
1679:
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1609:
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275:
175:
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2454:
2394:
2389:
2271:
2187:
1827:
1422:
1328:
839:
736:
732:
728:
692:
The specification for Power ISA v.2.03 is based on the former PowerPC ISA v.2.02 in
3898:
3831:
3817:
3672:
3579:
3533:
3340:
3335:
3330:
3325:
3320:
3310:
3180:
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3053:
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2283:
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2147:
2125:
2043:
1953:
634:
391:
387:
346:
296:
887:
851:
586:
May include Custom extensions, specific to the implementation, implemented in the
3812:
3797:
3745:
3649:
3624:
3461:
3454:
3305:
3300:
3295:
3234:
3142:
3132:
2854:
2689:
2641:
2404:
2288:
2256:
2157:
2152:
2073:
1798:
334:
126:
111:
3923:
3757:
3740:
3733:
3629:
3486:
3223:
3137:
3068:
2651:
2613:
2562:
2557:
2552:
2266:
2090:
1963:
1934:
1790:
1350:"Power ISA 2.06 Rev. B enables full hardware virtualization for embedded space"
104:
1083:
3943:
3718:
3634:
2674:
2656:
2449:
2142:
1822:
1774:
1769:
897:
892:
353:
2577:
854:. One significant new feature is vector-scalar floating-point instructions (
3928:
3866:
3682:
3659:
3471:
3192:
2130:
1911:
1818:
1577:[PATCH, COMMITTED] Add full Power ISA 3.0 / POWER9 binutils support
776:
722:
718:
595:
342:
324:
315:Ă— 128-bit vector registers (VRs) as part of the VSRs for vector operations.
3713:
3677:
3388:
3360:
3218:
3073:
1996:
1929:
1906:
1748:
740:
436:
The Power ISA specification is divided into five parts, called "books":
360:(FMA) and decimal floating-point instructions. There are provisions for
356:
compliant floating-point operations are supported, including additional
3599:
3589:
3584:
3566:
3466:
3439:
2701:
2534:
2504:
2224:
1948:
1944:
1881:
792:
768:
383:
152:
133:
1565:
397:
Different modes of operation include user, supervisor and hypervisor.
3690:
3687:
3429:
2499:
1939:
1901:
1885:
1329:"Workload acceleration with the IBM POWER vector-scalar architecture"
1026:
The spec was revised in September 2021 to the Power ISA v.3.1B spec.
1002:
933:
526:
371:
236:
208:
31:
1967:
645:. Statements consisting only of original research should be removed.
212:
A very high level schematic diagram of a generic Power ISA processor
3705:
2524:
1985:
1832:
1813:
1793:
956:
939:
The spec was revised in April 2015 to the Power ISA v.2.07 B spec.
882:
1084:
The Open Power ISA: Architecture Compliancy and Future Foundations
2514:
2472:
1981:
1972:
1873:
1764:
1041:
705:
697:
572:
453:
349:, i.e. have two source operands and one destination. Single- and
240:
148:
2529:
2494:
2459:
1958:
1878:
1858:
1849:
1029:
The spec was revised in May 2024 to the Power ISA v.3.1C spec.
992:
951:
877:
834:
748:
744:
693:
522:
53:
49:
2987:
2519:
2489:
1919:
1916:
1863:
925:
1005:
is aiming for Embedded FP compliancy with Power ISA 3.0 only
3851:
2999:
2919:
2509:
1853:
1845:
1448:
1446:
1444:
1442:
1440:
1438:
1016:
772:
323:Ă— 4-bit condition register fields (CRs) for comparison and
1038:
All cores that comply with prior versions of the Power ISA
989:
All cores that comply with prior versions of the Power ISA
948:
All cores that comply with prior versions of the Power ISA
874:
All cores that comply with prior versions of the Power ISA
831:
All cores that comply with prior versions of the Power ISA
788:
All cores that comply with prior versions of the Power ISA
2439:
2429:
235:. It was originally developed by IBM and the now-defunct
232:
1435:
606:
285:Ă— 32-bit or 64-bit general-purpose registers (GPRs) for
602:
Much may be implemented in either hardware or firmware.
1278:(Press release). Power.org. 2007-09-24. Archived from
1485:
267:, etc. All processors implement the Base category.
239:industry group. Power ISA is an evolution of the
3941:
498:Variable Length Encoded Instruction Architecture
1492:Announcing a New Era of Openness with Power 3.0
924:(GCM), SHA-224, SHA-256, SHA-384 and SHA-512 (
2012:
1734:
1693:
295:Ă— 128-bit vector scalar registers (VSRs) for
3017:Computer performance by orders of magnitude
529:. This is explained in the OpenPOWER EULA.
2026:
2019:
2005:
1741:
1727:
1298:
1296:
1372:
1370:
1368:
1366:
1164:"PowerPC Architecture Book, Version 2.02"
976:and hardware-enforced trusted computing.
661:Learn how and when to remove this message
1268:
543:And support at least one of the subsets
207:
1464:
1400:
1306:. Power.org. 2010-07-23. Archived from
1293:
1253:. Power.org. 2007-10-23. Archived from
1225:. Power.org. 2007-06-12. Archived from
1145:. Power.org. 2006-09-29. Archived from
184:32Ă— 64/32-bit general-purpose registers
3955:Computer-related introductions in 2006
3942:
1672:
1651:
1538:
1517:
1363:
1243:
1212:
822:) and server hypervisor improvements.
2000:
1722:
1581:
1506:. openpowerfoundation.org. 2016-11-30
1496:
1156:
1132:
607:EABI and Linux Compliancy discrepancy
16:Computer instruction set architecture
2988:Floating-point operations per second
1181:
610:
82:
1699:
1321:
1304:"Power ISA Version 2.06 Revision B"
903:
845:
805:
754:
687:
187:32Ă— 64-bit floating-point registers
13:
1700:Seo, Carlos Eduardo (2020-05-12).
1682:. OpenPOWER Foundation. 2024-05-26
1661:. OpenPOWER Foundation. 2021-09-14
1591:. OpenPOWER Foundation. 2020-05-01
1548:. OpenPOWER Foundation. 2020-05-01
1009:
962:
696:+ and the Book E extension of the
474:Operating Environment Architecture
14:
3981:
1166:. IBM. 2005-02-24. Archived from
1095:Section 2.2 of OPF Power ISA EULA
680:
445:User Instruction Set Architecture
382:. There is also support for both
376:split data and instruction caches
362:single instruction, multiple data
227:(ISA) currently developed by the
3914:Semiconductor device fabrication
1750:Reduced instruction set computer
1566:list of Power ISA specifications
1421:. IBM. August 2015. p. 48.
1401:Barbosa, Leonidas (2014-09-21).
615:
464:Virtual Environment Architecture
221:reduced instruction set computer
3889:History of general-purpose CPUs
2116:Nondeterministic Turing machine
1627:
1602:
1570:
1559:
1409:
1394:
1342:
1201:from the original on 2018-03-10
928:) cryptographic extensions and
2069:Deterministic finite automaton
1454:"Instruction Set Architecture"
1121:
1110:
1099:
1088:
1077:
1066:
1054:Open-source computing hardware
193:32-bit condition code register
1:
3950:Instruction set architectures
2860:Simultaneous and heterogenous
1403:"POWER8 in-core cryptography"
1073:Final draft of Power ISA EULA
1059:
504:
400:
3544:Integrated memory controller
3526:Translation lookaside buffer
2725:Memory dependence prediction
2168:Random-access stored program
2121:Probabilistic Turing machine
409:– Most of Book I and Book II
337:(XER, FPSCR, VSCR, SPEFSCR).
225:instruction set architecture
190:64Ă— 128-bit vector registers
7:
3000:Synaptic updates per second
1128:Page 18 RISC-V "green card"
1047:
910:logical partition functions
641:the claims made and adding
66:; 18 years ago
10:
3986:
3404:Heterogeneous architecture
2326:Orthogonal instruction set
2096:Alternating Turing machine
2084:Quantum cellular automaton
1472:"Power ISA Version 2.07 B"
980:were also added to v3.0C.
367:Power ISA has support for
274:. It has multiple sets of
3894:Microprocessor chronology
3881:
3857:Dynamic frequency scaling
3830:
3766:
3704:
3658:
3610:
3565:
3485:
3412:
3381:
3286:
3207:
3171:
3125:
3025:
3012:Cache performance metrics
2951:
2885:
2835:
2746:
2737:
2710:
2665:
2632:
2604:
2595:
2415:
2318:
2307:
2178:
2034:
1894:
1783:
1757:
1546:"Power ISA Version 3.0 C"
1525:"Power ISA Version 3.0 B"
532:A compliant design must:
450:digital signal processors
301:floating-point operations
181:
174:
166:
144:
132:
120:
110:
100:
88:
78:
60:
45:
24:
3909:Hardware security module
3252:Digital signal processor
3229:Graphics processing unit
3041:Graphics processing unit
1680:"Power ISA Version 3.1C"
1659:"Power ISA Version 3.1B"
1610:"OPF_PowerISA_v3.1B.pdf"
1378:"Power ISA Version 2.07"
1251:"Power ISA Version 2.05"
1220:"Power ISA Version 2.04"
431:
3965:Freescale Semiconductor
3862:Dynamic voltage scaling
3645:Memory address register
3539:Branch target predictor
3503:Address generation unit
3246:Physics processing unit
3035:Central processing unit
2994:Transactions per second
2982:Instructions per second
2905:Array processing (SIMT)
2049:Stored-program computer
1589:"Power ISA Version 3.1"
1504:"Power ISA Version 3.0"
1474:. Power.org. 2015-04-09
1383:. Power.org. 2013-05-15
970:random number generator
930:cyclic redundancy check
596:OpenPOWER ISA Workgroup
272:load/store architecture
245:Freescale Semiconductor
3668:Hardwired control unit
3550:Memory management unit
3515:Memory management unit
3264:Secure cryptoprocessor
3258:Tensor Processing Unit
3240:Vision processing unit
2974:Cycles per instruction
2968:Instructions per cycle
2915:Associative processing
2606:Instruction pipelining
2028:Processor technologies
1616:. OpenPOWER Foundation
1189:"PowerPC Book E v.1.0"
380:out-of-order execution
213:
3960:IBM computer hardware
3751:Sum-addressed decoder
3497:Arithmetic logic unit
2624:Classic RISC pipeline
2578:Epiphany architecture
2425:Motorola 68000 series
1352:. EETimes. 2010-11-03
519:intellectual property
384:big and little-endian
211:
199:32-bit count register
170:Yes, and royalty free
3970:Open microprocessors
3872:Performance per watt
3450:replacement policies
3116:Package on a package
3006:Performance per watt
2910:Pipelined processing
2680:Tomasulo's algorithm
2485:Clipper architecture
2341:Application-specific
2054:Finite-state machine
1752:(RISC) architectures
1458:OpenPOWER Foundation
972:, hardware-assisted
914:transactional memory
773:logical partitioning
588:Architecture Sandbox
270:Power ISA is a RISC
229:OpenPOWER Foundation
196:32-bit link register
37:OpenPOWER Foundation
3904:Digital electronics
3557:Instruction decoder
3509:Floating-point unit
3163:Soft microprocessor
3110:System in a package
2685:Reservation station
2215:Transport-triggered
1194:. IBM. 2002-05-07.
998:OpenPOWER Microwatt
922:Galois Counter Mode
795:core from P.A. Semi
21:
3776:Integrated circuit
3620:Processor register
3274:Baseband processor
2619:Operand forwarding
2079:Cellular automaton
1140:"Power ISA v.2.03"
974:garbage collection
717:Freescale PowerPC
626:possibly contains
358:fused multiply–add
287:integer operations
214:
19:
3937:
3936:
3826:
3825:
3445:Instruction cache
3435:Scratchpad memory
3282:
3281:
3269:Network processor
3198:Network on a chip
3153:Ultra-low-voltage
3104:Multi-chip module
2947:
2946:
2733:
2732:
2720:Branch prediction
2697:Register renaming
2591:
2590:
2573:VISC architecture
2395:Quantum computing
2390:VISC architecture
2272:Secondary storage
2188:Microarchitecture
2148:Register machines
1994:
1993:
1639:libre-soc.org Git
1635:"ls005.xlen.mdwn"
1527:. IBM. 2017-03-29
1331:. IBM. 2016-03-01
1117:OpenPOWER EABI v2
671:
670:
663:
628:original research
297:vector operations
206:
205:
3977:
3899:Processor design
3791:Power management
3673:Instruction unit
3534:Branch predictor
3483:
3482:
3181:System on a chip
3123:
3122:
2963:Transistor count
2887:Flynn's taxonomy
2744:
2743:
2602:
2601:
2405:Addressing modes
2316:
2315:
2262:Memory hierarchy
2126:Hypercomputation
2044:Abstract machine
2021:
2014:
2007:
1998:
1997:
1743:
1736:
1729:
1720:
1719:
1713:
1712:
1710:
1709:
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1690:
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1667:
1666:
1655:
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1648:
1646:
1645:
1631:
1625:
1624:
1622:
1621:
1606:
1600:
1599:
1597:
1596:
1585:
1579:
1574:
1568:
1563:
1557:
1556:
1554:
1553:
1542:
1536:
1535:
1533:
1532:
1521:
1515:
1514:
1512:
1511:
1500:
1494:
1489:
1483:
1482:
1480:
1479:
1468:
1462:
1461:
1450:
1433:
1432:
1413:
1407:
1406:
1398:
1392:
1391:
1389:
1388:
1382:
1374:
1361:
1360:
1358:
1357:
1346:
1340:
1339:
1337:
1336:
1325:
1319:
1318:
1316:
1315:
1300:
1291:
1290:
1288:
1287:
1272:
1266:
1265:
1263:
1262:
1247:
1241:
1240:
1238:
1237:
1231:
1224:
1216:
1210:
1209:
1207:
1206:
1200:
1193:
1185:
1179:
1178:
1176:
1175:
1160:
1154:
1153:
1151:
1144:
1136:
1130:
1125:
1119:
1114:
1108:
1103:
1097:
1092:
1086:
1081:
1075:
1070:
904:Power ISA v.2.07
846:Power ISA v.2.06
806:Power ISA v.2.05
755:Power ISA v.2.04
688:Power ISA v.2.03
666:
659:
655:
652:
646:
643:inline citations
619:
618:
611:
351:double-precision
335:status registers
74:
72:
67:
22:
18:
3985:
3984:
3980:
3979:
3978:
3976:
3975:
3974:
3940:
3939:
3938:
3933:
3919:Tick–tock model
3877:
3833:
3822:
3762:
3746:Address decoder
3700:
3654:
3650:Program counter
3625:Status register
3606:
3561:
3521:Load–store unit
3488:
3481:
3408:
3377:
3278:
3235:Image processor
3210:
3203:
3173:
3167:
3143:Microcontroller
3133:Embedded system
3121:
3021:
2954:
2943:
2881:
2831:
2729:
2706:
2690:Re-order buffer
2661:
2642:Data dependency
2628:
2587:
2417:
2411:
2310:
2309:Instruction set
2303:
2289:Multiprocessing
2257:Cache hierarchy
2250:Register/memory
2174:
2074:Queue automaton
2030:
2025:
1995:
1990:
1890:
1779:
1753:
1747:
1717:
1716:
1707:
1705:
1698:
1694:
1685:
1683:
1678:
1677:
1673:
1664:
1662:
1657:
1656:
1652:
1643:
1641:
1633:
1632:
1628:
1619:
1617:
1614:OpenPOWER Files
1608:
1607:
1603:
1594:
1592:
1587:
1586:
1582:
1575:
1571:
1564:
1560:
1551:
1549:
1544:
1543:
1539:
1530:
1528:
1523:
1522:
1518:
1509:
1507:
1502:
1501:
1497:
1490:
1486:
1477:
1475:
1470:
1469:
1465:
1452:
1451:
1436:
1429:
1415:
1414:
1410:
1399:
1395:
1386:
1384:
1380:
1376:
1375:
1364:
1355:
1353:
1348:
1347:
1343:
1334:
1332:
1327:
1326:
1322:
1313:
1311:
1302:
1301:
1294:
1285:
1283:
1274:
1273:
1269:
1260:
1258:
1249:
1248:
1244:
1235:
1233:
1229:
1222:
1218:
1217:
1213:
1204:
1202:
1198:
1191:
1187:
1186:
1182:
1173:
1171:
1162:
1161:
1157:
1149:
1142:
1138:
1137:
1133:
1126:
1122:
1115:
1111:
1104:
1100:
1093:
1089:
1082:
1078:
1071:
1067:
1062:
1050:
1033:Compliant cores
1012:
1010:Power ISA v.3.1
984:Compliant cores
965:
963:Power ISA v.3.0
943:Compliant cores
906:
869:Compliant cores
848:
826:Compliant cores
808:
783:Compliant cores
763:part regarding
757:
712:Compliant cores
690:
683:
667:
656:
650:
647:
632:
620:
616:
609:
507:
452:(DSPs) and the
434:
403:
70:
68:
65:
41:
17:
12:
11:
5:
3983:
3973:
3972:
3967:
3962:
3957:
3952:
3935:
3934:
3932:
3931:
3926:
3924:Pin grid array
3921:
3916:
3911:
3906:
3901:
3896:
3891:
3885:
3883:
3879:
3878:
3876:
3875:
3869:
3864:
3859:
3854:
3849:
3844:
3838:
3836:
3828:
3827:
3824:
3823:
3821:
3820:
3815:
3810:
3805:
3800:
3795:
3794:
3793:
3788:
3783:
3772:
3770:
3764:
3763:
3761:
3760:
3758:Barrel shifter
3755:
3754:
3753:
3748:
3741:Binary decoder
3738:
3737:
3736:
3726:
3721:
3716:
3710:
3708:
3702:
3701:
3699:
3698:
3693:
3685:
3680:
3675:
3670:
3664:
3662:
3656:
3655:
3653:
3652:
3647:
3642:
3637:
3632:
3630:Stack register
3627:
3622:
3616:
3614:
3608:
3607:
3605:
3604:
3603:
3602:
3597:
3587:
3582:
3577:
3571:
3569:
3563:
3562:
3560:
3559:
3554:
3553:
3552:
3541:
3536:
3531:
3530:
3529:
3523:
3512:
3506:
3500:
3493:
3491:
3480:
3479:
3474:
3469:
3464:
3459:
3458:
3457:
3452:
3447:
3442:
3437:
3432:
3422:
3416:
3414:
3410:
3409:
3407:
3406:
3401:
3396:
3391:
3385:
3383:
3379:
3378:
3376:
3375:
3374:
3373:
3363:
3358:
3353:
3348:
3343:
3338:
3333:
3328:
3323:
3318:
3313:
3308:
3303:
3298:
3292:
3290:
3284:
3283:
3280:
3279:
3277:
3276:
3271:
3266:
3261:
3255:
3249:
3243:
3237:
3232:
3226:
3224:AI accelerator
3221:
3215:
3213:
3205:
3204:
3202:
3201:
3195:
3190:
3187:Multiprocessor
3184:
3177:
3175:
3169:
3168:
3166:
3165:
3160:
3155:
3150:
3145:
3140:
3138:Microprocessor
3135:
3129:
3127:
3126:By application
3120:
3119:
3113:
3107:
3101:
3096:
3091:
3086:
3081:
3076:
3071:
3069:Tile processor
3066:
3061:
3056:
3051:
3050:
3049:
3038:
3031:
3029:
3023:
3022:
3020:
3019:
3014:
3009:
3003:
2997:
2991:
2985:
2979:
2978:
2977:
2965:
2959:
2957:
2949:
2948:
2945:
2944:
2942:
2941:
2940:
2939:
2929:
2924:
2923:
2922:
2917:
2912:
2907:
2897:
2891:
2889:
2883:
2882:
2880:
2879:
2874:
2869:
2864:
2863:
2862:
2857:
2855:Hyperthreading
2847:
2841:
2839:
2837:Multithreading
2833:
2832:
2830:
2829:
2824:
2819:
2818:
2817:
2807:
2806:
2805:
2800:
2790:
2789:
2788:
2783:
2773:
2768:
2767:
2766:
2761:
2750:
2748:
2741:
2735:
2734:
2731:
2730:
2728:
2727:
2722:
2716:
2714:
2708:
2707:
2705:
2704:
2699:
2694:
2693:
2692:
2687:
2677:
2671:
2669:
2663:
2662:
2660:
2659:
2654:
2649:
2644:
2638:
2636:
2630:
2629:
2627:
2626:
2621:
2616:
2614:Pipeline stall
2610:
2608:
2599:
2593:
2592:
2589:
2588:
2586:
2585:
2580:
2575:
2570:
2567:
2566:
2565:
2563:z/Architecture
2560:
2555:
2550:
2542:
2537:
2532:
2527:
2522:
2517:
2512:
2507:
2502:
2497:
2492:
2487:
2482:
2481:
2480:
2475:
2470:
2462:
2457:
2452:
2447:
2442:
2437:
2432:
2427:
2421:
2419:
2413:
2412:
2410:
2409:
2408:
2407:
2397:
2392:
2387:
2382:
2377:
2372:
2367:
2366:
2365:
2355:
2354:
2353:
2343:
2338:
2333:
2328:
2322:
2320:
2313:
2305:
2304:
2302:
2301:
2296:
2291:
2286:
2281:
2276:
2275:
2274:
2269:
2267:Virtual memory
2259:
2254:
2253:
2252:
2247:
2242:
2237:
2227:
2222:
2217:
2212:
2207:
2206:
2205:
2195:
2190:
2184:
2182:
2176:
2175:
2173:
2172:
2171:
2170:
2165:
2160:
2155:
2145:
2140:
2135:
2134:
2133:
2128:
2123:
2118:
2113:
2108:
2103:
2098:
2091:Turing machine
2088:
2087:
2086:
2081:
2076:
2071:
2066:
2061:
2051:
2046:
2040:
2038:
2032:
2031:
2024:
2023:
2016:
2009:
2001:
1992:
1991:
1989:
1988:
1975:
1970:
1964:Motorola 88000
1961:
1956:
1951:
1942:
1937:
1932:
1927:
1922:
1914:
1909:
1904:
1898:
1896:
1892:
1891:
1889:
1888:
1876:
1871:
1866:
1861:
1856:
1840:
1835:
1830:
1825:
1816:
1811:
1806:
1801:
1796:
1791:Analog Devices
1787:
1785:
1781:
1780:
1778:
1777:
1772:
1767:
1761:
1759:
1755:
1754:
1746:
1745:
1738:
1731:
1723:
1715:
1714:
1692:
1671:
1650:
1626:
1601:
1580:
1569:
1558:
1537:
1516:
1495:
1484:
1463:
1434:
1427:
1408:
1393:
1362:
1341:
1320:
1292:
1267:
1242:
1211:
1180:
1155:
1152:on 2011-07-27.
1131:
1120:
1109:
1098:
1087:
1076:
1064:
1063:
1061:
1058:
1057:
1056:
1049:
1046:
1045:
1044:
1039:
1035:
1034:
1011:
1008:
1007:
1006:
1000:
995:
990:
986:
985:
964:
961:
960:
959:
954:
949:
945:
944:
905:
902:
901:
900:
895:
890:
885:
880:
875:
871:
870:
847:
844:
843:
842:
837:
832:
828:
827:
807:
804:
803:
802:
796:
789:
785:
784:
765:virtualization
756:
753:
752:
751:
725:
714:
713:
689:
686:
682:
681:Specifications
679:
669:
668:
623:
621:
614:
608:
605:
604:
603:
592:
591:
584:
581:
578:
577:
576:
566:
560:
554:
541:
506:
503:
502:
501:
491:
490:
489:
483:
467:
457:
433:
430:
429:
428:
422:
416:
410:
402:
399:
339:
338:
328:
318:
317:
316:
310:
290:
261:Floating-Point
204:
203:
201:
200:
197:
194:
191:
188:
185:
179:
178:
172:
171:
168:
164:
163:
146:
142:
141:
136:
130:
129:
127:Condition code
124:
118:
117:
116:Fixed/Variable
114:
108:
107:
102:
98:
97:
92:
86:
85:
80:
76:
75:
62:
58:
57:
47:
43:
42:
40:
39:
34:
28:
26:
15:
9:
6:
4:
3:
2:
3982:
3971:
3968:
3966:
3963:
3961:
3958:
3956:
3953:
3951:
3948:
3947:
3945:
3930:
3927:
3925:
3922:
3920:
3917:
3915:
3912:
3910:
3907:
3905:
3902:
3900:
3897:
3895:
3892:
3890:
3887:
3886:
3884:
3880:
3873:
3870:
3868:
3865:
3863:
3860:
3858:
3855:
3853:
3850:
3848:
3845:
3843:
3840:
3839:
3837:
3835:
3829:
3819:
3816:
3814:
3811:
3809:
3806:
3804:
3801:
3799:
3796:
3792:
3789:
3787:
3784:
3782:
3779:
3778:
3777:
3774:
3773:
3771:
3769:
3765:
3759:
3756:
3752:
3749:
3747:
3744:
3743:
3742:
3739:
3735:
3732:
3731:
3730:
3727:
3725:
3722:
3720:
3719:Demultiplexer
3717:
3715:
3712:
3711:
3709:
3707:
3703:
3697:
3694:
3692:
3689:
3686:
3684:
3681:
3679:
3676:
3674:
3671:
3669:
3666:
3665:
3663:
3661:
3657:
3651:
3648:
3646:
3643:
3641:
3640:Memory buffer
3638:
3636:
3635:Register file
3633:
3631:
3628:
3626:
3623:
3621:
3618:
3617:
3615:
3613:
3609:
3601:
3598:
3596:
3593:
3592:
3591:
3588:
3586:
3583:
3581:
3578:
3576:
3575:Combinational
3573:
3572:
3570:
3568:
3564:
3558:
3555:
3551:
3548:
3547:
3545:
3542:
3540:
3537:
3535:
3532:
3527:
3524:
3522:
3519:
3518:
3516:
3513:
3510:
3507:
3504:
3501:
3498:
3495:
3494:
3492:
3490:
3484:
3478:
3475:
3473:
3470:
3468:
3465:
3463:
3460:
3456:
3453:
3451:
3448:
3446:
3443:
3441:
3438:
3436:
3433:
3431:
3428:
3427:
3426:
3423:
3421:
3418:
3417:
3415:
3411:
3405:
3402:
3400:
3397:
3395:
3392:
3390:
3387:
3386:
3384:
3380:
3372:
3369:
3368:
3367:
3364:
3362:
3359:
3357:
3354:
3352:
3349:
3347:
3344:
3342:
3339:
3337:
3334:
3332:
3329:
3327:
3324:
3322:
3319:
3317:
3314:
3312:
3309:
3307:
3304:
3302:
3299:
3297:
3294:
3293:
3291:
3289:
3285:
3275:
3272:
3270:
3267:
3265:
3262:
3259:
3256:
3253:
3250:
3247:
3244:
3241:
3238:
3236:
3233:
3230:
3227:
3225:
3222:
3220:
3217:
3216:
3214:
3212:
3206:
3199:
3196:
3194:
3191:
3188:
3185:
3182:
3179:
3178:
3176:
3170:
3164:
3161:
3159:
3156:
3154:
3151:
3149:
3146:
3144:
3141:
3139:
3136:
3134:
3131:
3130:
3128:
3124:
3117:
3114:
3111:
3108:
3105:
3102:
3100:
3097:
3095:
3092:
3090:
3087:
3085:
3082:
3080:
3077:
3075:
3072:
3070:
3067:
3065:
3062:
3060:
3057:
3055:
3052:
3048:
3045:
3044:
3042:
3039:
3036:
3033:
3032:
3030:
3028:
3024:
3018:
3015:
3013:
3010:
3007:
3004:
3001:
2998:
2995:
2992:
2989:
2986:
2983:
2980:
2975:
2972:
2971:
2969:
2966:
2964:
2961:
2960:
2958:
2956:
2950:
2938:
2935:
2934:
2933:
2930:
2928:
2925:
2921:
2918:
2916:
2913:
2911:
2908:
2906:
2903:
2902:
2901:
2898:
2896:
2893:
2892:
2890:
2888:
2884:
2878:
2875:
2873:
2870:
2868:
2865:
2861:
2858:
2856:
2853:
2852:
2851:
2848:
2846:
2843:
2842:
2840:
2838:
2834:
2828:
2825:
2823:
2820:
2816:
2813:
2812:
2811:
2808:
2804:
2801:
2799:
2796:
2795:
2794:
2791:
2787:
2784:
2782:
2779:
2778:
2777:
2774:
2772:
2769:
2765:
2762:
2760:
2757:
2756:
2755:
2752:
2751:
2749:
2745:
2742:
2740:
2736:
2726:
2723:
2721:
2718:
2717:
2715:
2713:
2709:
2703:
2700:
2698:
2695:
2691:
2688:
2686:
2683:
2682:
2681:
2678:
2676:
2675:Scoreboarding
2673:
2672:
2670:
2668:
2664:
2658:
2657:False sharing
2655:
2653:
2650:
2648:
2645:
2643:
2640:
2639:
2637:
2635:
2631:
2625:
2622:
2620:
2617:
2615:
2612:
2611:
2609:
2607:
2603:
2600:
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2450:Stanford MIPS
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2311:architectures
2306:
2300:
2297:
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2292:
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2279:Heterogeneous
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2258:
2255:
2251:
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2232:
2231:
2230:Memory access
2228:
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2164:
2163:Random-access
2161:
2159:
2156:
2154:
2151:
2150:
2149:
2146:
2144:
2143:Stack machine
2141:
2139:
2136:
2132:
2129:
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2109:
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2059:with datapath
2057:
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2045:
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2033:
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2017:
2015:
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1987:
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1971:
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1834:
1831:
1829:
1826:
1824:
1823:LatticeMico32
1820:
1817:
1815:
1812:
1810:
1807:
1805:
1802:
1800:
1797:
1795:
1792:
1789:
1788:
1786:
1782:
1776:
1775:Stanford MIPS
1773:
1771:
1770:Berkeley RISC
1768:
1766:
1763:
1762:
1760:
1756:
1751:
1744:
1739:
1737:
1732:
1730:
1725:
1724:
1721:
1704:. twitter.com
1703:
1696:
1681:
1675:
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1630:
1615:
1611:
1605:
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1584:
1578:
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1520:
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1499:
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1459:
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1428:9780738440927
1424:
1420:
1419:
1412:
1404:
1397:
1379:
1373:
1371:
1369:
1367:
1351:
1345:
1330:
1324:
1310:on 2012-11-24
1309:
1305:
1299:
1297:
1282:on 2007-10-12
1281:
1277:
1271:
1257:on 2012-11-24
1256:
1252:
1246:
1232:on 2007-09-27
1228:
1221:
1215:
1197:
1190:
1184:
1170:on 2007-10-18
1169:
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629:
624:This section
622:
613:
612:
601:
600:
599:
597:
589:
585:
582:
579:
574:
570:
567:
564:
561:
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555:
553:architecture.
552:
548:
545:
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511:
499:
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411:
408:
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398:
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389:
385:
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365:
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329:
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189:
186:
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173:
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158:
154:
150:
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143:
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137:
135:
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128:
125:
123:
119:
115:
113:
109:
106:
103:
99:
96:
93:
91:
87:
84:
81:
77:
63:
59:
55:
51:
48:
44:
38:
35:
33:
30:
29:
27:
23:
3929:Chip carrier
3867:Clock gating
3786:Mixed-signal
3683:Write buffer
3660:Control unit
3472:Clock signal
3211:accelerators
3193:Cypress PSoC
2850:Simultaneous
2667:Out-of-order
2477:
2299:Neuromorphic
2180:Architecture
2138:Belt machine
2131:Zeno machine
2064:Hierarchical
1912:Apollo PRISM
1895:Discontinued
1837:
1819:LatticeMico8
1706:. Retrieved
1695:
1684:. Retrieved
1674:
1663:. Retrieved
1653:
1642:. Retrieved
1638:
1629:
1618:. Retrieved
1613:
1604:
1593:. Retrieved
1583:
1572:
1561:
1550:. Retrieved
1540:
1529:. Retrieved
1519:
1508:. Retrieved
1498:
1487:
1476:. Retrieved
1466:
1457:
1417:
1411:
1396:
1385:. Retrieved
1354:. Retrieved
1344:
1333:. Retrieved
1323:
1312:. Retrieved
1308:the original
1284:. Retrieved
1280:the original
1270:
1259:. Retrieved
1255:the original
1245:
1234:. Retrieved
1227:the original
1214:
1203:. Retrieved
1183:
1172:. Retrieved
1168:the original
1158:
1147:the original
1134:
1123:
1112:
1106:ELF PP64 ABI
1101:
1090:
1079:
1068:
1028:
1025:
1022:
1013:
978:
966:
938:
907:
864:
859:
852:e500-mc core
849:
819:
815:
811:
809:
777:virtual page
760:
758:
727:IBM PowerPC
691:
684:
675:
672:
657:
651:January 2024
648:
625:
593:
587:
568:
562:
556:
550:
546:
540:architecture
537:
536:Support the
531:
516:
512:
508:
497:
493:
485:
479:
473:
469:
463:
459:
444:
440:
435:
424:
421:– Book III-E
418:
415:– Book III-S
412:
406:
396:
394:addressing.
366:
343:code density
340:
330:
325:control flow
320:
312:
306:
292:
282:
269:
264:
260:
256:
252:
249:
216:
215:
3714:Multiplexer
3678:Data buffer
3389:Single-core
3361:bit slicing
3219:Coprocessor
3074:Coprocessor
2955:performance
2877:Cooperative
2867:Speculative
2827:Distributed
2786:Superscalar
2771:Instruction
2739:Parallelism
2712:Speculative
2544:System/3x0
2416:Instruction
2193:Von Neumann
2106:Post–Turing
1907:AMD Am29000
840:PowerPC 476
771:functions,
708:extension.
3944:Categories
3834:management
3729:Multiplier
3590:Logic gate
3580:Sequential
3487:Functional
3467:Clock rate
3440:Data cache
3413:Components
3394:Multi-core
3382:Core count
2872:Preemptive
2776:Pipelining
2759:Bit-serial
2702:Wide-issue
2647:Structural
2569:Tilera ISA
2535:MicroBlaze
2505:ETRAX CRIS
2400:Comparison
2245:Load–store
2225:Endianness
1945:Intel i860
1882:MicroBlaze
1708:2020-05-23
1686:2024-07-04
1665:2023-02-23
1644:2023-07-02
1620:2023-07-02
1595:2023-02-23
1552:2023-02-23
1531:2023-02-23
1510:2017-01-06
1478:2023-02-23
1387:2023-11-02
1356:2011-06-08
1335:2017-05-02
1314:2011-02-12
1286:2007-09-24
1261:2007-12-18
1236:2007-06-14
1205:2007-03-16
1174:2007-03-16
1060:References
934:algorithms
860:Book III-E
816:Book III-S
779:handling.
769:hypervisor
761:Book III-S
635:improve it
527:trademarks
505:Compliancy
486:Book III-E
480:Book III-S
456:extension.
401:Categories
153:PowerPC AS
145:Extensions
134:Endianness
105:Load–store
61:Introduced
3768:Circuitry
3688:Microcode
3612:Registers
3455:coherence
3430:CPU cache
3288:Word size
2953:Processor
2597:Execution
2500:DEC Alpha
2478:Power ISA
2294:Cognitive
2101:Universal
1940:DEC PRISM
1886:PicoBlaze
1838:Power ISA
1003:Libre-SOC
801:from AMCC
639:verifying
276:registers
237:Power.org
231:, led by
217:Power ISA
176:Registers
122:Branching
56:(32 → 64)
32:Power.org
20:Power ISA
3706:Datapath
3399:Manycore
3371:variable
3209:Hardware
2845:Temporal
2525:OpenRISC
2220:Cellular
2210:Dataflow
2203:modified
1833:OpenRISC
1814:eSi-RISC
1794:Blackfin
1196:Archived
1048:See also
704:and the
521:, be it
494:Book VLE
470:Book III
419:Embedded
354:IEEE-754
112:Encoding
25:Designer
3882:Related
3813:Quantum
3803:Digital
3798:Boolean
3696:Counter
3595:Quantum
3356:512-bit
3351:256-bit
3346:128-bit
3189:(MPSoC)
3174:on chip
3172:Systems
2990:(FLOPS)
2803:Process
2652:Control
2634:Hazards
2520:Itanium
2515:Unicore
2473:PowerPC
2198:Harvard
2158:Pointer
2153:Counter
2111:Quantum
1982:PowerPC
1973:PA-RISC
1925:Clipper
1874:Unicore
1843:Renesas
1765:IBM 801
1758:Origins
1042:Power10
888:e500-mc
706:AltiVec
698:PowerPC
633:Please
523:patents
460:Book II
454:AltiVec
374:, i.e.
369:Harvard
347:triadic
241:PowerPC
223:(RISC)
155:, APU,
149:AltiVec
79:Version
69: (
3818:Switch
3808:Analog
3546:(IMC)
3517:(MMU)
3366:others
3341:64-bit
3336:48-bit
3331:32-bit
3326:24-bit
3321:16-bit
3316:15-bit
3311:12-bit
3148:Mobile
3064:Stream
3059:Barrel
3054:Vector
3043:(GPU)
3002:(SUPS)
2970:(IPC)
2822:Memory
2815:Vector
2798:Thread
2781:Scalar
2583:Others
2530:RISC-V
2495:SuperH
2464:Power
2460:MIPS-X
2435:PDP-11
2284:Fabric
2036:Models
1968:M·CORE
1959:MIPS-X
1879:Xilinx
1869:Sunway
1859:RISC-V
1850:SuperH
1784:Active
1425:
1405:. IBM.
993:POWER9
952:POWER8
932:(CRC)
878:POWER7
835:POWER6
820:Book I
812:Book I
749:POWER6
745:POWER5
694:POWER5
441:Book I
413:Server
392:64-bit
388:32-bit
265:64-Bit
257:Server
202:+ more
139:Big/Bi
90:Design
54:64-bit
50:32-bit
3874:(PPW)
3832:Power
3724:Adder
3600:Array
3567:Logic
3528:(TLB)
3511:(FPU)
3505:(AGU)
3499:(ALU)
3489:units
3425:Cache
3306:8-bit
3301:4-bit
3296:1-bit
3260:(TPU)
3254:(DSP)
3248:(PPU)
3242:(VPU)
3231:(GPU)
3200:(NoC)
3183:(SoC)
3118:(PoP)
3112:(SiP)
3106:(MCM)
3047:GPGPU
3037:(CPU)
3027:Types
3008:(PPW)
2996:(TPS)
2984:(IPS)
2976:(CPI)
2747:Level
2558:S/390
2553:S/370
2548:S/360
2490:SPARC
2468:POWER
2351:TRIPS
2319:Types
1978:POWER
1935:CRISP
1920:AVR32
1917:Atmel
1902:Alpha
1864:SPARC
1381:(PDF)
1230:(PDF)
1223:(PDF)
1199:(PDF)
1192:(PDF)
1150:(PDF)
1143:(PDF)
1017:bytes
926:SHA-2
898:e6500
893:e5500
799:Titan
432:Books
372:cache
219:is a
3852:ACPI
3585:Glue
3477:FIFO
3420:Core
3158:ASIP
3099:CPLD
3094:FPOA
3089:FPGA
3084:ASIC
2937:SPMD
2932:MIMD
2927:MISD
2920:SWAR
2900:SIMD
2895:SISD
2810:Data
2793:Task
2764:Word
2510:M32R
2455:MIPS
2418:sets
2385:ZISC
2380:NISC
2375:OISC
2370:MISC
2363:EPIC
2358:VLIW
2346:EDGE
2336:RISC
2331:CISC
2240:HUMA
2235:NUMA
1986:ROMP
1954:META
1949:i960
1930:CR16
1854:V850
1846:M32R
1828:MIPS
1423:ISBN
920:and
814:and
793:PA6T
791:The
775:and
747:and
723:e500
719:e200
702:DSPs
557:SFFS
551:Base
538:Base
425:Misc
407:Base
390:and
299:and
253:Base
167:Open
161:CBEA
101:Type
95:RISC
71:2006
64:2006
46:Bits
3847:APM
3842:PMU
3734:CPU
3691:ROM
3462:Bus
3079:PAL
2754:Bit
2540:LMC
2445:ARM
2440:x86
2430:VAX
1809:AVR
1804:ARM
1799:ARC
957:A2O
918:AES
883:A2I
858:).
856:VSX
741:970
737:460
733:440
729:405
637:by
573:AIX
569:ACS
563:LCS
547:SFS
525:or
233:IBM
157:DSP
83:3.1
3946::
3781:3D
1984:,
1980:,
1966:,
1947:,
1884:,
1852:,
1848:,
1821:,
1637:.
1612:.
1456:.
1437:^
1365:^
1295:^
936:.
912:,
767:,
743:,
739:,
735:,
731:,
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462:–
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313:32
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653:)
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52:/
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