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Chiplet

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to create a complex component such as a computer processor. Each chiplet in a computer processor provides only a portion of the processor's functionality. A set of chiplets can be implemented in a mix-and-match
93:, bunch of wires (BoW), AIB, OpenHBI, and OIF XSR. Chiplets not designed by the same company must be designed with interoperability in mind, a daunting task. 313: 380:"RAMP: Research accelerator for multiple processors - a community vision for a shared experimental parallel HW/SW platform" 241: 83: 214: 105: 97: 267: 399: 31:) that contains a well-defined subset of functionality. It is designed to be combined with other chiplets on an 483: 104:
as a component of the RAMP Project (research accelerator for multiple processors) in 2006 extension for the
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Known good die: chiplets can be tested before assembly, improving the yield of the final device.
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Heterogeneous integration: chiplets can be fabricated with different processes, materials, and
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Reusable IP (intellectual property): the same chiplet can be used in many different devices
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Multiple chiplets working together in a single integrated circuit may be called a
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2006 IEEE International Symposium on Performance Analysis of Systems and Software
391: 305: 379: 101: 472: 60: 116: 32: 456:"U.S. Focuses on Invigorating 'Chiplets' to Stay Cutting-Edge in Tech" 436: 416: 121: 44:-like" assembly. This provides several advantages over a traditional 428: 242:"Common Heterogeneous Integration and IP Reuse Strategies (CHIPS)" 189: 268:"Heterogeneous Integration and the Evolution of IC Packaging" 125: 52:) which is monolithic as it comprises a single silicon die: 90: 41: 292:
Bertin, Claude L.; Su, Lo-Soun; Van Horn, Jody (2001).
417:"Accelerating Science Driven System Design With RAMP" 16:
Tiny integrated circuit with a well-defined function
89:Chiplets may be connected with standards such as 470: 291: 63:, each optimized for its particular function 414: 377: 162: 471: 265: 453: 365:"UCIe Goes Back to the Drawing Board" 298:Area Array Interconnection Handbook 13: 447: 300:. SpringerLink. pp. 149–200. 239: 98:University of California, Berkeley 14: 495: 408: 371: 357: 337:"Waiting for Chiplet Standards" 415:Wawrzynek, John (2015-05-01). 378:Patterson, D.A. (March 2006). 343: 329: 285: 259: 233: 220: 207: 182: 156: 1: 149: 7: 392:10.1109/ISPASS.2006.1620784 351:"Is UCIe Really Universal?" 306:10.1007/978-1-4615-1389-6_4 217:" Retrieved 5 December 2022 137: 10: 500: 454:Clark, Don (11 May 2023). 230:Retrieved 5 December 2022 228:Chiplets: A Short History 111:Common examples include: 163:Brookes (25 July 2021). 266:Kenyon (6 April 2021). 226:Don Scansen, EE Times " 96:The term was coined by 294:"Known Good die (KGD)" 128:and later architecture 484:Semiconductor devices 165:"What Is a Chiplet?" 106:Department of Energy 479:Integrated circuits 367:. 22 February 2024. 353:. 22 November 2022. 461:The New York Times 213:Semi Engineering " 25:integrated circuit 315:978-1-4613-5529-8 144:Multi-chip module 72:multi-chip module 491: 465: 441: 440: 412: 406: 405: 375: 369: 368: 361: 355: 354: 347: 341: 340: 339:. 25 March 2021. 333: 327: 326: 324: 322: 289: 283: 282: 280: 278: 263: 257: 256: 254: 252: 237: 231: 224: 218: 211: 205: 204: 202: 200: 186: 180: 179: 177: 175: 160: 84:advanced package 499: 498: 494: 493: 492: 490: 489: 488: 469: 468: 450: 448:Further reading 445: 444: 429:10.2172/1186854 413: 409: 402: 386:. pp. 1–. 376: 372: 363: 362: 358: 349: 348: 344: 335: 334: 330: 320: 318: 316: 290: 286: 276: 274: 272:EE Times Europe 264: 260: 250: 248: 238: 234: 225: 221: 212: 208: 198: 196: 188: 187: 183: 173: 171: 161: 157: 152: 140: 17: 12: 11: 5: 497: 487: 486: 481: 467: 466: 449: 446: 443: 442: 407: 400: 370: 356: 342: 328: 314: 284: 258: 232: 219: 206: 181: 154: 153: 151: 148: 147: 146: 139: 136: 135: 134: 129: 119: 102:John Wawrzynek 68: 67: 64: 57: 46:system on chip 15: 9: 6: 4: 3: 2: 496: 485: 482: 480: 477: 476: 474: 463: 462: 457: 452: 451: 438: 434: 430: 426: 422: 418: 411: 403: 401:1-4244-0186-0 397: 393: 389: 385: 381: 374: 366: 360: 352: 346: 338: 332: 317: 311: 307: 303: 299: 295: 288: 273: 269: 262: 247: 243: 236: 229: 223: 216: 210: 195: 191: 185: 170: 166: 159: 155: 145: 142: 141: 133: 130: 127: 123: 120: 118: 114: 113: 112: 109: 107: 103: 99: 94: 92: 87: 85: 81: 77: 73: 65: 62: 58: 55: 54: 53: 51: 47: 43: 38: 34: 30: 26: 22: 459: 420: 410: 383: 373: 359: 345: 331: 319:. Retrieved 297: 287: 275:. Retrieved 271: 261: 249:. Retrieved 245: 235: 222: 209: 197:. Retrieved 193: 184: 172:. Retrieved 168: 158: 110: 95: 88: 69: 49: 35:in a single 28: 20: 18: 277:28 December 251:28 December 199:28 December 174:28 December 169:How-To Geek 132:NVidia H100 117:Meteor Lake 473:Categories 150:References 100:professor 33:interposer 23:is a tiny 321:7 October 190:"Chiplet" 124:based on 122:AMD Ryzen 76:hybrid IC 240:Keeler. 215:Chiplets 194:WikiChip 138:See also 82:, or an 437:1186854 80:2.5D IC 37:package 21:chiplet 435:  398:  312:  115:Intel 246:DARPA 126:Zen 2 61:nodes 433:OSTI 396:ISBN 323:2022 310:ISBN 279:2021 253:2021 201:2021 176:2021 91:UCIe 42:Lego 425:doi 421:UCB 388:doi 302:doi 50:SoC 475:: 458:. 431:. 423:. 419:. 394:. 382:. 308:. 296:. 270:. 244:. 192:. 167:. 108:. 86:. 78:, 74:, 29:IC 19:A 464:. 439:. 427:: 404:. 390:: 325:. 304:: 281:. 255:. 203:. 178:. 48:( 40:" 27:(

Index

integrated circuit
interposer
package
Lego
system on chip
nodes
multi-chip module
hybrid IC
2.5D IC
advanced package
UCIe
University of California, Berkeley
John Wawrzynek
Department of Energy
Meteor Lake
AMD Ryzen
Zen 2
NVidia H100
Multi-chip module
"What Is a Chiplet?"
"Chiplet"
Chiplets
Chiplets: A Short History
"Common Heterogeneous Integration and IP Reuse Strategies (CHIPS)"
"Heterogeneous Integration and the Evolution of IC Packaging"
"Known Good die (KGD)"
doi
10.1007/978-1-4615-1389-6_4
ISBN
978-1-4613-5529-8

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