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Memory geometry

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25: 106: 254:, while similar from a logical perspective to ranks, are implemented quite differently in physical hardware. Banks are sub-units inside a single memory chip, while ranks are sub-units composed of a subset of the chips on a module. Similar to chip select, banks are selected by bank select bits, which are part of the memory interface. 157:
RAM modules are 'keyed' by indentations on the sides, and along the bottom of the module. This designates the technology, and classification of the modules, for instance whether it is DDR2, or DDR3, and whether it is suitable for desktops, or for servers. Keying was designed to make it difficult to
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that make up each module, or module of RAM. The most important measurement of a chip is its density, measured in bits. Because memory bus width is usually larger than the number of chips, most chips are designed to have width, meaning that they are divided into equal parts internally, and when one
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common in SDR and DDR1–4 families of RAM. A memory of width of 72 would indicate an ECC module, with 8 extra bits in the data width for the error-correcting code syndrome. (The ECC syndrome allows single-bit errors to be corrected). The memory depth is the total memory capacity in bits divided by
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As the next section of this article will cover the logical architecture, which covers the logical structure spanning every populated slot in a system, the physical features of the slots themselves become important. By consulting the documentation of your motherboard, or reading the labels on the
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MT47H128M16 chips with the organization 128 Mib × 16, meaning 128 Mi memory depth and 16-bit-wide data bus per chip; if the module has 8 of these chips on each side of the board, there would be a total of 16 chips × 16-bit-wide data = 256 total bits width of data. For a 64-bit-wide memory data
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Memory geometry describes the logical configuration of a RAM module, but consumers will always find it easiest to grasp the physical configuration. Much of the confusion surrounding memory geometry occurs when the physical configuration obfuscates the logical configuration. The first defining
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address "depth" is called up, instead of returning just one value, more than one value is returned. In addition to the depth, a second addressing dimension has been added at the chip level, banks. Banks allow one bank to be available, while another bank is unavailable because it is
182:). With AMD's release of the Opteron, which integrated the memory controller into the CPU, NUMA systems that share more than one memory controller in a single system have become common in applications that require the power of more than the common desktop. 218:(CS) in low-level addressing. For example, a memory module with 8 chips on each side, with each chip having an 8-bit-wide data bus, would have one rank for each side for a total of 2 ranks, if we define a rank to be 64 bits wide. A module composed of 165:
board itself, you can determine the underlying logical structure of the slots. When there is more than one slot, they are numbered, and when there is more than one channel, the different slots are separated in that way as well – usually color-coded.
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module could be composed of four 8-bit wide (×8) chips. As noted in the memory channel part, one physical module can be made up of one or more logical ranks. If that 32-bit SIMM were composed of eight 8-bit chips the SIMM would have two ranks.
93:. Memory geometry is of concern to consumers upgrading their computers, since older memory controllers may not be compatible with later products. Memory geometry terminology can be confusing because of the number of overlapping terms. 230:
list the configurations they support: "256-Mib, 512-Mib, and 1-Gib DDR2 technologies for ×8 and ×16 devices", "four ranks for all DDR2 devices up to 512-Mibit density", "eight ranks for 1-Gibit DDR2 devices". As an example, take an
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were released, which allowed combining multiple computers that each had their own memory controller such that the software running on them could use I/O devices, memory, and CPU of all participating systems as if they were one unit
204:. Module capacity is equal to the product of the number of ranks and the rank density, and where the rank density is the product of rank depth and rank width. The standard format for expressing this specification is (rank depth) 96:
The geometry of a memory system can be thought of as a multi-dimensional array. Each dimension has its own characteristics and physical realization. For example, the number of data pins on a memory module is one dimension.
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Memory depth is the memory density divided by memory width. Example: for a memory chip with 128 Mib capacity and 8-bit wide data bus, it can be specified as: 16 Meg × 8. Sometimes the "Mi" is dropped, as in 16×8.
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install incorrect modules in a system (but there are more requirements than are embodied in keys). It is important to make sure that the keying of the module matches the key of the slot it is intended to occupy.
243:. Kingston describes each module as composed of 16 "64M×8-bit" chips with each chip having an 8-bit-wide data bus. 16 × 8 equals 128, therefore, each module has two ranks of 64 bits each. So, from the 149:
are populated. Modules with the number of RAM chips equal to some power of two do not support memory error detection or correction. If there are extra RAM chips (between powers of two), these are used for
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This is the highest level. A typical computer has only a single memory controller with only one or two channels. The logical features section described NUMA configurations, which can take the form of a
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Additional, non-memory chips on the module may be an indication that it was designed for high capacity memory systems for servers, and that the module may be incompatible with mass-market systems.
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Some measurements of modules are size, width, speed, and latency. A memory module consists of a multiple of the memory chips to equal the desired module width. So a 32-bit
189:. It is usually important that, for each module in any one channel, there is a logically identical module in the same location on each of the other populated channels. 350:
The memory width specifies the data width of the memory module interface in bits. For example, 64 would indicate a 64-bit data width, as is found on non-ECC
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A memory channel is made up of ranks. Physically a memory channel with just one memory module might present itself as having one or more logical ranks.
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memory width. Sometimes the memory depth is indicated in units of Meg (2), as in 32×64 or 64×64, indicating 32 Mi depth and 64 Mi depth respectively.
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interface, this equates to having 4 ranks, where each rank can be selected by a 2-bit chip select signal. Memory controllers such as the
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The other physical characteristics, determined by physical examination, are the number of memory chips, and whether both sides of the
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Example: a chip with the same capacity and memory width as above but constructed with 4 banks would be specified as 4 Mi × 8 × 4.
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point of view there are four 1 GB modules. At a higher logical level, the MCH also sees two channels, each with four ranks.
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The lowest form of organization covered by memory geometry, sometimes called "memory device". These are the component
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Channels are the highest-level structure at the local memory controller level. Modern computers can have
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Various methods of specifying memory geometry can be encountered, giving different types of information.
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are sub-units of a memory module that share the same address and data buses and are selected by
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can have a two-channel memory controller, giving the system a total of four memory channels.
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DIMM with heat-spreader, DDR2 DIMM without heat-spreader, SO-DIMM DDR2, DDR, SO-DIMM DDR
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KHX6400D2/1G memory modules, where each module has a capacity of 1 
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This is the total memory capacity of the chip. Example: 128 Mib.
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of memory controllers. For example, each socket of a two-socket
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feature of RAM is form factor. RAM modules can be in compact
385:(memory depth per bank) × (memory width) × (number of banks) 398: 351: 291: 273: 197: 139: 105: 323: 205: 616: 122:form for space constrained applications like 257: 332: 312: 16:Internal structure of random-access memory 69:Learn how and when to remove this message 175:cache-coherent non-uniform memory access 142:format, which is used in most desktops. 104: 32:This article includes a list of general 582:(data sheet), Value RAM, archived from 617: 208:× (rank width) × (number of ranks). 100: 89:describes the internal structure of 18: 168: 13: 38:it lacks sufficient corresponding 14: 641: 305:Multi-channel memory architecture 298: 476:, Kingston, 2007, archived from 279: 187:two, three or even more channels 23: 376:(memory depth) × (memory width) 346:(memory depth) × (memory width) 488: 461: 262: 196:space in a module measured in 173:In the 1990s, computers using 1: 454: 409:Dynamic random access memory 235:memory controller with four 7: 513: 392: 200:, or – more generally – in 10: 646: 538:, RAMpedia, archived from 302: 283: 444:Dual-channel architecture 404:List of device bandwidths 340: 258:Hierarchy of organization 333:Memory geometry notation 81:In the design of modern 362: 313:Controller organization 192:Module capacity is the 53:more precise citations. 114: 625:Computing terminology 527:(FAQ), IXT labs, 2006 470:Ultimate Memory Guide 449:Page address register 108: 414:Random-access memory 91:random-access memory 609:(data sheet), Intel 503:Kingston Technology 419:Memory organisation 180:single system image 138:computers, and in 132:embedded computers 115: 220:Micron Technology 136:small form factor 101:Physical features 79: 78: 71: 637: 610: 608: 596: 595: 594: 588: 581: 569: 556: 543: 528: 507: 506: 500: 492: 486: 484: 482: 475: 465: 439:Double-sided RAM 368:(memory density) 169:Logical features 74: 67: 63: 60: 54: 49:this article by 40:inline citations 27: 26: 19: 645: 644: 640: 639: 638: 636: 635: 634: 630:Computer memory 615: 614: 606: 600: 592: 590: 586: 579: 573: 560: 547: 532: 519: 516: 511: 510: 498: 494: 493: 489: 480: 473: 467: 466: 462: 457: 395: 365: 343: 335: 315: 307: 301: 288: 282: 265: 260: 171: 103: 87:memory geometry 75: 64: 58: 55: 45:Please help to 44: 28: 24: 17: 12: 11: 5: 643: 633: 632: 627: 613: 612: 598: 571: 558: 555:, Ars technica 545: 530: 515: 512: 509: 508: 496:"KHX6400D2/1G" 487: 459: 458: 456: 453: 452: 451: 446: 441: 436: 434:Bank switching 431: 426: 424:Memory address 421: 416: 411: 406: 401: 394: 391: 364: 361: 342: 339: 334: 331: 314: 311: 300: 299:Memory channel 297: 284:Main article: 281: 278: 264: 261: 259: 256: 170: 167: 147:memory "stick" 102: 99: 77: 76: 59:September 2010 31: 29: 22: 15: 9: 6: 4: 3: 2: 642: 631: 628: 626: 623: 622: 620: 605: 604: 599: 589:on 2012-03-10 585: 578: 577: 572: 567: 563: 559: 554: 550: 546: 542:on 2010-05-16 541: 537: 536: 531: 526: 522: 518: 517: 504: 497: 491: 483:on 2011-07-13 479: 472: 471: 464: 460: 450: 447: 445: 442: 440: 437: 435: 432: 430: 427: 425: 422: 420: 417: 415: 412: 410: 407: 405: 402: 400: 397: 396: 390: 387: 386: 382: 378: 377: 373: 370: 369: 360: 358: 353: 348: 347: 338: 330: 328: 325: 321: 310: 306: 296: 293: 287: 286:Memory module 280:Memory module 277: 275: 270: 255: 253: 250:In contrast, 248: 246: 242: 238: 234: 229: 226: 221: 217: 213: 209: 207: 203: 199: 195: 190: 188: 183: 181: 176: 166: 162: 159: 155: 153: 148: 143: 141: 137: 133: 129: 125: 121: 112: 107: 98: 94: 92: 88: 84: 73: 70: 62: 52: 48: 42: 41: 35: 30: 21: 20: 602: 591:, retrieved 584:the original 576:KHX6400D2 1G 575: 565: 552: 540:the original 534: 524: 502: 490: 478:the original 469: 463: 388: 384: 383: 379: 375: 374: 371: 367: 366: 356: 349: 345: 344: 336: 316: 308: 289: 266: 249: 210: 191: 184: 172: 163: 160: 156: 144: 116: 95: 86: 80: 65: 56: 37: 429:Memory bank 263:Memory chip 216:chip select 51:introducing 619:Categories 593:2010-08-05 568:, PC guide 455:References 357:non-parity 303:See also: 274:refreshing 34:references 553:RAM guide 525:Mainboard 225:Intel 945 194:aggregate 109:Top L-R, 83:computers 549:"Part 1" 514:External 393:See also 237:Kingston 128:printers 562:"Banks" 320:network 228:Chipset 124:laptops 120:SO-DIMM 47:improve 603:307502 341:Module 134:, and 36:, but 607:(PDF) 587:(PDF) 580:(PDF) 521:"RAM" 499:(PDF) 481:(PDF) 474:(PDF) 352:DIMMs 252:banks 212:Ranks 202:words 198:bytes 399:DIMM 363:Chip 355:the 292:SIMM 233:i945 206:Mbit 140:DIMM 111:DDR2 566:RAM 535:FAQ 324:AMD 269:ICs 245:MCH 241:GiB 152:ECC 621:: 564:, 551:, 523:, 501:. 327:K8 276:. 154:. 130:, 126:, 85:, 611:. 597:. 570:. 557:. 544:. 529:. 505:. 485:. 178:( 72:) 66:( 61:) 57:( 43:.

Index

references
inline citations
improve
introducing
Learn how and when to remove this message
computers
random-access memory

DDR2
SO-DIMM
laptops
printers
embedded computers
small form factor
DIMM
memory "stick"
ECC
cache-coherent non-uniform memory access
single system image
two, three or even more channels
aggregate
bytes
words
Mbit
Ranks
chip select
Micron Technology
Intel 945
Chipset
i945

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