69:
467:
311:
534:) surrounded by programmable logic. These devices let designers concentrate on adding new features to designs without having to worry about making the microprocessor work. Also, the fixed-function microprocessor takes less space on the chip than a part of the programmable gate array implementing the same processor, leaving more space for the programmable gate array to contain the designer's specialized circuits.
27:
684:
logic device families from different manufacturers. Today's device programmers usually can program common PLDs (mostly PAL/GAL equivalents) from all existing manufacturers. Common file formats used to store the boolean logic pattern (fuses) are JEDEC, Altera POF (programmable object file), or Xilinx BITstream.
605:
memory cells, and can be erased and reprogrammed as required. This makes it useful in PLDs that may be reprogrammed frequently, such as PLDs used in prototypes. Flash memory is a kind of EEPROM that holds information using trapped electric charges similar to EPROM. Consequently, flash memory can hold
272:
or PAL. The architecture was simpler than that of
Signetics' FPLA because it omitted the programmable OR array. This made the parts faster, smaller and cheaper. They were available in 20-pin 300-mil DIP packages, while the FPLAs came in 28-pin 600-mil packages. The PAL Handbook demystified the design
191:
introduced a mask-programmable PLA device (DM7575) with 14 inputs and 8 outputs with no memory registers. This was more popular than the TI part but the cost of making the metal mask limited its use. The device is significant because it was the basis for the field programmable logic array produced by
100:
with fixed functions, the function of a PLD is undefined at the time of manufacture. Before the PLD can be used in a circuit it must be programmed to implement the desired function. Compared to fixed logic devices, programmable logic devices simplify the design of complex logic and may offer superior
366:
Some CPLDs are programmed using a PAL programmer, but this method becomes inconvenient for devices with hundreds of pins. A second method of programming is to solder the device to its printed circuit board, then feed it with a serial data stream from a personal computer. The CPLD contains a circuit
245:
A programmable logic array (PLA) has a programmable AND gate array, which links to a programmable OR gate array, which can then be conditionally complemented to produce an output. A PLA is similar to a ROM concept, however a PLA does not provide full decoding of a variable and does not generate all
683:
is used to transfer the boolean logic pattern into the programmable device. In the early days of programmable logic, every PLD manufacturer also produced a specialized device programmer for its family of logic devices. Later, universal device programmers came onto the market that supported several
609:
As of 2005, most CPLDs are electrically programmable and erasable, and non-volatile. This is because they are too small to justify the inconvenience of programming internal SRAM cells every time they start up, and EPROM cells are more expensive due to their ceramic package with a quartz window.
422:
FPGAs are usually programmed after being soldered down to the circuit board, in a manner similar to that of larger CPLDs. In most larger FPGAs, the configuration is volatile and must be re-loaded into the device whenever power is applied or different functionality is required. Configuration is
211:
or PALA. The MMI 5760 was completed in 1976 and could implement multilevel or sequential circuits of over 100 gates. The device was supported by a GE design environment where
Boolean equations would be converted to mask patterns for configuring the device. The part was never brought to market.
594:(metal-oxide semiconductor field-effect transistor, or MOS transistor) that can be switched on by trapping an electric charge permanently on its gate electrode. This is done by a PAL programmer. The charge remains for many years and can only be removed by exposing the chip to strong
582:
Silicon antifuses are connections that are made by applying a voltage across a modified area of silicon inside the chip. They are called antifuses because they work in the opposite way to normal fuses, which begin life as connections until they are broken by an electric current.
586:
SRAM, or static RAM, is a volatile type of memory, meaning that its contents are lost each time the power is switched off. SRAM-based PLDs therefore have to be programmed every time the circuit is switched on. This is usually done automatically by another part of the circuit.
264:
PAL devices have arrays of transistor cells arranged in a "fixed-OR, programmable-AND" plane used to implement "sum-of-products" binary logic equations for each of the outputs in terms of the inputs and either synchronous or asynchronous feedback from the outputs.
337:
and electrically erasable (E) floating gate technology for a high-speed, low-power logic device. A similar device called a PEEL (programmable electrically erasable logic) was introduced by the
International CMOS Technology (ICT) corporation.
72:
A simplified PAL device. The programmable elements (shown as a fuse) connect both the true and complemented inputs to the AND gates. These AND gates, also known as product terms, are ORed together to form a sum-of-products logic
659:
are popular higher-level description languages for more complex devices. The more limited ABEL is often used for historical reasons, but for new designs VHDL is more popular, even for low-complexity designs.
546:
device. The memory is used to store the pattern that was given to the chip during programming. Most of the methods for storing data in an integrated circuit have been adapted for use in PLDs. These include:
405:(FPGA). Early examples of FPGAs are the 82S100 array, and 82S105 sequencer, by Signetics, introduced in the late 1970s. The 82S100 was an array of AND terms. The 82S105 also had flip-flop functions.
515:) is an integrated circuit that comprises an array of PLDs that do not come pre-connected; the connections are programmed electrically by the user. Most GAL and FPGA devices are examples of EPLDs.
234:
read-only associative memory or ROAM. This device, the TMS2000, was programmed by altering the metal layer during the production of the IC. The TMS2000 had up to 17 inputs and 18 outputs with 8
155:
read-only associative memory or ROAM. This device, the TMS2000, was programmed by altering the metal layer during the production of the IC. The TMS2000 had up to 17 inputs and 18 outputs with 8
527:
and other functions that can be altered by code running on the processor. Designing self-altering systems requires that engineers learn new methods, and that new software tools be developed.
1101:
419:
means the device is programmed by the customer, not the manufacturer. FPGAs and gate arrays are similar but gate arrays can only be configured at the factory during fabrication.
273:
process. The PALASM design software (PAL assembler) converted the engineers' Boolean equations into the fuse pattern required to program the part. The PAL devices were soon
891:
Press release on
Intersil IM5200 field programmable logic array. Fourteen inputs pins and 48 product terms. Avalanched-induced-migration programming. Unit price was $ 37.50
322:
in 1985. This device has the same logical properties as the PAL but can be erased and reprogrammed. The GAL is very useful in the prototyping stage of a design, when any
326:
in the logic can be corrected by reprogramming. GALs are programmed and reprogrammed using a PAL programmer, or, in the case of chips that support it, by using the
911:
Press release on
Signetics 82S100 and 82S101 field programmable logic arrays. Fourteen inputs pins, 8 output pins and 48 product terms. NiCr fuse link programming.
48:
397:
While PALs were being developed into GALs and CPLDs (all discussed above), a separate stream of development was happening. This type of device is based on
759:
1712:
176:(PROM) technology. This experimental device improved on IBM's ROAM by allowing multilevel logic. Intel had just introduced the floating-gate
1154:
1109:
341:
Sometimes GAL chips are referred as simple programmable logic device (SPLD), analogous to complex programmable logic device (CPLD) below.
1944:
35:
355:
PALs and GALs are available only in small sizes, equivalent to a few hundred logic gates. For bigger logic circuits, complex PLDs or
446:). CPLDs are meant for simpler designs while FPGAs are meant for more complex designs. In general, CPLDs are a good choice for wide
1982:
1884:
1177:
285:
1987:
380:
1011:
984:
957:
784:
743:
180:
so the researcher at GE incorporated that technology. The GE device was the first erasable PLD ever developed, predating the
1819:
1355:
1325:
1001:
644:
947:
367:
that decodes the data stream and configures the CPLD to perform its specified logic function. Some manufacturers, such as
1932:
1831:
974:
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1705:
1199:
930:
693:
471:
350:
125:
1147:
109:
1878:
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can be used. These contain the equivalent of several PALs linked by programmable interconnections, all in one
2004:
1872:
1385:
1266:
1187:
699:
634:
424:
402:
392:
173:
129:
1698:
601:
Flash memory is non-volatile, retaining its contents even when the power is switched off. It is stored on
2121:
2016:
1380:
1140:
559:
475:
207:(MMI) to develop a mask-programmable logic device incorporating the GE innovations. The device was named
1360:
774:
648:
2036:
1994:
1937:
1922:
1808:
288:
PAL with additional features. After buying out MMI (1987), AMD spun off a consolidated operation as
144:
offered the XC157, a mask-programmed gate array with 12 gates and 30 uncommitted input/output pins.
1949:
1854:
1842:
1622:
1246:
1229:
1214:
1209:
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269:
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117:
113:
90:
1999:
1777:
1772:
1599:
571:
40:
415:, and once stored, the data doesn't change, similar to that of an ordinary gate array. The term
2093:
1890:
1540:
1426:
327:
188:
618:
Many PAL programming devices accept input in a standard file format, commonly referred to as '
2105:
2059:
1927:
1825:
1762:
1550:
1441:
1431:
1256:
493:
s have a quartz window in the package that allows them to be erased on exposure to UV light.
479:
443:
319:
293:
2147:
2031:
2026:
2009:
1729:
1614:
1561:
1446:
1345:
1251:
602:
530:
PLDs are being sold now that contain a microprocessor with a fixed function (the so-called
408:(Remark: 82S100 and similar ICs from Signetics have PLA structure, AND-plane + OR-plane.)
8:
2078:
2021:
1860:
1782:
1757:
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1515:
1241:
1219:
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447:
305:
204:
121:
949:
Electronics, Power
Electronics, Optoelectronics, Microwaves, Electromagnetics, and Radar
184:
EPLD by over a decade. GE obtained several early patents on programmable logic devices.
2098:
2083:
1964:
1802:
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227:
148:
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1182:
169:
93:
318:
An improvement on the PAL was the generic array logic device, or GAL, invented by
105:, programming a PLD changes the connections made between the gates in the device.
1977:
1972:
1954:
1917:
1912:
1837:
1797:
1569:
1073:
1057:
705:
543:
455:
102:
1907:
1671:
524:
871:. Assignee: General Electric, Filed: July 18, 1973, Granted: November 19, 1974
868:
852:
836:
431:
or flash memory. EEPROM versions may be in-system programmable (typically via
363:. CPLDs can replace thousands, or even hundreds of thousands, of logic gates.
2141:
2088:
2071:
2066:
1642:
1627:
1499:
1421:
1308:
451:
438:
The difference between FPGAs and CPLDs is that FPGAs are internally based on
274:
235:
68:
1584:
1574:
1224:
855:. Assignee: General Electric, Filed: April 28, 1972, Granted: June 11, 1974
839:. Assignee: General Electric, Filed: April 28, 1972, Granted: June 18, 1974
823:
Report introduces the TMS2000 and TMS2200 series of mask programmable PLAs.
576:
439:
323:
156:
1085:
1370:
1284:
1192:
630:
595:
172:
Company (GE) was developing a programmable logic device based on the new
108:
PLDs can broadly be categorised into, in increasing order of complexity,
86:
2126:
1792:
1737:
1589:
1520:
1489:
1301:
442:(LUTs), whereas CPLDs form the logic functions with sea-of-gates (e.g.
412:
398:
97:
1690:
1752:
1654:
1649:
1632:
1594:
1401:
1279:
1132:
819:
A Texas
Instruments Application Report: MOS programmable logic arrays
200:
actually beat
Signetics to market but poor yield doomed their part.)
193:
466:
1747:
1742:
1637:
1530:
1461:
1406:
1365:
1330:
1296:
663:
For modern PLD programming languages, design flows, and tools, see
626:
623:
554:
310:
247:
197:
177:
141:
976:
Embedded System Design: A Unified
Hardware / Software Introduction
1604:
1494:
1456:
1320:
1274:
1058:"Digital Electronics 2: Sequential and Arithmetic Logic Circuits"
652:
551:
314:
Lattice GAL 16V8 and 20V8. These are 35 nanosecond devices.
606:
information for years, but possibly not as many years as EPROM.
26:
1666:
1525:
1350:
1234:
1034:
640:
591:
568:
497:
428:
368:
289:
181:
1436:
1416:
1375:
619:
564:
486:
372:
1579:
1291:
664:
656:
432:
376:
356:
334:
1411:
281:
231:
152:
909:(13). Boston, MA: Cahners Publishing: 61. July 20, 1975.
889:(13). Boston, MA: Cahners Publishing: 66. July 20, 1975.
450:
applications, whereas FPGAs are more suitable for large
1102:"PLD Tools Creating SVF, JAM, STAPL and other formats"
920:
729:
727:
651:
are frequently used for low-complexity devices, while
537:
277:
by
National Semiconductor, Texas Instruments and AMD.
523:
These are microprocessor circuits that contain some
973:Vahid, Frank; Givargis, Tony D. (17 October 2001).
858:
842:
826:
724:
268:MMI introduced a breakthrough device in 1978, the
96:. Unlike digital logic constructed using discrete
2139:
801:Motorola Semiconductor Data Book, Fourth Edition
894:
772:
542:A PLD is a combination of a logic device and a
280:After MMI succeeded with the 20-pin PAL parts,
874:
230:developed a mask-programmable IC based on the
151:developed a mask-programmable IC based on the
1706:
1148:
1052:
1050:
972:
914:
812:
810:
793:
736:Horowitz P., Hill W. - The Art of Electronics
733:
613:
1068:
1066:
1713:
1699:
1155:
1141:
1047:
807:
758:: CS1 maint: location missing publisher (
674:
598:light in a device called an EPROM eraser.
203:In 1974 GE entered into an agreement with
126:complex programmable logic devices (CPLDs)
923:Practical Design Using Programmable Logic
850:Multiple Level Associative Logic Circuits
110:simple programmable logic devices (SPLDs)
1063:
921:Pellerin, David; Michael Holley (1991).
834:Electrically Programmable Logic Circuits
465:
309:
67:
51:of all important aspects of the article.
1885:Application-specific integrated circuit
1720:
1028:"Using Flash Memory to Configure FPGAs"
881:"Semiconductors and IC's : FPLA".
734:Horowitz, Paul; Hill, Winfield (2015).
2140:
1162:
1108:. Corelis. Dec 1, 2010. Archived from
816:
130:field-programmable gate arrays (FPGAs)
47:Please consider expanding the lead to
16:Reconfigurable digital circuit element
1694:
1136:
1074:"The Design Warrior's Guide to FPGAs"
821:. Texas Instruments. Bulletin CA-158.
773:Holdsworth, B.; Woods, R. C. (2003).
1820:Three-dimensional integrated circuit
999:
945:
866:Segmented Associative Logic Circuits
803:. Motorola Inc. 1969. p. IC-73.
423:typically stored in a configuration
292:, and that business was acquired by
209:programmable associative logic array
20:
946:Dorf, Richard C. (3 October 2018).
538:How PLDs retain their configuration
13:
1832:Erasable programmable logic device
901:"FPLA's give quick custom logic".
509:erasable programmable logic device
14:
2159:
1867:Complex programmable logic device
1094:
694:Complex programmable logic device
518:
379:to program CPLDs in-circuit from
351:Complex programmable logic device
1000:Chen, Wai-Kai (3 October 2018).
25:
1879:Field-programmable object array
1815:Mixed-signal integrated circuit
1079:
1020:
993:
966:
939:
633:for logic compilers are called
238:for memory. TI coined the term
159:for memory. TI coined the term
39:may be too short to adequately
766:
635:hardware description languages
622:files'. They are analogous to
49:provide an accessible overview
1:
2005:Hardware description language
1873:Field-programmable gate array
925:. Prentice-Hall. p. 15.
817:Andres, Kent (October 1970).
717:
700:Field-programmable gate array
496:Using the same technology as
485:Using the same technology as
403:field-programmable gate array
401:technology and is called the
393:Field-programmable gate array
174:programmable read-only memory
504:can be erased electrically.
7:
2017:Formal equivalence checking
687:
10:
2164:
2037:Hierarchical state machine
1995:Transaction-level modeling
1204:
779:(4th ed.). Elsevier.
590:An EPROM memory cell is a
390:
348:
303:
257:
219:
135:
2114:
2047:
1963:
1938:Digital signal processing
1923:Logic in computer science
1900:
1849:Programmable logic device
1809:Hybrid integrated circuit
1728:
1613:
1560:
1549:
1508:
1482:
1475:
1394:
1265:
1170:
979:. John Wiley & Sons.
738:. New York. p. 764.
614:PLD programming languages
79:programmable logic device
1950:Switching circuit theory
1855:Programmable Array Logic
1843:Programmable logic array
1247:Circuit underutilization
1230:Reconfigurable computing
1128:. Lattice Semiconductor.
711:Programmable array logic
669:reconfigurable computing
629:. The languages used as
461:
386:
344:
270:programmable array logic
260:Programmable array logic
240:programmable logic array
222:Programmable logic array
162:programmable logic array
118:programmable logic array
114:programmable array logic
101:performance. Unlike for
89:component used to build
2000:Register-transfer level
675:PLD programming devices
299:
165:(PLA) for this device.
1891:Tensor Processing Unit
1056:Tertulien Ndjountche.
482:
328:in-circuit programming
315:
284:introduced the 24-pin
253:
215:
196:in 1975, the 82S100. (
189:National Semiconductor
74:
2106:Electronic literature
2060:Hardware acceleration
1928:Computer architecture
1826:Emitter-coupled logic
1763:Printed circuit board
1257:Hardware acceleration
469:
373:Atmel (now Microchip)
333:Lattice GALs combine
320:Lattice Semiconductor
313:
294:Lattice Semiconductor
71:
2032:Finite-state machine
2010:High-level synthesis
1945:Circuit minimization
1447:Microchip Technology
1252:High-level synthesis
1106:JTAG / boundary-scan
776:Digital Logic Design
603:floating-gate MOSFET
411:FPGAs use a grid of
2079:Digital photography
1861:Generic Array Logic
1783:Combinational logic
1758:Printed electronics
1722:Digital electronics
1516:Intel Quartus Prime
1242:Soft microprocessor
869:US Patent 3,849,638
853:US Patent 3,816,725
837:US Patent 3,818,452
448:combinational logic
306:Generic array logic
205:Monolithic Memories
122:generic array logic
2027:Asynchronous logic
1803:Integrated circuit
1768:Electronic circuit
1164:Programmable logic
483:
417:field-programmable
361:integrated circuit
316:
75:
2135:
2134:
2084:Digital telephone
2055:Computer hardware
2022:Synchronous logic
1688:
1687:
1684:
1683:
1680:
1679:
1467:Texas Instruments
1126:"FPGAs and CPLDs"
1112:on March 18, 2012
1013:978-1-4200-0596-7
1003:The VLSI Handbook
986:978-0-471-38678-0
959:978-1-4200-0315-4
786:978-0-7506-4582-9
745:978-0-521-80926-9
681:device programmer
242:for this device.
228:Texas Instruments
149:Texas Instruments
66:
65:
2155:
1788:Sequential logic
1715:
1708:
1701:
1692:
1691:
1558:
1557:
1480:
1479:
1157:
1150:
1143:
1134:
1133:
1129:
1121:
1119:
1117:
1088:
1086:PLD File Formats
1083:
1077:
1072:Clive Maxfield.
1070:
1061:
1054:
1045:
1044:
1042:
1041:
1032:
1024:
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1017:
997:
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964:
963:
943:
937:
936:
918:
912:
910:
898:
892:
890:
878:
872:
864:Greer, David L.
862:
856:
848:Greer, David L.
846:
840:
832:Greer, David L.
830:
824:
822:
814:
805:
804:
797:
791:
790:
770:
764:
763:
757:
749:
731:
170:General Electric
94:digital circuits
61:
58:
52:
29:
21:
2163:
2162:
2158:
2157:
2156:
2154:
2153:
2152:
2138:
2137:
2136:
2131:
2110:
2043:
1978:Place and route
1973:Logic synthesis
1959:
1955:Gate equivalent
1918:Logic synthesis
1913:Boolean algebra
1896:
1838:Macrocell array
1798:Boolean circuit
1724:
1719:
1689:
1676:
1609:
1552:
1545:
1504:
1471:
1390:
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1113:
1100:
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1091:
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1080:
1071:
1064:
1060:. 2016. p. 224.
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808:
799:
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771:
767:
751:
750:
746:
732:
725:
720:
706:Macrocell array
690:
677:
616:
540:
525:fixed functions
521:
464:
456:microprocessors
444:sum of products
395:
389:
353:
347:
308:
302:
262:
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224:
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138:
103:microprocessors
62:
56:
53:
46:
34:This article's
30:
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11:
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2094:cinematography
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1908:Digital signal
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519:Other variants
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452:state machines
440:look-up tables
391:Main article:
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349:Main article:
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304:Main article:
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275:second-sourced
258:Main article:
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91:reconfigurable
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43:the key points
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250:as in a ROM.
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236:JK flip-flops
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157:JK flip-flops
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2048:Applications
1848:
1585:LatticeMico8
1575:ARM Cortex-M
1551:Intellectual
1163:
1114:. Retrieved
1110:the original
1105:
1081:
1038:. Retrieved
1022:
1002:
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577:Flash memory
572:memory cells
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78:
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57:January 2013
54:
38:
36:lead section
18:
2148:Gate arrays
1778:Memory cell
1615:Open-source
1562:Proprietary
1371:Flow to HDL
1193:Logic block
637:, or HDLs.
631:source code
596:ultraviolet
413:logic gates
330:technique.
98:logic gates
2127:Runt pulse
2099:television
1793:Logic gate
1738:Transistor
1730:Components
1590:MicroBlaze
1541:Simulators
1521:Xilinx ISE
1040:2024-08-21
718:References
399:gate array
87:electronic
1983:Placement
1773:Flip-flop
1753:Capacitor
1660:Microwatt
1655:Libre-SOC
1650:Power ISA
1633:OpenCores
1595:PicoBlaze
1402:Accellera
1395:Companies
1267:Languages
754:cite book
627:compilers
555:antifuses
296:in 1999.
226:In 1970,
194:Signetics
168:In 1971,
147:In 1970,
140:In 1969,
41:summarize
2142:Category
1748:Inductor
1743:Resistor
1638:OpenRISC
1553:property
1531:ModelSim
1509:Software
1483:Hardware
1476:Products
1462:Synopsys
1432:Infineon
1407:Achronix
1366:C to HDL
1331:Handel-C
1171:Concepts
1116:July 18,
688:See also
624:software
454:such as
248:minterms
198:Intersil
187:In 1973
178:UV EPROM
142:Motorola
85:) is an
1988:Routing
1822:(3D IC)
1605:Nios II
1495:Stratix
1457:Siemens
1442:Lattice
1427:Cadence
1321:SystemC
1275:Verilog
653:Verilog
552:Silicon
498:EEPROMs
480:package
472:Cypress
383:files.
136:History
1965:Design
1901:Theory
1887:(ASIC)
1881:(FPOA)
1875:(FPGA)
1869:(CPLD)
1834:(EPLD)
1667:RISC-V
1526:Vivado
1500:Virtex
1386:Chisel
1351:PALASM
1235:Xputer
1035:Altera
1010:
983:
956:
929:
783:
742:
702:(FPGA)
696:(CPLD)
641:PALASM
592:MOSFET
569:EEPROM
544:memory
502:EEPLDs
487:EPROMs
429:EEPROM
375:, use
369:Altera
290:Vantis
182:Altera
128:; and
73:array.
2072:radio
1893:(TPU)
1863:(GAL)
1857:(PAL)
1851:(PLD)
1845:(PLA)
1828:(ECL)
1811:(HIC)
1437:Intel
1417:Aldec
1376:MyHDL
1302:VITAL
1031:(PDF)
713:(PAL)
620:JEDEC
565:EPROM
474:in a
462:EPLDs
387:FPGAs
357:CPLDs
345:CPLDs
286:22V10
1805:(IC)
1643:1200
1600:Nios
1580:LEON
1381:ELLA
1361:CUPL
1356:ABEL
1336:Lola
1326:AHDL
1292:VHDL
1225:PSoC
1205:EPLD
1200:CPLD
1188:FPGA
1178:ASIC
1118:2011
1008:ISBN
981:ISBN
954:ISBN
927:ISBN
781:ISBN
760:link
740:ISBN
667:and
665:FPGA
657:VHDL
655:and
649:CUPL
647:and
645:ABEL
560:SRAM
532:core
513:EPLD
491:EPLD
476:PLCC
433:JTAG
425:PROM
381:.JAM
377:JTAG
371:and
335:CMOS
324:bugs
300:GALs
246:the
120:and
1672:Zet
1623:JOP
1570:ARC
1536:VTR
1490:iCE
1452:NXP
1422:Arm
1412:AMD
1346:UPF
1341:PSL
1314:DPI
1297:AMS
1285:AMS
1220:GAL
1215:PAL
1210:PLA
1183:SoC
903:EDN
883:EDN
567:or
507:An
435:).
282:AMD
254:PAL
232:IBM
216:PLA
153:IBM
83:PLD
2144::
1104:.
1065:^
1049:^
1033:.
907:20
905:.
887:20
885:.
809:^
756:}}
752:{{
726:^
679:A
671:.
643:,
500:,
489:,
458:.
427:,
132:.
124:;
116:,
77:A
1714:e
1707:t
1700:v
1280:A
1156:e
1149:t
1142:v
1120:.
1043:.
1016:.
989:.
962:.
935:.
789:.
762:)
748:.
511:(
478:-
81:(
59:)
55:(
45:.
Text is available under the Creative Commons Attribution-ShareAlike License. Additional terms may apply.
