9756:
6072:, released in 2008, a 64-bit, 64-thread implementation conforming to the UltraSPARC Architecture 2007 and to SPARC Version 9 (Level 1). Source code is written in Verilog, and licensed under many licenses. Most OpenSPARC T2 source code is licensed under the GPL. Source based on existing open source projects will continue to be licensed under their current licenses. Binary programs are licensed under a binary Software License Agreement.
234:
8873:
47:
1304:
half-word at the indicated location and then either fill the rest of the target register with zeros (unsigned load or with the value of the uppermost bit of the byte or half-word (signed load). During a store, those instructions discard the upper bits in the register and store only the lower bits. There are also instructions for loading double-precision values used for
611:(JPS1) was released by Fujitsu and Sun, describing processor functions which were identically implemented in the CPUs of both companies ("Commonality"). The first CPUs conforming to JPS1 were the UltraSPARC III by Sun and the SPARC64 V by Fujitsu. Functionalities which are not covered by JPS1 are documented for each processor in "Implementation Supplements".
448:, and at function call/return, this window is moved up and down the register stack. Each window has eight local registers and shares eight registers with each of the adjacent windows. The shared registers are used for passing function parameters and returning values, and the local registers are used for retaining local values across function calls.
1667:(jump and link) instruction is a three-operand instruction, with two operands representing values for the target address and one operand for a register in which to deposit the return address. The address is created by adding the two address operands to produce a 32-bit address. The second address operand may be a constant or a register.
1422:
Arithmetic and logical instructions also use a three-operand format, with the first two being the operands and the last being the location to store the result. The middle operand can be a register or a 13-bit signed integer constant; the other operands are registers. Any of the register operands may
498:
register, thus allowing 8 quad-precision registers. SPARC Version 9 added 16 more double-precision registers (which can also be accessed as 8 quad-precision registers), but these additional registers can not be accessed as single-precision registers. No SPARC CPU implements quad-precision operations
6458:
IMPL. DEP. #2-V8: An Oracle SPARC Architecture implementation may contain from 72 to 640 general-purpose 64-bit R registers. This corresponds to a grouping of the registers into MAXPGL + 1 sets of global R registers plus a circular stack of N_REG_WINDOWS sets of 16 registers each, known as register
883:
All SPARC instructions occupy a full 32-bit word and start on a word boundary. Four formats are used, distinguished by the first two bits. All arithmetic and logical instructions have 2 source operands and 1 destination operand. RD is the "destination register", where the output of the operation is
1643:
The FPU and CP have sets of condition codes separate from the integer condition codes and from each other; two additional sets of branch instructions were defined to test those condition codes. Adding an F to the front of the branch instruction in the list above performs the test against the FPU's
871:
The registers are organized as a set of 64 32-bit registers, with the first 32 being used as the 32-bit floating-point registers, even–odd pairs of all 64 registers being used as the 64-bit floating-point registers, and quad-aligned groups of four floating-point registers being used as the 128-bit
1553:
architecture. This means that a test and branch is normally performed with two instructions; the first is an ALU instruction that sets the condition codes, followed by a branch instruction that examines one of those flags. The SPARC does not have specialized test instructions; tests are performed
1413:
instruction, MEMBAR, serves two interrelated purposes: it articulates order constraints among memory references and facilitates explicit control over the completion of memory references. For example, all effects of the stores that appear prior to the MEMBAR instruction must be made visible to all
1303:
Due to the widespread use of non-32-bit data, such as 16-bit or 8-bit integral data or 8-bit bytes in strings, there are instructions that load and store 16-bit half-words and 8-bit bytes, as well as instructions that load 32-bit words. During a load, those instructions will read only the byte or
334:
The design was turned over to the SPARC International trade group in 1989, and since then its architecture has been developed by its members. SPARC International is also responsible for licensing and promoting the SPARC architecture, managing SPARC trademarks (including SPARC, which it owns), and
726:
A SPARC processor includes an integer unit (IU) that performs integer load, store, and arithmetic operations. It may include a floating-point unit (FPU) that performs floating-point operations and, for SPARC V8, may include a co-processor (CP) that performs co-processor-specific operations; the
1299:
ld ,%L3 !load the 32-bit value at address %L1+%L2 and put the value into %L3 ld ,%L2 !load the value at %L1+8 into %L2 ld ,%L2 !as above, but no offset, which is the same as +%G0 st %L1, !store the value in %L1 into the location stored in %I2 st %G0, !clear the memory at %I1+8
1291:
Load and store instructions have a three-operand format, in that they have two operands representing values for the address and one operand for the register to read or write to. The address is created by adding the two address operands to produce an address. The second address operand may be a
451:
The "scalable" in SPARC comes from the fact that the SPARC specification allows implementations to scale from embedded processors up through large server processors, all sharing the same core (non-privileged) instruction set. One of the architectural parameters that can scale is the number of
1680:
instruction copies its 22-bit immediate operand into the high-order 22 bits of any specified register, and sets each of the low-order 10 bits to 0. In general use, SETHI is followed by an or instruction with only the lower 10 bits of the value set. To ease this, the assembler includes the
385:
On
September 1, 2017, after a round of layoffs that started in Oracle Labs in November 2016, Oracle terminated SPARC design after completing the M8. Much of the processor core development group in Austin, Texas, was dismissed, as were the teams in Santa Clara, California, and Burlington,
754:
will usually be decremented by the SAVE instruction (used by the SAVE instruction during the procedure call to open a new stack frame and switch the register window), or incremented by the RESTORE instruction (switching back to the call before returning from the procedure). Trap events
1675:
As the instruction opcode takes up some bits of the 32-bit instruction word, there is no way to load a 32-bit constant using a single instruction. This is significant because addresses are manipulated through registers and they are 32-bits. To ease this, the special-purpose
1573:(A) bit is used to get rid of some delay slots. If it is 0 in a conditional branch, the delay slot is executed as usual. If it is 1, the delay slot is only executed if the branch is taken. If it is not taken, the instruction following the conditional branch is skipped.
436:. According to the "Oracle SPARC Architecture 2015" specification an "implementation may contain from 72 to 640 general-purpose 64-bit" registers. At any point, only 32 of them are immediately visible to software — 8 are a set of global registers (one of which,
271:
system developed in the early 1980s. First developed in 1986 and released in 1987, SPARC was one of the most successful early commercial RISC systems, and its success led to the introduction of similar RISC designs from many vendors through the 1980s and 1990s.
1659:
offset. As the target address is specifying the start of a word, not a byte, 30-bits is all that is needed to reach any address in the 4 gigabyte address space. The CALL instruction deposits the return address in register R15, also known as output register O7.
554:(V8), an enhanced SPARC architecture definition, was released in 1990. The main differences between V7 and V8 were the addition of integer multiply and divide instructions, and an upgrade from 80-bit "extended-precision" floating-point arithmetic to 128-bit "
1292:
constant or a register. Loads take the value at the address and place it in the register specified by the third operand, whereas stores take the value in the register specified by the first operand and place it at the address. To make this more obvious, the
1695:
The hi and lo macros are performed at assembly time, not runtime, so it has no performance hit yet makes it clearer that L1 is set to a single value, not two unrelated ones. To make this even easier, the assembler also includes a "synthetic instruction",
853:
floating-point number. An even–odd pair of floating-point registers can hold one double-precision IEEE 754 floating-point number, and a quad-aligned group of four floating-point registers can hold one quad-precision IEEE 754 floating-point number.
621:. This includes not only the non-privileged and most of the privileged portions of SPARC V9, but also all the architectural extensions developed through the processor generations of UltraSPARC III, IV IV+ as well as CMT extensions starting with the
6053:, and licensed under many licenses. Most OpenSPARC T1 source code is licensed under the GPL. Source based on existent open source projects will continue to be licensed under their current licenses. Binary programs are licensed under a binary
1308:, reading or writing eight bytes from the indicated register and the "next" one, so if the destination of a load is L1, L1 and L2 will be set. The complete list of load and store instructions for the general-purpose registers in 32-bit SPARC is
739:) variable in the hardware points to the current set. The total size of the register file is not part of the architecture, allowing more registers to be added as the technology improves, up to a maximum of 32 windows in SPARC V7 and V8 as
884:
deposited. The majority of SPARC instructions have at least this register, so it is placed near the "front" of the instruction format. RS1 and RS2 are the "source registers", which may or may not be present, or replaced by a constant.
6607:
There are four situations, however, when the hardware will not successfully complete a floating-point instruction: ... The instruction is not implemented by the hardware (such as ... quad-precision instructions on any SPARC
763:. For SPARC V9, CWP register is decremented during a RESTORE instruction, and incremented during a SAVE instruction. This is the opposite of PSR.CWP's behavior in SPARC V8. This change has no effect on nonprivileged instructions.
7576:
1568:
field specifies the condition being tested. The 22-bit displacement field is the address, relative to the current PC, of the target, in words, so that conditional branches can go forward or backward up to 8 megabytes. The
529:
SPARC V8 architecture is purely big-endian. The 64-bit SPARC V9 architecture uses big-endian instructions, but can access data in either big-endian or little-endian byte order, chosen either at the application instruction
505:
add and subtract instructions perform adds and subtracts on values checking that the bottom two bits of both operands are 0 and reporting overflow if they are not. This can be useful in the implementation of the
6127:
at that time. The K Computer was more powerful than the next five systems on the list combined, and had the highest performance-to-power ratio of any supercomputer system. It also ranked No. 6 in the
7543:
393:-based CPUs), after two "enhanced" versions of Fujitsu's older SPARC M12 server in 2020–22 (formerly planned for 2021) and again in 2026–27, end-of-sale in 2029, of UNIX servers and a year later for their
6677:
6442:
7634:
7415:
8003:
1469:
to set the codes. This is so that the compiler has a way to move instructions around when trying to fill delay slots. If one wants the condition codes to be set, this is indicated by adding
7124:
7383:
8072:
7569:
7974:
6063:, a 64-bit Wishbone compliant CPU core based on the OpenSPARC T1 design. It is a single UltraSPARC V9 core capable of 4-way SMT. Like the T1, the source code is licensed under the GPL.
692:
SPARC architecture has provided continuous application binary compatibility from the first SPARC V7 implementation in 1987 through the Sun UltraSPARC Architecture implementations.
7048:
417:. These original RISC designs were minimalist, including as few features or op-codes as possible and aiming to execute instructions at a rate of almost one instruction per
7730:
452:
implemented register windows; the specification allows from three to 32 windows to be implemented, so the implementation can choose to implement all 32 to provide maximum
1554:
using normal ALU instructions with the destination set to %G0. For instance, to test if a register holds the value 10 and then branch to code that handles it, one would:
1513:
and the multiply instructions use the Y register to hold the upper 32 bits of the product; the divide instructions use it to hold the upper 32 bits of the dividend. The
6893:
Sager, D.; Hinton, G.; Upton, M.; Chappell, T.; Fletcher, T.D.; Samaan, S.; Murray, R. (2001). "A 0.18 μm CMOS IA32 microprocessor with a 4 GHZ integer execution unit".
456:
efficiency, or to implement only three to reduce cost and complexity of the design, or to implement some number between them. Other architectures that include similar
7193:
7536:
7070:
6385:
6049:, released in 2006, a 64-bit, 32-thread implementation conforming to the UltraSPARC Architecture 2005 and to SPARC Version 9 (Level 1). Source code is written in
7692:
614:
At the end of 2003, JPS2 was released to support multicore CPUs. The first CPUs conforming to JPS2 were the UltraSPARC IV by Sun and the SPARC64 VI by
Fujitsu.
10820:
5847:, Weitek, Texas Instruments, Cypress and Temic. A SPARC V7 processor generally consisted of several discrete chips, usually comprising an integer unit (IU), a
7019:
1533:, which divides a 64-bit unsigned dividend by a 64-bit unsigned divisor and produces a 64-bit signed quotient; none of those instructions use the Y register.
8443:
7874:
6352:
6249:
6664:
6638:
1557:
subcc %L1,10,%G0 !subtract 10 from %L1, setting the zero flag if %L1 is 10 be WASEQUAL !if the zero flag is set, branch to the address marked WASEQUAL
339:. SPARC International was intended to grow the SPARC architecture to create a larger ecosystem; SPARC has been licensed to several manufacturers, including
9364:
7605:
6435:
7627:
7159:
7408:
7291:
7260:
7663:
7447:
6319:
1426:
add %L1,%L2,%L3 !add the values in %L1 and %L2 and put the result in %L3 add %L1,1,%L1 !increment %L1 add %G0,%G0,%L4 !clear any value in %L4
1371:
instruction sets the upper bits in the register to the value of the uppermost bit of the word and loads the 32-bit value into the lower bits. The new
735:
The SPARC architecture has an overlapping register window scheme. At any instant, 32 general-purpose registers are visible. A Current Window
Pointer (
9409:
8029:
425:
in many ways, including the lack of instructions such as multiply or divide. Another feature of SPARC influenced by this early RISC movement is the
9792:
7111:
7376:
6594:
568:, the 64-bit SPARC architecture, was released by SPARC International in 1993. It was developed by the SPARC Architecture Committee consisting of
11723:
1461:. One quirk of the SPARC design is that most arithmetic instructions come in pairs, with one version setting the NZVC condition code bits in the
7228:
6087:, a 32-bit, 64-thread SPARC Version 8 implementation, designed for FPGA-based architecture simulation. RAMP Gold is written in ~36,000 lines of
10931:
10114:
9359:
7944:
7966:
1296:
indicates address operands using square brackets with a plus sign separating the operands, instead of using a comma-separated list. Examples:
10633:
2336:
1718:
As noted earlier, the SPARC assembler uses "synthetic instructions" to ease common coding tasks. Additional examples include (among others):
7319:
6620:
538:
level (via an MMU setting). The latter is often used for accessing data from inherently little-endian devices, such as those on PCI buses.
9911:
8147:
7351:
6744:
689:
specification. This revision includes VIS 4 instruction set extensions and hardware-assisted encryption and silicon secured memory (SSM).
10790:
10356:
10173:
9135:
7472:
696:
11728:
11144:
9477:
8425:
6939:
6108:
processors with a new instruction extensions set, called HPC-ACE (High
Performance Computing – Arithmetic Computational Extensions).
494:
registers, providing a total of 32 single-precision registers. An odd–even number pair of double-precision registers can be used as a
10136:
7570:"Hot Chips – August 23–25, 2015 – Conf. Day1 – Oracle's Sonoma Processor: Advanced low-cost SPARC processor for enterprise workloads"
6459:
windows. The number of register windows present (N_REG_WINDOWS) is implementation dependent, within the range of 3 to 32 (inclusive).
4764:
1692:
sethi %hi(0x89ABCDEF),%L1 !sets the upper 22 bits of L1 or %L1,%lo(0x89ABCDEF),%L1 !sets the lower 10 bits of L1 by ORing
1489:, which does one step of a multiplication testing one bit and conditionally adding the multiplicand to the product. This was because
555:
495:
7040:
695:
Among various implementations of SPARC, Sun's SuperSPARC and UltraSPARC-I were very popular, and were used as reference systems for
10785:
6714:
6984:
10857:
7809:
7718:
6136:, the K computer ranked No. 3, using by far the most power of the top three. It ranked No. 85 on the corresponding
1394:
instructions load a single-precision, double-precision, or quad-precision value from memory into a floating-point register; the
11139:
10610:
491:
487:
8042:
671:
project. It was also released under the GNU General public license v2. OpenSPARC T2 is 8 cores, 16 pipelines with 64 threads.
6910:
8082:
8037:
7660:"Oracle's New SPARC Systems Deliver 2-7x Better Performance, Security Capabilities, and Efficiency than Intel-based Systems"
7511:
6407:
11554:
10678:
9941:
9785:
7757:
7180:
849:
A SPARC V8 processor with an FPU includes 32 32-bit floating-point registers, each of which can hold one single-precision
11564:
10705:
6033:
5855:(MMU) and cache memory. Conversely, the Atmel (now Microchip Technology) TSC695 is a single-chip SPARC V7 implementation.
5662:
4933:
8052:
475:
The architecture has gone through several revisions. It gained hardware multiply and divide functionality in version 8.
9832:
9180:
7685:
6871:
6375:
846:
There is also a non-windowed Y register, used by the multiply-step, integer multiply, and integer divide instructions.
410:
10872:
10700:
10673:
10052:
6563:
6084:
699:
CPU95 and CPU2000 benchmarks. The 296 MHz UltraSPARC-II is the reference system for the SPEC CPU2006 benchmark.
11687:
11250:
10143:
10109:
10104:
10023:
9988:
9336:
8156:
8140:
7864:
7009:
6342:
6241:
256:
122:
11662:
11559:
10960:
10867:
10668:
9889:
9778:
9089:
7905:
7833:
7601:
6642:
727:
architecture does not specify what functions a co-processor would perform, other than load and store operations.
577:
7788:
6586:
6485:
1406:
instructions store a single-precision, double-precision, or quad-precision floating-point register into memory.
10688:
10407:
9842:
9699:
9423:
8418:
7149:
1529:, which divides a 64-bit signed dividend by a 64-bit signed divisor and produces a 64-bit signed quotient, and
1509:(signed divide) instructions, with both versions that do not update the condition codes and versions that do.
864:
32 64-bit floating-point registers, each of which can hold one double-precision IEEE 754 floating-point number;
861:
32 32-bit floating-point registers, each of which can hold one single-precision IEEE 754 floating-point number;
7281:
6895:
2001 IEEE International Solid-State
Circuits Conference. Digest of Technical Papers. ISSCC (Cat. No.01CH37177)
6516:
867:
16 128-bit floating-point registers, each of which can hold one quad-precision IEEE 754 floating-point number.
10862:
10710:
10683:
10544:
10158:
10119:
9976:
9170:
7250:
7097:
2325:
1706:
This outputs the two instructions above if the value is larger than 13 bits, otherwise it will emit a single
344:
7659:
7440:
6838:
1423:
point to G0; pointing the result to G0 discards the results, which can be used for tests. Examples include:
11733:
11299:
11061:
10537:
10498:
10153:
10148:
10082:
9894:
9741:
9110:
8971:
6311:
6105:
1479:
add and sub also have another modifier, X, which indicates whether the operation should set the carry bit:
260:
6123:
CPUs, each with eight cores, for a total of 705,024 cores—almost twice as many as any other system in the
10926:
10623:
10321:
10018:
9759:
9549:
9289:
8897:
8133:
1546:
708:
515:
8125:
6824:
6286:
11576:
11223:
10640:
10131:
10099:
9869:
9857:
9837:
9587:
9007:
8106:
8062:
6054:
6037:
5944:
441:
7218:
1359:, clears the upper 32 bits in the register and loads the 32-bit value into the lower 32 bits, and the
546:
There have been three major revisions of the architecture. The first published version was the 32-bit
440:, is hard-wired to zero, so only seven of them are usable as registers) and the other 24 are from the
11743:
11738:
11667:
11630:
11620:
10008:
9725:
9384:
9305:
8411:
1305:
511:
483:
316:
312:
149:
8111:
7927:
11682:
11089:
11025:
11002:
10852:
10814:
10650:
10600:
10595:
10072:
9966:
9874:
9613:
9294:
9053:
9048:
8951:
8838:
678:, which besides the overall update of the reference, adds the VIS 3 instruction set extensions and
208:
17:
7312:
11635:
11418:
11312:
11276:
11193:
11177:
11019:
10808:
10767:
10755:
10618:
10532:
10453:
10218:
9879:
9822:
9597:
8946:
8853:
8620:
8210:
716:
390:
389:
Fujitsu will also discontinue their SPARC production (has already shifted to producing their own
7344:
6736:
759:, exceptions or TRAP instructions) and RETT instructions (returning from traps) also change the
11441:
11413:
11323:
11288:
11037:
11031:
11013:
10747:
10741:
10645:
10549:
10440:
10379:
10241:
9884:
9628:
9140:
8858:
8828:
8384:
7479:
5852:
1644:
condition codes, while, in SPARC V8, adding a C tests the flags in the otherwise undefined CP.
630:
185:
31:
6549:
1521:
instruction writes the value of a general-purpose register to the Y register. SPARC V9 added
11615:
11524:
11270:
10982:
10800:
10559:
10527:
10485:
10397:
10198:
10013:
10003:
9993:
9983:
9953:
9936:
9801:
9462:
9094:
9012:
6926:
6188:
2384:
2331:
604:. Newer specifications always remain compliant with the full SPARC V9 Level 1 specification.
348:
296:
117:
8087:
723:, all instructions operate on the registers, in accordance with the RISC design principles.
11645:
11581:
11167:
10889:
10779:
10726:
10258:
9971:
9827:
9809:
9592:
9329:
9063:
8667:
8608:
8331:
8215:
6967:
6077:
6014:
2353:
6436:"Oracle SPARC Architecture 2015: One Architecture ... Multiple Innovative Implementations"
6169:-based processors developed in China. However, those processors did not contribute to the
8:
11692:
11677:
11497:
11348:
11330:
11294:
11282:
10936:
10883:
10660:
10576:
10458:
10313:
10208:
10067:
8941:
8909:
8872:
8249:
6783:
6702:
6025:
5848:
2389:
1367:, discards the upper 32 bits of the register and stores only the lower 32 bits. The new
531:
502:
479:(addressing and data) were added to the version 9 SPARC specification published in 1994.
405:
The SPARC architecture was heavily influenced by the earlier RISC designs, including the
336:
6624:
6471:
11549:
11541:
11393:
11368:
11172:
11047:
10571:
10512:
10392:
10124:
9852:
9442:
9345:
9058:
8275:
8018:
7602:"Blueprints revealed: Oracle crams Sparc M7 and InfiniBand into cheaper 'Sonoma' chips"
7119:
7014:
6968:"A Third-Generation 65nm 16-Core 32-Thread Plus 32-Scout-Thread CMT SPARC(R) Processor"
6710:
6672:
2579:
2402:
2368:
1493:
can complete over one clock cycle in keeping with the RISC philosophy. SPARC V8 added
1293:
569:
433:
394:
375:
324:
288:
201:
61:
7819:
6120:
5927:
nominal; specification from 100 to 424 MHz depending on attached RAM capabilities
11502:
11469:
11385:
11317:
11218:
11208:
11198:
11129:
11124:
11119:
11042:
10971:
10877:
10837:
10470:
10420:
10370:
10346:
10228:
10168:
10163:
10045:
9961:
9638:
9394:
9258:
9238:
9193:
8234:
7091:
6906:
6559:
6197: — a modified SPARC with multiprocessing support used by the MIT Alewife project
601:
426:
422:
363:. Due to SPARC International, SPARC is fully open, non-proprietary and royalty-free.
360:
6145:
6141:
5346:
5036:
3765:
3713:
3352:
3300:
11672:
11605:
11591:
11446:
11353:
11307:
11114:
11109:
11104:
11099:
11094:
11084:
10954:
10921:
10832:
10827:
10736:
10588:
10583:
10566:
10554:
10493:
10057:
10035:
9921:
9899:
9817:
9693:
9633:
9623:
9618:
9432:
9389:
9273:
9243:
9223:
9017:
8782:
8657:
8529:
8524:
8434:
8360:
6980:
6898:
6864:"Floodgap Retrobits presents the Solbourne Solace: a shrine to the forgotten SPARC"
6376:"Oracle finally decides to stop prolonging the inevitable, begins hardware layoffs"
5964:
4548:
2379:
2348:
2320:
1517:
instruction reads the value of the Y register into a general-purpose register; the
597:
526:
476:
304:
276:
264:
238:
57:
6132:
June 2011 list, with a score of 824.56 MFLOPS/W. In the
November 2012 release of
11586:
11571:
11519:
11423:
11398:
11235:
11228:
11079:
11074:
11069:
11008:
10916:
10906:
10628:
10463:
10415:
10178:
10062:
10030:
9931:
9926:
9847:
9720:
9503:
9322:
9228:
8966:
8539:
8534:
8519:
8514:
8205:
8076:
8066:
8056:
8046:
8033:
8007:
7504:
4232:
4020:
2397:
1652:
1542:
1485:
SPARC V7 does not have multiplication or division instructions, but it does have
1462:
720:
679:
593:
507:
445:
371:
214:
154:
139:
6212:
4126:
685:
In
October 2015, Oracle released SPARC M7, the first processor based on the new
303:
series of processors released in 1992. SPARC V9, released in 1993, introduced a
11697:
11531:
11514:
11507:
11403:
11260:
10997:
10911:
10842:
10425:
10387:
10336:
10331:
10326:
10040:
9864:
9715:
9689:
9664:
9447:
9369:
9150:
8892:
8843:
8739:
8650:
8645:
8603:
8509:
8504:
8499:
8494:
8370:
8341:
8197:
7751:
4601:
3867:
3610:
3507:
1410:
222:
132:
8100:
6902:
1476:
subcc %L1,10,%G0 !compare %L1 to 10 and ignore the result, but set the flags
11717:
11492:
11408:
10448:
10430:
10223:
9916:
9379:
9198:
8762:
8757:
8752:
8723:
8640:
8229:
8181:
8176:
8013:
7970:
6963:
6863:
6555:
6149:
6088:
6069:
6046:
4814:
4391:
4285:
4179:
3404:
2358:
664:
657:
622:
457:
406:
299:
of processors. SPARC V8 added a number of improvements that were part of the
268:
241:
227:
32 (usable as 32 single-precision, 32 double-precision, or 16 quad-precision)
10351:
8121:
A quite an extensive list of operating systems supporting SPARC64 processors
809:
to be handed over to, and returned from, the called subroutine, as its "in"
558:" arithmetic. SPARC V8 served as the basis for IEEE Standard 1754-1994, an
11702:
11640:
11456:
11433:
11245:
10966:
9904:
9659:
9577:
9467:
9203:
8823:
8635:
8630:
8546:
8489:
8318:
8225:
8120:
7255:
7223:
7154:
7075:
7005:
6380:
6092:
418:
6209: — a Russian quad-core microprocessor based on SPARC V9 specification
6005:
In
October 2015, Oracle announced a "Linux for SPARC reference platform".
875:
Floating-point registers are not windowed; they are all global registers.
11487:
11451:
11162:
11134:
10992:
10847:
9770:
9518:
9452:
9155:
9079:
8936:
8833:
8677:
8662:
8336:
8313:
8155:
6029:
5960:
5952:
5293:
4494:
3248:
284:
11373:
11363:
11358:
11340:
11240:
11213:
10475:
10308:
10278:
9998:
9572:
9528:
9457:
9437:
9374:
9268:
9027:
8991:
8956:
8914:
8718:
8713:
8708:
8682:
8576:
8571:
8355:
8351:
8288:
7843:
6112:
5999:
5995:
5717:
5657:
5607:
4928:
4878:
4338:
3095:
3043:
2790:
2685:
2632:
674:
In August 2012, Oracle
Corporation made available a new specification,
522:
461:
453:
308:
300:
161:
7778:
6475:
837:
handed over from the caller, and returned to the caller, as its "out"
633:
1 and VIS 2 instruction set extensions and the associated GSR register
11464:
11461:
11203:
10273:
10251:
9643:
9404:
9399:
9314:
9160:
9043:
8986:
8813:
8615:
8556:
8551:
8346:
8308:
8292:
8244:
6975:
6216:
6166:
6066:
6043:
5844:
5088:
4073:
2738:
2374:
2363:
756:
668:
585:
581:
469:
356:
166:
8374:
6506:
617:
In early 2006, Sun released an extended architecture specification,
11479:
10298:
9680:
9582:
9523:
9482:
9472:
9248:
9233:
9188:
9145:
9084:
8848:
8818:
8777:
8772:
8767:
8625:
8596:
8591:
8586:
8581:
8403:
8392:
8239:
8220:
8200:
7895:
7869:
7814:
6191: — a SPARC microprocessor developer during the 1980s and 1990s
6155:
6137:
6129:
5968:
5550:
5398:
5141:
4983:
4706:
1525:, which multiplies two 64-bit values and produces a 64-bit result,
850:
379:
233:
2315:
The following organizations have licensed the SPARC architecture:
1414:
processors before any loads following the MEMBAR can be executed.
636:
multiple levels of global registers, controlled by the GL register
10288:
10246:
9533:
9165:
8981:
8961:
8926:
8703:
8672:
8566:
8561:
8479:
8388:
8379:
8280:
8171:
7286:
7188:
6935:
6206:
6194:
6170:
6163:
6060:
6050:
5980:
5976:
5956:
4759:
2483:
2478:
2342:
589:
573:
414:
367:
352:
328:
320:
518:, and similar languages that might use a tagged integer format.
397:
and end-of-support in 2034 "to promote customer modernization".
366:
As of 2024, the latest commercial high-end SPARC processors are
10303:
10268:
10233:
9554:
9513:
9487:
9263:
8365:
8285:
8265:
8256:
8115:
7939:
7900:
7838:
7834:"Top500 List – November 2012 | TOP500 Supercomputer Sites"
7783:
6512:
6159:
6133:
6124:
6116:
5984:
5948:
2413:
1482:
addx %L1,100,%L1 !add 100 to the value in %L1 and track carry
535:
7967:"U.S. says China building 'entirely indigenous' supercomputer"
6278:
6119:
June 2011 and
November 2011 lists. It combines 88,128 SPARC64
6028:, SPARC V8 implementation, designed especially for space use.
10761:
10293:
9508:
9115:
8976:
8919:
8902:
8887:
8803:
8484:
8474:
8469:
8464:
8326:
8323:
6839:"SPARC64 IXfx Extensions Fujitsu Limited Ver 12, 2 Dec. 2013"
6347:
6182:
5988:
5972:
5940:
2304:
test whether the value in a register is > 0, 0, or < 0
642:
privileged instructions ALLCLEAN, OTHERW, NORMALW, and INVALW
465:
340:
292:
280:
46:
6162:
No. 1 as of November 2014) has a number of nodes with
1375:
instruction loads a 64-bit value into the register, and the
374:(introduced in September 2017 for its SPARC M12 server) and
11625:
10773:
10693:
10283:
9253:
8931:
8808:
8787:
8260:
8252:
8092:
8023:
6200:
6021:
5843:
Various SPARC V7 implementations were produced by Fujitsu,
5712:
5602:
4873:
4654:
559:
9564:
10213:
10203:
9022:
7998:
7932:
6481:
1550:
1465:, and the other not setting them, with the default being
311:
processors in 1995. Later, SPARC processors were used in
267:. Its design was strongly influenced by the experimental
7062:
6892:
6547:
7919:
7865:"The Green500 List – November 2012 | The Green500"
6002:
to the SPARC architecture, but it was later cancelled.
1700:, that performs these two operations in a single line:
444:
of registers. These 24 registers form what is called a
382:
introduced in September 2017 for its high-end servers.
6778:
6776:
6774:
6772:
6770:
6768:
6766:
6764:
6762:
6543:
6541:
6539:
6537:
6535:
6533:
2407:
Systems & Processes Engineering Corporation (SPEC)
7141:
6998:
6621:"Sun Accelerates Growth of UltraSPARC CMT Eco System"
7537:"Oracle's SPARC T7 and SPARC M7 Server Architecture"
7173:
7104:
7033:
6343:"Sun set: Oracle closes down last Sun product lines"
432:
The SPARC processor usually contains as many as 160
7274:
6956:
6759:
6530:
562:standard for a 32-bit microprocessor architecture.
7210:
6897:. San Francisco, CA, USA: IEEE. pp. 324–325.
6080:simulator for the SPARC architecture also exists:
1916:compare two registers, set codes, discard results
1576:There are a wide variety of conditional branches:
6919:
6017:implementations of the SPARC architecture exist:
645:access to the VER register is now hyperprivileged
11715:
7857:
7802:
7568:Vinaik, Basant; Puri, Rahoul (August 24, 2015).
7181:"SPARC Enterprise M-series Servers Architecture"
6962:
6341:Vaughan-Nichols, Steven J. (September 5, 2017).
6306:
6304:
1379:instruction stores all 64 bits of the register.
652:In 2007, Sun released an updated specification,
7251:"Fujitsu parades 16-core Sparc64 super stunner"
7242:
6657:
6340:
2310:
1651:(jump to subroutine) instruction uses a 30-bit
1541:Conditional branches test condition codes in a
843:SPARC registers are shown in the figure above.
7888:
7826:
7771:
7282:"Fujitsu Launches PRIMEHPC FX10 Supercomputer"
7249:Morgan, Timothy Prickett (November 21, 2011),
6008:
9786:
9330:
8419:
8141:
7148:Morgan, Timothy Prickett (December 3, 2010),
6301:
6242:"Fujitsu to take ARM into the realm of Super"
2345:(and its Fujitsu Microelectronics subsidiary)
2337:European Space Research and Technology Center
307:architecture and was first released in Sun's
7217:Morgan, Timothy Prickett (August 22, 2011),
7079:, archived from the original on May 17, 2009
6966:; Chaudhry, Shailender (February 19, 2008),
6430:
6428:
1848:set the half-word at memory address to zero
1545:, as seen in many instruction sets such the
10791:Computer performance by orders of magnitude
9136:Common Development and Distribution License
7710:
6591:Numerical Computation Guide – Sun Studio 10
5934:
1351:In SPARC V9, registers are 64-bit, and the
857:A SPARC V9 processor with an FPU includes:
795:always the same ones, G0 being zero always
490:registers. Each of them can be used as two
9800:
9793:
9779:
9337:
9323:
8871:
8426:
8412:
8148:
8134:
7744:
7716:
7567:
6273:
6271:
6269:
6267:
6236:
6234:
6232:
5830:
5828:
648:the SIR instruction is now hyperprivileged
279:architecture (SPARC V7) was used in Sun's
45:
8043:Sun – UltraSPARC Processors Documentation
7964:
7753:Project: Linux for SPARC - oss.oracle.com
6548:Weaver, D. L.; Germond, T., eds. (1994).
6499:
6425:
6203: — a space rated SPARC V8 processor.
6104:For HPC loads Fujitsu builds specialized
5939:SPARC machines have generally used Sun's
1713:
1560:In a conditional branch instruction, the
1429:The list of mathematical instructions is
275:The first implementation of the original
8102:SPARC Version 9, lecture by David Ditzel
7719:"Intergraph to Port Windows NT to SPARC"
7505:"M7: Next Generation SPARC. Hotchips 26"
7010:"Sun Is Said to Cancel Big Chip Project"
6785:The SPARC Architecture Manual, Version 8
6551:The SPARC Architecture Manual, Version 9
2002:copy value from one register to another
232:
8088:SPARC processor images and descriptions
8073:Oracle SPARC and Solaris Public Roadmap
7965:Thibodeau, Patrick (November 4, 2010).
7666:from the original on September 18, 2017
7421:from the original on September 26, 2018
6819:
6817:
6815:
6813:
6811:
6809:
6807:
6805:
6803:
6683:from the original on September 24, 2015
6477:Using the GNU Compiler Collection (GCC)
6388:from the original on September 12, 2017
6373:
6355:from the original on September 10, 2017
6264:
6229:
6185: — based on SPARC V7 specification
5825:
1873:set the byte at memory address to zero
14:
11724:Computer-related introductions in 1985
11716:
9344:
8053:Sun – FOSS Open Hardware Documentation
7947:from the original on February 25, 2021
7698:from the original on February 28, 2019
7263:from the original on November 24, 2011
7248:
7231:from the original on November 30, 2011
7216:
7147:
6717:from the original on September 5, 2015
6639:"OpenSPARC Frequently Asked Questions"
6464:
5804:
2466:
878:
823:truly local to the current subroutine
9774:
9318:
8407:
8129:
7977:from the original on October 11, 2012
7760:from the original on December 8, 2015
7549:from the original on November 6, 2015
7517:from the original on October 31, 2014
7294:from the original on January 18, 2012
7071:"Fujitsu unveils world's fastest CPU"
7068:
7022:from the original on November 4, 2011
7004:
6987:from the original on January 16, 2013
6945:from the original on January 18, 2012
6928:FX1 Key Features & Specifications
6874:from the original on December 1, 2020
6747:from the original on January 21, 2019
6597:from the original on January 25, 2022
2193:decrement a register, set conditions
2119:increment a register, set conditions
213:31 (G0 = 0; non-global registers use
10762:Floating-point operations per second
8433:
8024:Hypervisor/Sun4v Reference Materials
8019:OpenSPARC Architecture specification
8004:Oracle SPARC Processor Documentation
7640:from the original on August 29, 2017
7608:from the original on August 29, 2017
7582:from the original on October 9, 2022
6800:
6737:"Software in Silicon Cloud - Oracle"
6488:from the original on January 9, 2013
4444:UltraSPARC T2 Plus (Victoria Falls)
2375:Matsushita Electrical Industrial Co.
2045:copy constant value into a register
1580:(branch always, essentially a jmp),
663:In December 2007, Sun also made the
8036: (archived April 3, 2019), and
8030:V, VI, VII, VIIIfx, IXfx Extensions
7453:from the original on April 22, 2016
7357:from the original on April 22, 2016
7130:from the original on April 24, 2016
6587:"SPARC Behavior and Implementation"
6448:from the original on April 24, 2016
6322:from the original on August 6, 2016
6289:from the original on April 24, 2019
1286:
24:
7958:
7791:from the original on June 23, 2011
7733:from the original on July 23, 2014
7389:from the original on March 8, 2017
7199:from the original on March 4, 2016
7162:from the original on March 7, 2012
6623:. Sun Microsystems. Archived from
6441:. Draft D1.0.0. January 12, 2016.
6374:Nichols, Shaun (August 31, 2017).
6252:from the original on June 30, 2019
5834:Threads per core × number of cores
3970:UltraSPARC III Cu (Cheetah+)
2773:2.5/3.3–5.0 V, 2.5–3.3 V
2420:
1670:
667:processor's RTL available via the
411:University of California, Berkeley
25:
11755:
11729:SPARC microprocessor architecture
8069: (archived February 27, 2011)
7992:
7925:
7908:from the original on May 26, 2015
7877:from the original on June 6, 2016
7717:McLaughlin, John (July 7, 1993),
7325:from the original on May 18, 2015
7150:"Ellison: Sparc T4 due next year"
7051:from the original on May 23, 2013
6519:from the original on May 23, 2013
6099:
5774:
2436:
1417:
609:Joint Programming Specification 1
291:systems, replacing their earlier
27:RISC instruction set architecture
11688:Semiconductor device fabrication
9755:
9754:
8157:Reduced instruction set computer
8059: (archived December 9, 2011)
8049: (archived January 14, 2010)
8010: (archived October 13, 2019)
6825:"SPARC Fundamental Instructions"
6788:. SPARC International, Inc. 1992
6700:
6665:"Oracle SPARC Architecture 2011"
5786:
5748:
5745:
5742:
5739:
5736:
5721:
5688:
5636:
5633:
5630:
5627:
4959:
4904:
4901:
4898:
4855:
4849:
4846:
4843:
4700:
4697:
4679:
4676:
4529:
4523:
4476:
4473:
4367:
4173:
4120:
3949:
3943:
3861:
3849:
3846:
3843:
3840:
3837:
3811:
3796:
3793:
3790:
3778:
3759:
3744:
3741:
3686:
3683:
3663:UltraSPARC IIi (IIe+) (Phantom)
3636:
3633:
3583:
3457:UltraSPARC IIs (Sapphire-Black)
3398:
3383:
3380:
3346:
3343:
3322:
3294:
3291:
3270:
3227:
3224:
3221:
3177:
3022:
3019:
3016:
2975:
2969:
2922:
2919:
2916:
2822:
2819:
2816:
2769:
2763:
2760:
2757:
2711:
2614:
2611:
2608:
2605:
2599:
2561:
2558:
2552:
2514:
2511:
2505:
2448:
421:. This made them similar to the
257:reduced instruction set computer
11663:History of general-purpose CPUs
9890:Nondeterministic Turing machine
8094:The Rough Guide to MBus Modules
7842:, November 2012, archived from
7678:
7652:
7620:
7594:
7561:
7529:
7497:
7465:
7433:
7401:
7369:
7337:
7305:
7041:"Fujitsu shows off SPARC64 VII"
6886:
6856:
6831:
6729:
6694:
6631:
6613:
6593:. Sun Microsystems, Inc. 2004.
6579:
6140:release. Newer HPC processors,
5921:
5912:
5903:
5894:
5885:
5876:
5867:
5858:
5837:
5801:
2463:
1959:compare register with constant
1281:
702:
253:Scalable Processor ARChitecture
9843:Deterministic finite automaton
7069:Barak, Sylvie (May 14, 2009),
6400:
6367:
6334:
5771:
3560:UltraSPARC IIi (Sapphire-Red)
2846:Fujitsu MB86904 / Sun STP1012
2433:
1071:Displacement constant 22 bits
1051:Displacement constant 22 bits
1031:Displacement constant 22 bits
713:register–register architecture
687:Oracle SPARC Architecture 2015
676:Oracle SPARC Architecture 2011
13:
1:
10634:Simultaneous and heterogenous
9171:Open Source University Meetup
9080:Sun Microsystems Laboratories
7478:. fujitsu.com. Archived from
6554:. SPARC International, Inc.:
6223:
5967:have also been used, such as
5810:
5807:
2472:
2469:
2326:Bipolar Integrated Technology
1823:set a memory address to zero
1722:SPARC synthetic instructions
743:is 5 bits and is part of the
639:Sun's 64-bit MMU architecture
345:Bipolar Integrated Technology
11318:Integrated memory controller
11300:Translation lookaside buffer
10499:Memory dependence prediction
9942:Random-access stored program
9895:Probabilistic Turing machine
9742:Oracle Certification Program
8079: (archived May 25, 2018)
6508:SPARC Optimizations With GCC
5798:
5783:
5780:
2460:
2445:
2442:
2311:SPARC architecture licensees
2267:two's complement a register
2230:flip the bits in a register
1536:
730:
654:UltraSPARC Architecture 2007
619:UltraSPARC Architecture 2005
261:instruction set architecture
7:
10774:Synaptic updates per second
9290:The Network is the Computer
7818:, June 2011, archived from
6176:
6009:Open source implementations
2691:TI TMX390Z50 / Sun STP1020
2369:Matra Harris Semiconductors
1604:(less or equal, unsigned),
1547:IBM System/360 architecture
1275:Immediate constant 13 bits
1226:Immediate constant 13 bits
1131:Immediate constant 13 bits
1011:Immediate constant 22 bits
682:to the 2007 specification.
400:
323:) servers produced by Sun,
95:; 37 years ago
82:; 38 years ago
10:
11760:
11178:Heterogeneous architecture
10100:Orthogonal instruction set
9870:Alternating Turing machine
9858:Quantum cellular automaton
8490:SPARCstation/server/center
7441:"Fujitsu Presentation pdf"
6215: — a Chinese 16-core
6152:and FX100 supercomputers.
6148:, were included in recent
6115:ranked No. 1 in the
6055:software license agreement
5795:
2457:
1274:
1225:
1130:
1081:
1070:
1050:
1030:
1010:
895:
888:SPARC instruction formats
872:floating-point registers.
541:
29:
11668:Microprocessor chronology
11655:
11631:Dynamic frequency scaling
11604:
11540:
11478:
11432:
11384:
11339:
11259:
11186:
11155:
11060:
10981:
10945:
10899:
10799:
10786:Cache performance metrics
10725:
10659:
10609:
10520:
10511:
10484:
10439:
10406:
10378:
10369:
10189:
10092:
10081:
9952:
9808:
9750:
9735:Education and recognition
9734:
9708:
9673:
9652:
9606:
9563:
9542:
9496:
9421:
9352:
9303:
9282:
9216:
9179:
9131:
9124:
9103:
9072:
9036:
9000:
8972:Sun Secure Global Desktop
8880:
8869:
8796:
8691:
8457:
8450:
8441:
8301:
8190:
8164:
8014:SPARC Technical Documents
7999:SPARC International, Inc.
7096:: CS1 maint: unfit URL (
6903:10.1109/ISSCC.2001.912658
6408:"Roadmap: Fujitsu Global"
6091:, and licensed under the
6036:, and licensed under the
5789:
3920:UltraSPARC III (Cheetah)
2564:
2517:
2451:
2282:
2272:
2245:
2235:
2208:
2198:
2171:
2161:
2134:
2124:
2097:
2087:
2060:
2050:
2023:
2007:
1980:
1964:
1937:
1921:
1894:
1878:
1860:
1853:
1835:
1828:
1810:
1803:
1776:
1766:
1745:
1738:
1707:
1697:
1686:
1682:
1677:
1664:
1648:
1637:
1633:
1629:
1625:
1621:
1617:
1613:
1609:
1605:
1601:
1597:
1593:
1589:
1585:
1581:
1577:
1530:
1526:
1522:
1518:
1514:
1510:
1506:
1502:
1498:
1494:
1490:
1486:
1470:
1458:
1454:
1450:
1446:
1442:
1438:
1434:
1430:
1403:
1399:
1395:
1391:
1387:
1383:
1376:
1372:
1368:
1364:
1360:
1356:
1352:
1345:
1341:
1337:
1333:
1329:
1325:
1321:
1317:
1313:
1309:
1306:floating-point arithmetic
1268:
1265:
1262:
1259:
1251:
1248:
1242:
1239:
1236:
1233:
1219:
1216:
1213:
1210:
1202:
1199:
1193:
1190:
1187:
1184:
1176:
1173:
1170:
1167:
1164:
1161:
1153:
1150:
1147:
1144:
1141:
1138:
1124:
1121:
1118:
1115:
1107:
1104:
1098:
1095:
1092:
1089:
1082:PC-relative displacement
1078:
1067:
1064:
1058:
1047:
1044:
1038:
1027:
1024:
1018:
1007:
1004:
1001:
892:
660:implementation complied.
434:general-purpose registers
317:non-uniform memory access
313:symmetric multiprocessing
221:
207:
200:
192:
181:
173:
160:
148:
138:
128:
116:
108:
76:
68:
53:
44:
11683:Hardware security module
11026:Digital signal processor
11003:Graphics processing unit
10815:Graphics processing unit
9295:Write once, run anywhere
8839:System Service Processor
8097:(SuperSPARC, hyperSPARC)
7219:"Oracle's Sparc T4 chip"
6641:. Oracle. Archived from
5935:Operating system support
3357:Fujitsu (HAL) MBCS70301
3198:hyperSPARC (Colorado 4)
2993:hyperSPARC (Colorado 3)
2943:SuperSPARC II (Voyager)
2893:hyperSPARC (Colorado 2)
499:in hardware as of 2024.
482:In SPARC version 8, the
263:originally developed by
11636:Dynamic voltage scaling
11419:Memory address register
11313:Branch target predictor
11277:Address generation unit
11020:Physics processing unit
10809:Central processing unit
10768:Transactions per second
10756:Instructions per second
10679:Array processing (SIMT)
9823:Stored-program computer
8854:Ultra Port Architecture
7896:"Tianhe-2 (MilkyWay-2)"
7473:"Fujitsu Global Images"
7409:"Oracle SPARC products"
5787:Transistors (millions)
2449:Transistors (millions)
1798:set a register to zero
1549:and successors and the
1505:(unsigned divide), and
1449:, and negated versions
717:load/store instructions
709:load–store architecture
11442:Hardwired control unit
11324:Memory management unit
11289:Memory management unit
11038:Secure cryptoprocessor
11032:Tensor Processing Unit
11014:Vision processing unit
10748:Cycles per instruction
10742:Instructions per cycle
10689:Associative processing
10380:Instruction pipelining
9802:Processor technologies
9141:Java Community Process
9008:StorageTek 5800 System
8859:Visual Instruction Set
7928:"Tesla Supercomputing"
7628:"Documents at Fujitsu"
7510:. swisdev.oracle.com.
5955:including derivatives
5853:memory management unit
3460:Sun STP1032 / STP1034
2843:microSPARC II (Swift)
1714:Synthetic instructions
1703:set 0x89ABCDEF,% L1
1328:(unsigned half-word),
245:
32:SPARC (disambiguation)
11525:Sum-addressed decoder
11271:Arithmetic logic unit
10398:Classic RISC pipeline
10352:Epiphany architecture
10199:Motorola 68000 series
9543:Programming languages
9095:Project Looking Glass
8083:Fujitsu SPARC Roadmap
7779:"TOP500 List (1-100)"
7604:. theregister.co.uk.
6938:, February 19, 2008,
6703:"SPARC M7 Innovation"
6515:, February 23, 2004,
6189:Ross Technology, Inc.
2565:0–128 (unified)
2518:0–128 (unified)
2385:Metaflow Technologies
2332:Cypress Semiconductor
2156:decrement a register
2082:increment a register
1689:macros. For example:
1497:(unsigned multiply),
1363:instruction, renamed
1355:instruction, renamed
486:register file has 16
349:Cypress Semiconductor
297:Motorola 68000 series
295:systems based on the
244:microprocessor (1997)
236:
196:Yes, and royalty free
11646:Performance per watt
11224:replacement policies
10890:Package on a package
10780:Performance per watt
10684:Pipelined processing
10454:Tomasulo's algorithm
10259:Clipper architecture
10115:Application-specific
9828:Finite-state machine
9385:Héctor García-Molina
9054:Visualization System
9049:Constellation System
8159:(RISC) architectures
8038:X / X+ Specification
7846:on November 13, 2012
7756:, October 12, 2015,
7723:The Florida SunFlash
7686:"SPARC M8 Processor"
7290:, November 7, 2011,
7112:"Sparc T3 processor"
6627:on January 26, 2008.
6246:The CPU Shack Museum
5998:announced a port of
3148:UltraSPARC (Hornet)
2354:HAL Computer Systems
1616:(greater unsigned),
1612:(greater or equal),
1473:to the instruction:
1332:(signed half-word),
1113:Arithmetic immediate
680:hyperprivileged mode
30:For other uses, see
11734:Sun microprocessors
11678:Digital electronics
11331:Instruction decoder
11283:Floating-point unit
10937:Soft microprocessor
10884:System in a package
10459:Reservation station
9989:Transport-triggered
9709:Computer appliances
9353:Corporate directors
8942:Java Desktop System
7810:"The Green500 List"
7345:"Images of SPARC64"
7047:, August 28, 2008,
6645:on October 17, 2012
6283:SPARC International
5918:excluding I/O buses
5849:floating-point unit
2390:Philips Electronics
1723:
1501:(signed multiply),
1344:(store half-word),
1087:Arithmetic register
889:
879:Instruction formats
768:
750:In SPARC V7 and V8
607:In 2002, the SPARC
337:conformance testing
112:V9 (1993) / OSA2017
41:
11550:Integrated circuit
11394:Processor register
11048:Baseband processor
10393:Operand forwarding
9853:Cellular automaton
9726:Big Data Appliance
9365:H. Raymond Bingham
9346:Oracle Corporation
8829:Modular Datacenter
8444:Acquired by Oracle
7120:Oracle Corporation
7015:The New York Times
6711:Oracle Corporation
6673:Oracle Corporation
6026:radiation-tolerant
5900:max. @500 MHz
3820:Fujitsu MBCS80523
3718:Fujitsu SFCB81147
2580:Solbourne Computer
2403:Solbourne Computer
1721:
1636:(overflow clear),
1294:assembler language
887:
767:Window Addressing
766:
715:); except for the
570:Amdahl Corporation
534:) level or at the
409:I and II from the
246:
188:1.0, 2.0, 3.0, 4.0
177:8 KB (4 KB → 8 KB)
62:Oracle Corporation
39:
11711:
11710:
11600:
11599:
11219:Instruction cache
11209:Scratchpad memory
11056:
11055:
11043:Network processor
10972:Network on a chip
10927:Ultra-low-voltage
10878:Multi-chip module
10721:
10720:
10507:
10506:
10494:Branch prediction
10471:Register renaming
10365:
10364:
10347:VISC architecture
10169:Quantum computing
10164:VISC architecture
10046:Secondary storage
9962:Microarchitecture
9922:Register machines
9768:
9767:
9674:Computer hardware
9653:Operating systems
9614:Fusion Middleware
9414:Naomi O. Seligman
9395:Jeffrey O. Henley
9312:
9311:
9259:Procom Technology
9239:Lighthouse Design
9212:
9211:
9194:Andy Bechtolsheim
9013:StorageTek SL8500
8867:
8866:
8744:UltraSPARC III Cu
8621:Blade workstation
8401:
8400:
7873:, November 2012,
7377:"Oracle Products"
7008:(June 15, 2009),
6912:978-0-7803-6608-4
6844:. p. 103-104
6316:cpu-collection.de
6248:. June 21, 2016.
5965:operating systems
5815:
5814:
5509:OSA201? / HPC-ACE
5305:OSA2011 / HPC-ACE
5100:OSA2011 / HPC-ACE
4986:(Yosemite Falls)
4822:
4547:UltraSPARC "RK" (
2308:
2307:
1600:(less or equal),
1320:(unsigned byte),
1279:
1278:
841:
840:
711:(also known as a
602:Texas Instruments
460:features include
427:branch delay slot
423:MIPS architecture
361:Texas Instruments
231:
230:
16:(Redirected from
11751:
11744:64-bit computers
11739:32-bit computers
11673:Processor design
11565:Power management
11447:Instruction unit
11308:Branch predictor
11257:
11256:
10955:System on a chip
10897:
10896:
10737:Transistor count
10661:Flynn's taxonomy
10518:
10517:
10376:
10375:
10179:Addressing modes
10090:
10089:
10036:Memory hierarchy
9900:Hypercomputation
9818:Abstract machine
9795:
9788:
9781:
9772:
9771:
9758:
9757:
9598:Developer Studio
9566:
9390:Joseph Grundfest
9339:
9332:
9325:
9316:
9315:
9244:Montalvo Systems
9224:Afara Websystems
9129:
9128:
8875:
8668:Java Workstation
8658:SPARC Enterprise
8455:
8454:
8435:Sun Microsystems
8428:
8421:
8414:
8405:
8404:
8150:
8143:
8136:
8127:
8126:
8103:
8028:Fujitsu SPARC64
7987:
7986:
7984:
7982:
7962:
7956:
7955:
7954:
7952:
7936:
7923:
7917:
7916:
7915:
7913:
7892:
7886:
7885:
7884:
7882:
7861:
7855:
7854:
7853:
7851:
7830:
7824:
7823:
7806:
7800:
7799:
7798:
7796:
7775:
7769:
7768:
7767:
7765:
7748:
7742:
7741:
7740:
7738:
7714:
7708:
7707:
7705:
7703:
7697:
7690:
7682:
7676:
7675:
7673:
7671:
7656:
7650:
7649:
7647:
7645:
7639:
7632:
7624:
7618:
7617:
7615:
7613:
7598:
7592:
7591:
7589:
7587:
7581:
7575:. hotchips.org.
7574:
7565:
7559:
7558:
7556:
7554:
7548:
7541:
7533:
7527:
7526:
7524:
7522:
7516:
7509:
7501:
7495:
7494:
7492:
7490:
7484:
7477:
7469:
7463:
7462:
7460:
7458:
7452:
7445:
7437:
7431:
7430:
7428:
7426:
7420:
7413:
7405:
7399:
7398:
7396:
7394:
7388:
7381:
7373:
7367:
7366:
7364:
7362:
7356:
7349:
7341:
7335:
7334:
7332:
7330:
7324:
7317:
7309:
7303:
7302:
7301:
7299:
7278:
7272:
7271:
7270:
7268:
7246:
7240:
7239:
7238:
7236:
7214:
7208:
7207:
7206:
7204:
7198:
7185:
7177:
7171:
7170:
7169:
7167:
7145:
7139:
7138:
7137:
7135:
7129:
7116:
7108:
7102:
7101:
7095:
7087:
7086:
7084:
7066:
7060:
7059:
7058:
7056:
7037:
7031:
7030:
7029:
7027:
7002:
6996:
6995:
6994:
6992:
6981:Sun Microsystems
6972:
6960:
6954:
6953:
6952:
6950:
6944:
6933:
6923:
6917:
6916:
6890:
6884:
6883:
6881:
6879:
6868:www.floodgap.com
6860:
6854:
6853:
6851:
6849:
6843:
6835:
6829:
6828:
6821:
6798:
6797:
6795:
6793:
6780:
6757:
6756:
6754:
6752:
6733:
6727:
6726:
6724:
6722:
6698:
6692:
6691:
6690:
6688:
6682:
6676:, May 21, 2014,
6669:
6661:
6655:
6654:
6652:
6650:
6635:
6629:
6628:
6617:
6611:
6610:
6604:
6602:
6583:
6577:
6576:
6574:
6572:
6545:
6528:
6527:
6526:
6524:
6503:
6497:
6496:
6495:
6493:
6468:
6462:
6461:
6455:
6453:
6447:
6440:
6432:
6423:
6422:
6420:
6418:
6404:
6398:
6397:
6395:
6393:
6371:
6365:
6364:
6362:
6360:
6338:
6332:
6331:
6329:
6327:
6308:
6299:
6298:
6296:
6294:
6275:
6262:
6261:
6259:
6257:
6238:
6219:-based processor
5928:
5925:
5919:
5916:
5910:
5907:
5901:
5898:
5892:
5889:
5883:
5880:
5874:
5871:
5865:
5862:
5856:
5841:
5835:
5832:
5772:Frequency (MHz)
5766:Name (codename)
4818:
4709:(Rainbow Falls)
3817:SPARC64 IV
3048:Fujitsu MB86907
2743:Fujitsu MB8683x
2434:Frequency (MHz)
2428:Name (codename)
2425:
2424:
2380:Meiko Scientific
2349:Gaisler Research
2321:Afara Websystems
2301:
2300:
2297:
2294:
2291:
2288:
2285:
2279:
2278:
2275:
2264:
2263:
2260:
2257:
2254:
2251:
2248:
2242:
2241:
2238:
2227:
2226:
2223:
2220:
2217:
2214:
2211:
2205:
2204:
2201:
2190:
2189:
2186:
2183:
2180:
2177:
2174:
2168:
2167:
2164:
2153:
2152:
2149:
2146:
2143:
2140:
2137:
2131:
2130:
2127:
2116:
2115:
2112:
2109:
2106:
2103:
2100:
2094:
2093:
2090:
2079:
2078:
2075:
2072:
2069:
2066:
2063:
2057:
2056:
2053:
2042:
2041:
2038:
2035:
2032:
2029:
2026:
2020:
2019:
2016:
2013:
2010:
1999:
1998:
1995:
1992:
1989:
1986:
1983:
1977:
1976:
1973:
1970:
1967:
1956:
1955:
1952:
1949:
1946:
1943:
1940:
1934:
1933:
1930:
1927:
1924:
1913:
1912:
1909:
1906:
1903:
1900:
1897:
1891:
1890:
1887:
1884:
1881:
1870:
1869:
1866:
1863:
1857:
1856:
1845:
1844:
1841:
1838:
1832:
1831:
1820:
1819:
1816:
1813:
1807:
1806:
1795:
1794:
1791:
1788:
1785:
1782:
1779:
1773:
1772:
1769:
1758:
1757:
1754:
1751:
1748:
1742:
1741:
1724:
1720:
1710:with the value.
1709:
1699:
1688:
1684:
1679:
1666:
1650:
1640:(overflow set).
1639:
1635:
1631:
1627:
1623:
1619:
1615:
1611:
1607:
1603:
1599:
1595:
1591:
1587:
1584:(branch never),
1583:
1579:
1532:
1528:
1524:
1520:
1516:
1512:
1508:
1504:
1500:
1496:
1492:
1488:
1472:
1460:
1456:
1452:
1448:
1444:
1440:
1436:
1432:
1405:
1401:
1397:
1393:
1389:
1385:
1378:
1374:
1370:
1366:
1362:
1358:
1354:
1348:(store double).
1347:
1343:
1339:
1335:
1331:
1327:
1323:
1319:
1315:
1311:
1287:Loads and stores
890:
886:
778:Register address
769:
765:
625:implementation:
598:Sun Microsystems
492:single-precision
488:double-precision
331:, among others.
265:Sun Microsystems
215:register windows
103:
101:
96:
90:
88:
83:
72:64-bit (32 → 64)
58:Sun Microsystems
49:
42:
38:
21:
11759:
11758:
11754:
11753:
11752:
11750:
11749:
11748:
11714:
11713:
11712:
11707:
11693:Tick–tock model
11651:
11607:
11596:
11536:
11520:Address decoder
11474:
11428:
11424:Program counter
11399:Status register
11380:
11335:
11295:Load–store unit
11262:
11255:
11182:
11151:
11052:
11009:Image processor
10984:
10977:
10947:
10941:
10917:Microcontroller
10907:Embedded system
10895:
10795:
10728:
10717:
10655:
10605:
10503:
10480:
10464:Re-order buffer
10435:
10416:Data dependency
10402:
10361:
10191:
10185:
10084:
10083:Instruction set
10077:
10063:Multiprocessing
10031:Cache hierarchy
10024:Register/memory
9948:
9848:Queue automaton
9804:
9799:
9769:
9764:
9746:
9730:
9721:Oracle Exalogic
9704:
9669:
9648:
9629:WebLogic Server
9602:
9559:
9538:
9504:Oracle Database
9492:
9417:
9410:Donald L. Lucas
9348:
9343:
9313:
9308:
9299:
9278:
9229:Cobalt Networks
9208:
9175:
9120:
9099:
9068:
9032:
8996:
8876:
8863:
8792:
8747:UltraSPARC IIIi
8687:
8446:
8437:
8432:
8402:
8397:
8297:
8186:
8160:
8154:
8101:
8077:Wayback Machine
8067:Wayback Machine
8057:Wayback Machine
8047:Wayback Machine
8034:Wayback Machine
8008:Wayback Machine
7995:
7990:
7980:
7978:
7963:
7959:
7950:
7948:
7930:
7924:
7920:
7911:
7909:
7894:
7893:
7889:
7880:
7878:
7863:
7862:
7858:
7849:
7847:
7832:
7831:
7827:
7822:on July 3, 2011
7808:
7807:
7803:
7794:
7792:
7777:
7776:
7772:
7763:
7761:
7750:
7749:
7745:
7736:
7734:
7715:
7711:
7701:
7699:
7695:
7688:
7684:
7683:
7679:
7669:
7667:
7658:
7657:
7653:
7643:
7641:
7637:
7633:. fujitsu.com.
7630:
7626:
7625:
7621:
7611:
7609:
7600:
7599:
7595:
7585:
7583:
7579:
7572:
7566:
7562:
7552:
7550:
7546:
7539:
7535:
7534:
7530:
7520:
7518:
7514:
7507:
7503:
7502:
7498:
7488:
7486:
7485:on May 18, 2015
7482:
7475:
7471:
7470:
7466:
7456:
7454:
7450:
7446:. fujitsu.com.
7443:
7439:
7438:
7434:
7424:
7422:
7418:
7411:
7407:
7406:
7402:
7392:
7390:
7386:
7379:
7375:
7374:
7370:
7360:
7358:
7354:
7350:. fujitsu.com.
7347:
7343:
7342:
7338:
7328:
7326:
7322:
7318:. fujitsu.com.
7315:
7313:"Ixfx Download"
7311:
7310:
7306:
7297:
7295:
7280:
7279:
7275:
7266:
7264:
7247:
7243:
7234:
7232:
7215:
7211:
7202:
7200:
7196:
7183:
7179:
7178:
7174:
7165:
7163:
7146:
7142:
7133:
7131:
7127:
7114:
7110:
7109:
7105:
7089:
7088:
7082:
7080:
7067:
7063:
7054:
7052:
7039:
7038:
7034:
7025:
7023:
7003:
6999:
6990:
6988:
6970:
6961:
6957:
6948:
6946:
6942:
6931:
6925:
6924:
6920:
6913:
6891:
6887:
6877:
6875:
6862:
6861:
6857:
6847:
6845:
6841:
6837:
6836:
6832:
6823:
6822:
6801:
6791:
6789:
6782:
6781:
6760:
6750:
6748:
6735:
6734:
6730:
6720:
6718:
6707:Oracle web site
6699:
6695:
6686:
6684:
6680:
6667:
6663:
6662:
6658:
6648:
6646:
6637:
6636:
6632:
6619:
6618:
6614:
6600:
6598:
6585:
6584:
6580:
6570:
6568:
6566:
6546:
6531:
6522:
6520:
6505:
6504:
6500:
6491:
6489:
6472:"SPARC Options"
6470:
6469:
6465:
6451:
6449:
6445:
6438:
6434:
6433:
6426:
6416:
6414:
6412:www.fujitsu.com
6406:
6405:
6401:
6391:
6389:
6372:
6368:
6358:
6356:
6339:
6335:
6325:
6323:
6312:"Fujitsu SPARC"
6310:
6309:
6302:
6292:
6290:
6277:
6276:
6265:
6255:
6253:
6240:
6239:
6230:
6226:
6179:
6102:
6011:
5937:
5932:
5931:
5926:
5922:
5917:
5913:
5908:
5904:
5899:
5895:
5890:
5886:
5881:
5877:
5872:
5868:
5863:
5859:
5842:
5838:
5833:
5826:
5805:L1 Icache (KB)
5802:L1 Dcache (KB)
5357:JPS2 / HPC-ACE2
4503:2400–2880
4450:1200–1600
4400:1000–1600
4383:4096–6144
4347:2150–2400
4294:1000–1400
4241:1500–2100
4188:1050–1350
4135:1650–2160
4082:1100–1350
4029:1064–1593
4021:UltraSPARC IIIi
3499:1024–8192
2467:L1 Icache (KB)
2464:L1 Dcache (KB)
2423:
2421:Implementations
2418:
2398:Ross Technology
2313:
2298:
2295:
2292:
2289:
2286:
2283:
2276:
2273:
2261:
2258:
2255:
2252:
2249:
2246:
2239:
2236:
2224:
2221:
2218:
2215:
2212:
2209:
2202:
2199:
2187:
2184:
2181:
2178:
2175:
2172:
2165:
2162:
2150:
2147:
2144:
2141:
2138:
2135:
2128:
2125:
2113:
2110:
2107:
2104:
2101:
2098:
2091:
2088:
2076:
2073:
2070:
2067:
2064:
2061:
2054:
2051:
2039:
2036:
2033:
2030:
2027:
2024:
2017:
2014:
2011:
2008:
1996:
1993:
1990:
1987:
1984:
1981:
1974:
1971:
1968:
1965:
1953:
1950:
1947:
1944:
1941:
1938:
1931:
1928:
1925:
1922:
1910:
1907:
1904:
1901:
1898:
1895:
1888:
1885:
1882:
1879:
1867:
1864:
1861:
1854:
1842:
1839:
1836:
1829:
1817:
1814:
1811:
1804:
1792:
1789:
1786:
1783:
1780:
1777:
1770:
1767:
1755:
1752:
1749:
1746:
1739:
1716:
1704:
1693:
1673:
1671:Large constants
1653:program counter
1628:(carry clear),
1558:
1543:status register
1539:
1483:
1477:
1463:status register
1427:
1420:
1336:(load double),
1324:(signed byte),
1301:
1289:
1284:
1257:LD/ST immediate
1056:C Branch format
1036:F Branch format
1016:I Branch format
881:
733:
719:used to access
705:
656:, to which the
594:Ross Technology
566:SPARC version 9
552:SPARC version 8
548:SPARC version 7
544:
446:register window
403:
386:Massachusetts.
209:General-purpose
99:
97:
94:
92:
86:
84:
81:
35:
28:
23:
22:
15:
12:
11:
5:
11757:
11747:
11746:
11741:
11736:
11731:
11726:
11709:
11708:
11706:
11705:
11700:
11698:Pin grid array
11695:
11690:
11685:
11680:
11675:
11670:
11665:
11659:
11657:
11653:
11652:
11650:
11649:
11643:
11638:
11633:
11628:
11623:
11618:
11612:
11610:
11602:
11601:
11598:
11597:
11595:
11594:
11589:
11584:
11579:
11574:
11569:
11568:
11567:
11562:
11557:
11546:
11544:
11538:
11537:
11535:
11534:
11532:Barrel shifter
11529:
11528:
11527:
11522:
11515:Binary decoder
11512:
11511:
11510:
11500:
11495:
11490:
11484:
11482:
11476:
11475:
11473:
11472:
11467:
11459:
11454:
11449:
11444:
11438:
11436:
11430:
11429:
11427:
11426:
11421:
11416:
11411:
11406:
11404:Stack register
11401:
11396:
11390:
11388:
11382:
11381:
11379:
11378:
11377:
11376:
11371:
11361:
11356:
11351:
11345:
11343:
11337:
11336:
11334:
11333:
11328:
11327:
11326:
11315:
11310:
11305:
11304:
11303:
11297:
11286:
11280:
11274:
11267:
11265:
11254:
11253:
11248:
11243:
11238:
11233:
11232:
11231:
11226:
11221:
11216:
11211:
11206:
11196:
11190:
11188:
11184:
11183:
11181:
11180:
11175:
11170:
11165:
11159:
11157:
11153:
11152:
11150:
11149:
11148:
11147:
11137:
11132:
11127:
11122:
11117:
11112:
11107:
11102:
11097:
11092:
11087:
11082:
11077:
11072:
11066:
11064:
11058:
11057:
11054:
11053:
11051:
11050:
11045:
11040:
11035:
11029:
11023:
11017:
11011:
11006:
11000:
10998:AI accelerator
10995:
10989:
10987:
10979:
10978:
10976:
10975:
10969:
10964:
10961:Multiprocessor
10958:
10951:
10949:
10943:
10942:
10940:
10939:
10934:
10929:
10924:
10919:
10914:
10912:Microprocessor
10909:
10903:
10901:
10900:By application
10894:
10893:
10887:
10881:
10875:
10870:
10865:
10860:
10855:
10850:
10845:
10843:Tile processor
10840:
10835:
10830:
10825:
10824:
10823:
10812:
10805:
10803:
10797:
10796:
10794:
10793:
10788:
10783:
10777:
10771:
10765:
10759:
10753:
10752:
10751:
10739:
10733:
10731:
10723:
10722:
10719:
10718:
10716:
10715:
10714:
10713:
10703:
10698:
10697:
10696:
10691:
10686:
10681:
10671:
10665:
10663:
10657:
10656:
10654:
10653:
10648:
10643:
10638:
10637:
10636:
10631:
10629:Hyperthreading
10621:
10615:
10613:
10611:Multithreading
10607:
10606:
10604:
10603:
10598:
10593:
10592:
10591:
10581:
10580:
10579:
10574:
10564:
10563:
10562:
10557:
10547:
10542:
10541:
10540:
10535:
10524:
10522:
10515:
10509:
10508:
10505:
10504:
10502:
10501:
10496:
10490:
10488:
10482:
10481:
10479:
10478:
10473:
10468:
10467:
10466:
10461:
10451:
10445:
10443:
10437:
10436:
10434:
10433:
10428:
10423:
10418:
10412:
10410:
10404:
10403:
10401:
10400:
10395:
10390:
10388:Pipeline stall
10384:
10382:
10373:
10367:
10366:
10363:
10362:
10360:
10359:
10354:
10349:
10344:
10341:
10340:
10339:
10337:z/Architecture
10334:
10329:
10324:
10316:
10311:
10306:
10301:
10296:
10291:
10286:
10281:
10276:
10271:
10266:
10261:
10256:
10255:
10254:
10249:
10244:
10236:
10231:
10226:
10221:
10216:
10211:
10206:
10201:
10195:
10193:
10187:
10186:
10184:
10183:
10182:
10181:
10171:
10166:
10161:
10156:
10151:
10146:
10141:
10140:
10139:
10129:
10128:
10127:
10117:
10112:
10107:
10102:
10096:
10094:
10087:
10079:
10078:
10076:
10075:
10070:
10065:
10060:
10055:
10050:
10049:
10048:
10043:
10041:Virtual memory
10033:
10028:
10027:
10026:
10021:
10016:
10011:
10001:
9996:
9991:
9986:
9981:
9980:
9979:
9969:
9964:
9958:
9956:
9950:
9949:
9947:
9946:
9945:
9944:
9939:
9934:
9929:
9919:
9914:
9909:
9908:
9907:
9902:
9897:
9892:
9887:
9882:
9877:
9872:
9865:Turing machine
9862:
9861:
9860:
9855:
9850:
9845:
9840:
9835:
9825:
9820:
9814:
9812:
9806:
9805:
9798:
9797:
9790:
9783:
9775:
9766:
9765:
9763:
9762:
9751:
9748:
9747:
9745:
9744:
9738:
9736:
9732:
9731:
9729:
9728:
9723:
9718:
9716:Oracle Exadata
9712:
9710:
9706:
9705:
9703:
9702:
9697:
9683:
9677:
9675:
9671:
9670:
9668:
9667:
9665:Oracle Solaris
9662:
9656:
9654:
9650:
9649:
9647:
9646:
9641:
9636:
9631:
9626:
9621:
9616:
9610:
9608:
9604:
9603:
9601:
9600:
9595:
9590:
9585:
9580:
9575:
9569:
9567:
9561:
9560:
9558:
9557:
9552:
9546:
9544:
9540:
9539:
9537:
9536:
9531:
9526:
9521:
9516:
9511:
9506:
9500:
9498:
9494:
9493:
9491:
9490:
9485:
9480:
9475:
9470:
9465:
9460:
9455:
9450:
9445:
9440:
9435:
9429:
9427:
9422:Acquisitions (
9419:
9418:
9416:
9415:
9412:
9407:
9402:
9397:
9392:
9387:
9382:
9377:
9372:
9370:Michael Boskin
9367:
9362:
9356:
9354:
9350:
9349:
9342:
9341:
9334:
9327:
9319:
9310:
9309:
9304:
9301:
9300:
9298:
9297:
9292:
9286:
9284:
9280:
9279:
9277:
9276:
9271:
9266:
9261:
9256:
9251:
9246:
9241:
9236:
9231:
9226:
9220:
9218:
9214:
9213:
9210:
9209:
9207:
9206:
9201:
9196:
9191:
9185:
9183:
9177:
9176:
9174:
9173:
9168:
9163:
9158:
9153:
9151:OpenOffice.org
9148:
9143:
9138:
9132:
9126:
9122:
9121:
9119:
9118:
9113:
9107:
9105:
9101:
9100:
9098:
9097:
9092:
9087:
9082:
9076:
9074:
9070:
9069:
9067:
9066:
9061:
9056:
9051:
9046:
9040:
9038:
9034:
9033:
9031:
9030:
9025:
9020:
9015:
9010:
9004:
9002:
8998:
8997:
8995:
8994:
8989:
8984:
8979:
8974:
8969:
8964:
8959:
8954:
8949:
8944:
8939:
8934:
8929:
8924:
8923:
8922:
8912:
8907:
8906:
8905:
8895:
8890:
8884:
8882:
8878:
8877:
8870:
8868:
8865:
8864:
8862:
8861:
8856:
8851:
8846:
8844:SPARC T series
8841:
8836:
8831:
8826:
8821:
8816:
8811:
8806:
8800:
8798:
8794:
8793:
8791:
8790:
8785:
8780:
8775:
8770:
8765:
8760:
8755:
8750:
8749:
8748:
8745:
8740:UltraSPARC III
8737:
8736:
8735:
8732:
8731:UltraSPARC IIi
8729:
8728:UltraSPARC IIe
8721:
8716:
8711:
8706:
8701:
8695:
8693:
8689:
8688:
8686:
8685:
8680:
8675:
8670:
8665:
8660:
8655:
8654:
8653:
8648:
8643:
8638:
8633:
8623:
8618:
8613:
8612:
8611:
8601:
8600:
8599:
8594:
8589:
8584:
8579:
8574:
8569:
8564:
8554:
8549:
8544:
8543:
8542:
8537:
8532:
8527:
8522:
8517:
8512:
8507:
8502:
8497:
8487:
8482:
8477:
8472:
8467:
8461:
8459:
8452:
8448:
8447:
8442:
8439:
8438:
8431:
8430:
8423:
8416:
8408:
8399:
8398:
8396:
8395:
8382:
8377:
8371:Motorola 88000
8368:
8363:
8358:
8349:
8344:
8339:
8334:
8329:
8321:
8316:
8311:
8305:
8303:
8299:
8298:
8296:
8295:
8283:
8278:
8273:
8268:
8263:
8247:
8242:
8237:
8232:
8223:
8218:
8213:
8208:
8203:
8198:Analog Devices
8194:
8192:
8188:
8187:
8185:
8184:
8179:
8174:
8168:
8166:
8162:
8161:
8153:
8152:
8145:
8138:
8130:
8124:
8123:
8118:
8109:
8098:
8090:
8085:
8080:
8070:
8060:
8050:
8040:
8026:
8021:
8016:
8011:
8001:
7994:
7993:External links
7991:
7989:
7988:
7957:
7918:
7887:
7856:
7825:
7801:
7770:
7743:
7709:
7691:. oracle.com.
7677:
7662:. oracle.com.
7651:
7619:
7593:
7560:
7542:. oracle.com.
7528:
7496:
7464:
7432:
7414:. oracle.com.
7400:
7382:. oracle.com.
7368:
7336:
7304:
7273:
7241:
7209:
7192:, April 2011,
7172:
7140:
7103:
7061:
7032:
6997:
6964:Tremblay, Marc
6955:
6918:
6911:
6885:
6855:
6830:
6799:
6758:
6741:www.oracle.com
6728:
6693:
6656:
6630:
6612:
6578:
6564:
6529:
6498:
6463:
6424:
6399:
6366:
6333:
6300:
6263:
6227:
6225:
6222:
6221:
6220:
6213:Galaxy FT-1500
6210:
6204:
6198:
6192:
6186:
6178:
6175:
6164:Galaxy FT-1500
6101:
6100:Supercomputers
6098:
6097:
6096:
6074:
6073:
6064:
6058:
6041:
6032:is written in
6013:Several fully
6010:
6007:
5936:
5933:
5930:
5929:
5920:
5911:
5909:@1200 MHz
5902:
5893:
5884:
5875:
5866:
5857:
5836:
5823:
5822:
5813:
5812:
5811:L3 cache (KB)
5809:
5808:L2 cache (KB)
5806:
5803:
5800:
5797:
5794:
5791:
5790:Die size (mm)
5788:
5785:
5782:
5781:Total threads
5779:
5776:
5775:Arch. version
5773:
5770:
5767:
5763:
5762:
5759:
5756:
5753:
5750:
5747:
5744:
5741:
5738:
5735:
5732:
5729:
5726:
5723:
5720:
5718:Cobham Gaisler
5715:
5709:
5708:
5705:
5702:
5699:
5696:
5693:
5690:
5687:
5684:
5681:
5678:
5675:
5672:
5669:
5666:
5660:
5654:
5653:
5650:
5647:
5644:
5641:
5638:
5635:
5632:
5629:
5626:
5623:
5620:
5617:
5614:
5611:
5608:Cobham Gaisler
5605:
5599:
5598:
5595:
5592:
5589:
5586:
5583:
5580:
5577:
5574:
5571:
5568:
5565:
5562:
5559:
5556:
5553:
5547:
5546:
5543:
5540:
5537:
5534:
5531:
5528:
5525:
5522:
5519:
5516:
5513:
5510:
5507:
5504:
5501:
5497:
5496:
5493:
5490:
5487:
5484:
5481:
5478:
5475:
5472:
5469:
5466:
5463:
5460:
5457:
5454:
5451:
5447:
5446:
5443:
5440:
5437:
5434:
5431:
5428:
5425:
5422:
5419:
5416:
5413:
5410:
5407:
5404:
5401:
5395:
5394:
5391:
5388:
5385:
5382:
5379:
5376:
5373:
5370:
5367:
5364:
5361:
5358:
5355:
5352:
5349:
5343:
5342:
5339:
5336:
5333:
5330:
5327:
5324:
5321:
5318:
5315:
5312:
5309:
5306:
5303:
5300:
5297:
5290:
5289:
5286:
5283:
5280:
5277:
5274:
5271:
5268:
5265:
5262:
5259:
5256:
5253:
5250:
5247:
5244:
5240:
5239:
5236:
5233:
5230:
5227:
5224:
5221:
5218:
5215:
5212:
5209:
5206:
5203:
5200:
5197:
5194:
5190:
5189:
5186:
5183:
5180:
5177:
5174:
5171:
5168:
5165:
5162:
5159:
5156:
5153:
5150:
5147:
5144:
5138:
5137:
5134:
5131:
5128:
5125:
5122:
5119:
5116:
5113:
5110:
5107:
5104:
5101:
5098:
5095:
5092:
5085:
5084:
5081:
5078:
5075:
5072:
5069:
5066:
5063:
5060:
5057:
5054:
5051:
5048:
5047:JPS2 / HPC-ACE
5045:
5042:
5039:
5033:
5032:
5029:
5026:
5023:
5020:
5017:
5014:
5011:
5008:
5005:
5002:
4999:
4996:
4993:
4990:
4987:
4980:
4979:
4976:
4973:
4970:
4967:
4964:
4961:
4958:
4955:
4952:
4949:
4946:
4943:
4940:
4937:
4931:
4925:
4924:
4921:
4918:
4915:
4912:
4909:
4906:
4903:
4900:
4897:
4894:
4891:
4888:
4885:
4882:
4879:Cobham Gaisler
4876:
4870:
4869:
4866:
4863:
4860:
4857:
4854:
4851:
4848:
4845:
4842:
4839:
4836:
4833:
4830:
4827:
4824:
4811:
4810:
4807:
4804:
4801:
4798:
4795:
4792:
4789:
4786:
4783:
4780:
4777:
4774:
4771:
4768:
4762:
4760:Galaxy FT-1500
4756:
4755:
4752:
4749:
4746:
4743:
4740:
4737:
4734:
4731:
4728:
4725:
4722:
4719:
4716:
4713:
4710:
4703:
4702:
4699:
4696:
4693:
4690:
4687:
4684:
4681:
4678:
4675:
4672:
4669:
4666:
4663:
4660:
4657:
4651:
4650:
4647:
4644:
4641:
4638:
4635:
4632:
4629:
4626:
4623:
4620:
4617:
4614:
4613:JPS2 / HPC-ACE
4611:
4608:
4605:
4602:SPARC64 VIIIfx
4598:
4597:
4594:
4591:
4588:
4585:
4582:
4579:
4576:
4573:
4570:
4567:
4564:
4561:
4558:
4555:
4552:
4544:
4543:
4540:
4537:
4534:
4531:
4528:
4525:
4522:
4519:
4516:
4513:
4510:
4507:
4504:
4501:
4498:
4491:
4490:
4487:
4484:
4481:
4478:
4475:
4472:
4469:
4466:
4463:
4460:
4457:
4454:
4451:
4448:
4445:
4441:
4440:
4437:
4434:
4431:
4428:
4425:
4422:
4419:
4416:
4413:
4410:
4407:
4404:
4401:
4398:
4395:
4388:
4387:
4384:
4381:
4378:
4375:
4372:
4369:
4366:
4363:
4360:
4357:
4354:
4351:
4348:
4345:
4342:
4335:
4334:
4331:
4328:
4325:
4322:
4319:
4316:
4313:
4310:
4307:
4304:
4301:
4298:
4295:
4292:
4289:
4282:
4281:
4278:
4275:
4272:
4269:
4266:
4263:
4260:
4257:
4254:
4251:
4248:
4245:
4242:
4239:
4236:
4233:UltraSPARC IV+
4229:
4228:
4225:
4222:
4219:
4216:
4213:
4210:
4207:
4204:
4201:
4198:
4195:
4192:
4189:
4186:
4183:
4176:
4175:
4172:
4169:
4166:
4163:
4160:
4157:
4154:
4151:
4148:
4145:
4142:
4139:
4136:
4133:
4130:
4123:
4122:
4119:
4116:
4113:
4110:
4107:
4104:
4101:
4098:
4095:
4092:
4089:
4086:
4083:
4080:
4077:
4070:
4069:
4066:
4063:
4060:
4057:
4054:
4051:
4048:
4045:
4042:
4039:
4036:
4033:
4030:
4027:
4024:
4017:
4016:
4013:
4010:
4007:
4004:
4001:
3998:
3995:
3992:
3989:
3986:
3983:
3980:
3977:
3976:900–1200
3974:
3971:
3967:
3966:
3963:
3960:
3957:
3954:
3951:
3948:
3945:
3942:
3939:
3936:
3933:
3930:
3927:
3924:
3921:
3917:
3916:
3913:
3910:
3907:
3904:
3901:
3898:
3895:
3892:
3889:
3886:
3883:
3880:
3877:
3874:
3871:
3868:UltraSPARC III
3864:
3863:
3860:
3857:
3854:
3851:
3848:
3845:
3842:
3839:
3836:
3833:
3830:
3827:
3824:
3821:
3818:
3814:
3813:
3810:
3807:
3804:
3801:
3798:
3795:
3792:
3789:
3786:
3783:
3780:
3777:
3774:
3771:
3768:
3762:
3761:
3758:
3755:
3752:
3749:
3746:
3743:
3740:
3737:
3734:
3731:
3728:
3725:
3722:
3719:
3716:
3710:
3709:
3706:
3703:
3700:
3697:
3694:
3691:
3688:
3685:
3682:
3679:
3676:
3673:
3670:
3667:
3664:
3660:
3659:
3656:
3653:
3650:
3647:
3644:
3641:
3638:
3635:
3632:
3629:
3626:
3623:
3620:
3617:
3614:
3613:(Hummingbird)
3611:UltraSPARC IIe
3607:
3606:
3603:
3600:
3597:
3594:
3591:
3588:
3585:
3582:
3579:
3576:
3573:
3570:
3567:
3564:
3561:
3557:
3556:
3553:
3552:256–2048
3550:
3547:
3544:
3541:
3538:
3535:
3532:
3529:
3526:
3523:
3520:
3517:
3514:
3511:
3508:UltraSPARC IIi
3504:
3503:
3500:
3497:
3494:
3491:
3488:
3485:
3482:
3479:
3476:
3473:
3470:
3467:
3464:
3461:
3458:
3454:
3453:
3450:
3447:
3444:
3441:
3438:
3435:
3432:
3429:
3426:
3423:
3420:
3417:
3414:
3411:
3408:
3405:UltraSPARC IIs
3401:
3400:
3397:
3394:
3391:
3388:
3385:
3382:
3379:
3376:
3373:
3370:
3367:
3364:
3361:
3358:
3355:
3349:
3348:
3345:
3342:
3339:
3336:
3333:
3330:
3327:
3324:
3321:
3318:
3315:
3312:
3309:
3306:
3305:Fujitsu (HAL)
3303:
3297:
3296:
3293:
3290:
3287:
3284:
3281:
3278:
3275:
3272:
3269:
3266:
3263:
3260:
3257:
3254:
3253:Fujitsu (HAL)
3251:
3245:
3244:
3241:
3238:
3235:
3232:
3229:
3226:
3223:
3220:
3217:
3214:
3211:
3208:
3205:
3202:
3199:
3195:
3194:
3191:
3188:
3185:
3182:
3179:
3176:
3173:
3170:
3167:
3164:
3161:
3158:
3155:
3152:
3149:
3145:
3144:
3141:
3138:
3135:
3132:
3129:
3126:
3123:
3120:
3117:
3114:
3111:
3108:
3105:
3102:
3099:
3092:
3091:
3088:
3085:
3082:
3079:
3076:
3073:
3070:
3067:
3064:
3061:
3058:
3055:
3052:
3049:
3046:
3040:
3039:
3036:
3033:
3030:
3027:
3024:
3021:
3018:
3015:
3012:
3009:
3006:
3003:
3000:
2997:
2994:
2990:
2989:
2986:
2983:
2980:
2977:
2974:
2971:
2968:
2965:
2962:
2959:
2956:
2953:
2950:
2947:
2944:
2940:
2939:
2936:
2933:
2930:
2927:
2924:
2921:
2918:
2915:
2912:
2909:
2906:
2903:
2900:
2897:
2894:
2890:
2889:
2886:
2883:
2880:
2877:
2874:
2871:
2868:
2865:
2862:
2859:
2856:
2853:
2850:
2847:
2844:
2840:
2839:
2836:
2833:
2830:
2827:
2824:
2821:
2818:
2815:
2812:
2809:
2806:
2803:
2800:
2797:
2794:
2787:
2786:
2783:
2780:
2777:
2774:
2771:
2768:
2765:
2762:
2759:
2756:
2753:
2750:
2747:
2744:
2741:
2735:
2734:
2731:
2728:
2725:
2722:
2719:
2716:
2713:
2710:
2707:
2704:
2701:
2698:
2695:
2692:
2689:
2682:
2681:
2678:
2675:
2672:
2669:
2666:
2663:
2660:
2657:
2654:
2651:
2648:
2645:
2642:
2639:
2636:
2629:
2628:
2625:
2622:
2619:
2616:
2613:
2610:
2607:
2604:
2601:
2598:
2595:
2592:
2589:
2586:
2577:
2576:MN10501 (KAP)
2573:
2572:
2569:
2566:
2563:
2560:
2557:
2554:
2551:
2550:~0.1–1.8
2548:
2547:800–1300
2545:
2542:
2539:
2536:
2535:14.28–40
2533:
2530:
2526:
2525:
2522:
2519:
2516:
2513:
2510:
2507:
2504:
2501:
2498:
2495:
2492:
2489:
2488:14.28–33
2486:
2481:
2475:
2474:
2473:L3 cache (KB)
2471:
2470:L2 cache (KB)
2468:
2465:
2462:
2459:
2456:
2453:
2452:Die size (mm)
2450:
2447:
2444:
2443:Total threads
2441:
2438:
2437:Arch. version
2435:
2432:
2429:
2422:
2419:
2417:
2416:
2411:
2408:
2405:
2400:
2395:
2392:
2387:
2382:
2377:
2372:
2366:
2361:
2356:
2351:
2346:
2340:
2334:
2329:
2323:
2317:
2312:
2309:
2306:
2305:
2302:
2280:
2269:
2268:
2265:
2243:
2232:
2231:
2228:
2206:
2195:
2194:
2191:
2169:
2158:
2157:
2154:
2132:
2121:
2120:
2117:
2095:
2084:
2083:
2080:
2058:
2047:
2046:
2043:
2021:
2004:
2003:
2000:
1978:
1961:
1960:
1957:
1935:
1918:
1917:
1914:
1892:
1875:
1874:
1871:
1858:
1850:
1849:
1846:
1833:
1825:
1824:
1821:
1808:
1800:
1799:
1796:
1774:
1763:
1762:
1759:
1743:
1735:
1734:
1731:
1730:actual output
1728:
1715:
1712:
1702:
1691:
1672:
1669:
1592:(not equals),
1556:
1538:
1535:
1481:
1475:
1425:
1419:
1418:ALU operations
1416:
1411:memory barrier
1340:(store byte),
1298:
1288:
1285:
1283:
1280:
1277:
1276:
1273:
1270:
1267:
1264:
1261:
1258:
1254:
1253:
1250:
1247:
1244:
1241:
1238:
1235:
1232:
1231:LD/ST register
1228:
1227:
1224:
1221:
1218:
1215:
1212:
1209:
1208:JMPL immediate
1205:
1204:
1201:
1198:
1195:
1192:
1189:
1186:
1183:
1179:
1178:
1175:
1172:
1169:
1166:
1163:
1160:
1156:
1155:
1152:
1149:
1146:
1143:
1140:
1137:
1133:
1132:
1129:
1126:
1123:
1120:
1117:
1114:
1110:
1109:
1106:
1103:
1100:
1097:
1094:
1091:
1088:
1084:
1083:
1080:
1077:
1073:
1072:
1069:
1066:
1063:
1060:
1057:
1053:
1052:
1049:
1046:
1043:
1040:
1037:
1033:
1032:
1029:
1026:
1023:
1020:
1017:
1013:
1012:
1009:
1006:
1003:
1000:
996:
995:
992:
989:
986:
983:
980:
977:
974:
971:
968:
965:
962:
959:
956:
953:
950:
947:
944:
941:
938:
935:
932:
929:
926:
923:
920:
917:
914:
911:
908:
905:
902:
898:
897:
894:
880:
877:
869:
868:
865:
862:
839:
838:
835:
832:
829:
825:
824:
821:
818:
815:
811:
810:
807:
804:
801:
797:
796:
793:
790:
787:
783:
782:
779:
776:
773:
772:Register group
732:
729:
704:
701:
650:
649:
646:
643:
640:
637:
634:
556:quad-precision
550:(V7) in 1986.
543:
540:
496:quad-precision
484:floating-point
402:
399:
229:
228:
225:
223:Floating point
219:
218:
211:
205:
204:
198:
197:
194:
190:
189:
183:
179:
178:
175:
171:
170:
164:
158:
157:
155:Condition code
152:
146:
145:
142:
136:
135:
130:
126:
125:
120:
114:
113:
110:
106:
105:
78:
74:
73:
70:
66:
65:
55:
51:
50:
26:
9:
6:
4:
3:
2:
11756:
11745:
11742:
11740:
11737:
11735:
11732:
11730:
11727:
11725:
11722:
11721:
11719:
11704:
11701:
11699:
11696:
11694:
11691:
11689:
11686:
11684:
11681:
11679:
11676:
11674:
11671:
11669:
11666:
11664:
11661:
11660:
11658:
11654:
11647:
11644:
11642:
11639:
11637:
11634:
11632:
11629:
11627:
11624:
11622:
11619:
11617:
11614:
11613:
11611:
11609:
11603:
11593:
11590:
11588:
11585:
11583:
11580:
11578:
11575:
11573:
11570:
11566:
11563:
11561:
11558:
11556:
11553:
11552:
11551:
11548:
11547:
11545:
11543:
11539:
11533:
11530:
11526:
11523:
11521:
11518:
11517:
11516:
11513:
11509:
11506:
11505:
11504:
11501:
11499:
11496:
11494:
11493:Demultiplexer
11491:
11489:
11486:
11485:
11483:
11481:
11477:
11471:
11468:
11466:
11463:
11460:
11458:
11455:
11453:
11450:
11448:
11445:
11443:
11440:
11439:
11437:
11435:
11431:
11425:
11422:
11420:
11417:
11415:
11414:Memory buffer
11412:
11410:
11409:Register file
11407:
11405:
11402:
11400:
11397:
11395:
11392:
11391:
11389:
11387:
11383:
11375:
11372:
11370:
11367:
11366:
11365:
11362:
11360:
11357:
11355:
11352:
11350:
11349:Combinational
11347:
11346:
11344:
11342:
11338:
11332:
11329:
11325:
11322:
11321:
11319:
11316:
11314:
11311:
11309:
11306:
11301:
11298:
11296:
11293:
11292:
11290:
11287:
11284:
11281:
11278:
11275:
11272:
11269:
11268:
11266:
11264:
11258:
11252:
11249:
11247:
11244:
11242:
11239:
11237:
11234:
11230:
11227:
11225:
11222:
11220:
11217:
11215:
11212:
11210:
11207:
11205:
11202:
11201:
11200:
11197:
11195:
11192:
11191:
11189:
11185:
11179:
11176:
11174:
11171:
11169:
11166:
11164:
11161:
11160:
11158:
11154:
11146:
11143:
11142:
11141:
11138:
11136:
11133:
11131:
11128:
11126:
11123:
11121:
11118:
11116:
11113:
11111:
11108:
11106:
11103:
11101:
11098:
11096:
11093:
11091:
11088:
11086:
11083:
11081:
11078:
11076:
11073:
11071:
11068:
11067:
11065:
11063:
11059:
11049:
11046:
11044:
11041:
11039:
11036:
11033:
11030:
11027:
11024:
11021:
11018:
11015:
11012:
11010:
11007:
11004:
11001:
10999:
10996:
10994:
10991:
10990:
10988:
10986:
10980:
10973:
10970:
10968:
10965:
10962:
10959:
10956:
10953:
10952:
10950:
10944:
10938:
10935:
10933:
10930:
10928:
10925:
10923:
10920:
10918:
10915:
10913:
10910:
10908:
10905:
10904:
10902:
10898:
10891:
10888:
10885:
10882:
10879:
10876:
10874:
10871:
10869:
10866:
10864:
10861:
10859:
10856:
10854:
10851:
10849:
10846:
10844:
10841:
10839:
10836:
10834:
10831:
10829:
10826:
10822:
10819:
10818:
10816:
10813:
10810:
10807:
10806:
10804:
10802:
10798:
10792:
10789:
10787:
10784:
10781:
10778:
10775:
10772:
10769:
10766:
10763:
10760:
10757:
10754:
10749:
10746:
10745:
10743:
10740:
10738:
10735:
10734:
10732:
10730:
10724:
10712:
10709:
10708:
10707:
10704:
10702:
10699:
10695:
10692:
10690:
10687:
10685:
10682:
10680:
10677:
10676:
10675:
10672:
10670:
10667:
10666:
10664:
10662:
10658:
10652:
10649:
10647:
10644:
10642:
10639:
10635:
10632:
10630:
10627:
10626:
10625:
10622:
10620:
10617:
10616:
10614:
10612:
10608:
10602:
10599:
10597:
10594:
10590:
10587:
10586:
10585:
10582:
10578:
10575:
10573:
10570:
10569:
10568:
10565:
10561:
10558:
10556:
10553:
10552:
10551:
10548:
10546:
10543:
10539:
10536:
10534:
10531:
10530:
10529:
10526:
10525:
10523:
10519:
10516:
10514:
10510:
10500:
10497:
10495:
10492:
10491:
10489:
10487:
10483:
10477:
10474:
10472:
10469:
10465:
10462:
10460:
10457:
10456:
10455:
10452:
10450:
10449:Scoreboarding
10447:
10446:
10444:
10442:
10438:
10432:
10431:False sharing
10429:
10427:
10424:
10422:
10419:
10417:
10414:
10413:
10411:
10409:
10405:
10399:
10396:
10394:
10391:
10389:
10386:
10385:
10383:
10381:
10377:
10374:
10372:
10368:
10358:
10355:
10353:
10350:
10348:
10345:
10342:
10338:
10335:
10333:
10330:
10328:
10325:
10323:
10320:
10319:
10317:
10315:
10312:
10310:
10307:
10305:
10302:
10300:
10297:
10295:
10292:
10290:
10287:
10285:
10282:
10280:
10277:
10275:
10272:
10270:
10267:
10265:
10262:
10260:
10257:
10253:
10250:
10248:
10245:
10243:
10240:
10239:
10237:
10235:
10232:
10230:
10227:
10225:
10224:Stanford MIPS
10222:
10220:
10217:
10215:
10212:
10210:
10207:
10205:
10202:
10200:
10197:
10196:
10194:
10188:
10180:
10177:
10176:
10175:
10172:
10170:
10167:
10165:
10162:
10160:
10157:
10155:
10152:
10150:
10147:
10145:
10142:
10138:
10135:
10134:
10133:
10130:
10126:
10123:
10122:
10121:
10118:
10116:
10113:
10111:
10108:
10106:
10103:
10101:
10098:
10097:
10095:
10091:
10088:
10086:
10085:architectures
10080:
10074:
10071:
10069:
10066:
10064:
10061:
10059:
10056:
10054:
10053:Heterogeneous
10051:
10047:
10044:
10042:
10039:
10038:
10037:
10034:
10032:
10029:
10025:
10022:
10020:
10017:
10015:
10012:
10010:
10007:
10006:
10005:
10004:Memory access
10002:
10000:
9997:
9995:
9992:
9990:
9987:
9985:
9982:
9978:
9975:
9974:
9973:
9970:
9968:
9965:
9963:
9960:
9959:
9957:
9955:
9951:
9943:
9940:
9938:
9937:Random-access
9935:
9933:
9930:
9928:
9925:
9924:
9923:
9920:
9918:
9917:Stack machine
9915:
9913:
9910:
9906:
9903:
9901:
9898:
9896:
9893:
9891:
9888:
9886:
9883:
9881:
9878:
9876:
9873:
9871:
9868:
9867:
9866:
9863:
9859:
9856:
9854:
9851:
9849:
9846:
9844:
9841:
9839:
9836:
9834:
9833:with datapath
9831:
9830:
9829:
9826:
9824:
9821:
9819:
9816:
9815:
9813:
9811:
9807:
9803:
9796:
9791:
9789:
9784:
9782:
9777:
9776:
9773:
9761:
9753:
9752:
9749:
9743:
9740:
9739:
9737:
9733:
9727:
9724:
9722:
9719:
9717:
9714:
9713:
9711:
9707:
9701:
9698:
9695:
9691:
9687:
9684:
9682:
9679:
9678:
9676:
9672:
9666:
9663:
9661:
9658:
9657:
9655:
9651:
9645:
9642:
9640:
9637:
9635:
9632:
9630:
9627:
9625:
9622:
9620:
9617:
9615:
9612:
9611:
9609:
9605:
9599:
9596:
9594:
9593:SQL Developer
9591:
9589:
9586:
9584:
9581:
9579:
9576:
9574:
9571:
9570:
9568:
9562:
9556:
9553:
9551:
9548:
9547:
9545:
9541:
9535:
9532:
9530:
9527:
9525:
9522:
9520:
9517:
9515:
9512:
9510:
9507:
9505:
9502:
9501:
9499:
9495:
9489:
9486:
9484:
9481:
9479:
9476:
9474:
9471:
9469:
9466:
9464:
9461:
9459:
9456:
9454:
9451:
9449:
9446:
9444:
9441:
9439:
9436:
9434:
9431:
9430:
9428:
9425:
9420:
9413:
9411:
9408:
9406:
9403:
9401:
9398:
9396:
9393:
9391:
9388:
9386:
9383:
9381:
9380:Larry Ellison
9378:
9376:
9373:
9371:
9368:
9366:
9363:
9361:
9358:
9357:
9355:
9351:
9347:
9340:
9335:
9333:
9328:
9326:
9321:
9320:
9317:
9307:
9302:
9296:
9293:
9291:
9288:
9287:
9285:
9281:
9275:
9272:
9270:
9267:
9265:
9262:
9260:
9257:
9255:
9252:
9250:
9247:
9245:
9242:
9240:
9237:
9235:
9232:
9230:
9227:
9225:
9222:
9221:
9219:
9215:
9205:
9202:
9200:
9199:Scott McNealy
9197:
9195:
9192:
9190:
9187:
9186:
9184:
9182:
9178:
9172:
9169:
9167:
9164:
9162:
9159:
9157:
9154:
9152:
9149:
9147:
9144:
9142:
9139:
9137:
9134:
9133:
9130:
9127:
9123:
9117:
9114:
9112:
9109:
9108:
9106:
9102:
9096:
9093:
9091:
9088:
9086:
9083:
9081:
9078:
9077:
9075:
9071:
9065:
9062:
9060:
9057:
9055:
9052:
9050:
9047:
9045:
9042:
9041:
9039:
9035:
9029:
9026:
9024:
9021:
9019:
9016:
9014:
9011:
9009:
9006:
9005:
9003:
8999:
8993:
8990:
8988:
8985:
8983:
8980:
8978:
8975:
8973:
8970:
8968:
8965:
8963:
8960:
8958:
8955:
8953:
8950:
8948:
8945:
8943:
8940:
8938:
8935:
8933:
8930:
8928:
8925:
8921:
8918:
8917:
8916:
8913:
8911:
8908:
8904:
8901:
8900:
8899:
8896:
8894:
8891:
8889:
8886:
8885:
8883:
8879:
8874:
8860:
8857:
8855:
8852:
8850:
8847:
8845:
8842:
8840:
8837:
8835:
8832:
8830:
8827:
8825:
8822:
8820:
8817:
8815:
8812:
8810:
8807:
8805:
8802:
8801:
8799:
8795:
8789:
8786:
8784:
8781:
8779:
8776:
8774:
8771:
8769:
8766:
8764:
8763:UltraSPARC T2
8761:
8759:
8758:UltraSPARC T1
8756:
8754:
8753:UltraSPARC IV
8751:
8746:
8743:
8742:
8741:
8738:
8733:
8730:
8727:
8726:
8725:
8724:UltraSPARC II
8722:
8720:
8717:
8715:
8712:
8710:
8707:
8705:
8702:
8700:
8697:
8696:
8694:
8690:
8684:
8681:
8679:
8676:
8674:
8671:
8669:
8666:
8664:
8661:
8659:
8656:
8652:
8649:
8647:
8644:
8642:
8639:
8637:
8634:
8632:
8629:
8628:
8627:
8624:
8622:
8619:
8617:
8614:
8610:
8607:
8606:
8605:
8602:
8598:
8595:
8593:
8590:
8588:
8585:
8583:
8580:
8578:
8575:
8573:
8570:
8568:
8565:
8563:
8560:
8559:
8558:
8555:
8553:
8550:
8548:
8545:
8541:
8538:
8536:
8533:
8531:
8528:
8526:
8523:
8521:
8518:
8516:
8513:
8511:
8508:
8506:
8503:
8501:
8498:
8496:
8493:
8492:
8491:
8488:
8486:
8483:
8481:
8478:
8476:
8473:
8471:
8468:
8466:
8463:
8462:
8460:
8456:
8453:
8449:
8445:
8440:
8436:
8429:
8424:
8422:
8417:
8415:
8410:
8409:
8406:
8394:
8390:
8386:
8383:
8381:
8378:
8376:
8372:
8369:
8367:
8364:
8362:
8359:
8357:
8353:
8350:
8348:
8345:
8343:
8340:
8338:
8335:
8333:
8330:
8328:
8325:
8322:
8320:
8317:
8315:
8312:
8310:
8307:
8306:
8304:
8300:
8294:
8290:
8287:
8284:
8282:
8279:
8277:
8274:
8272:
8269:
8267:
8264:
8262:
8258:
8254:
8251:
8248:
8246:
8243:
8241:
8238:
8236:
8233:
8231:
8230:LatticeMico32
8227:
8224:
8222:
8219:
8217:
8214:
8212:
8209:
8207:
8204:
8202:
8199:
8196:
8195:
8193:
8189:
8183:
8182:Stanford MIPS
8180:
8178:
8177:Berkeley RISC
8175:
8173:
8170:
8169:
8167:
8163:
8158:
8151:
8146:
8144:
8139:
8137:
8132:
8131:
8128:
8122:
8119:
8117:
8113:
8110:
8108:
8104:
8099:
8096:
8095:
8091:
8089:
8086:
8084:
8081:
8078:
8074:
8071:
8068:
8064:
8061:
8058:
8054:
8051:
8048:
8044:
8041:
8039:
8035:
8031:
8027:
8025:
8022:
8020:
8017:
8015:
8012:
8009:
8005:
8002:
8000:
7997:
7996:
7976:
7972:
7971:Computerworld
7968:
7961:
7946:
7942:
7941:
7934:
7929:
7926:Keane, Andy,
7922:
7907:
7903:
7902:
7897:
7891:
7876:
7872:
7871:
7866:
7860:
7845:
7841:
7840:
7835:
7829:
7821:
7817:
7816:
7811:
7805:
7790:
7787:, June 2011,
7786:
7785:
7780:
7774:
7759:
7755:
7754:
7747:
7732:
7728:
7724:
7720:
7713:
7702:September 18,
7694:
7687:
7681:
7670:September 18,
7665:
7661:
7655:
7636:
7629:
7623:
7607:
7603:
7597:
7578:
7571:
7564:
7545:
7538:
7532:
7513:
7506:
7500:
7481:
7474:
7468:
7449:
7442:
7436:
7417:
7410:
7404:
7385:
7378:
7372:
7353:
7346:
7340:
7321:
7314:
7308:
7293:
7289:
7288:
7283:
7277:
7262:
7258:
7257:
7252:
7245:
7230:
7226:
7225:
7220:
7213:
7195:
7191:
7190:
7182:
7176:
7161:
7157:
7156:
7151:
7144:
7126:
7122:
7121:
7113:
7107:
7099:
7093:
7078:
7077:
7072:
7065:
7050:
7046:
7042:
7036:
7021:
7017:
7016:
7011:
7007:
7006:Vance, Ashlee
7001:
6986:
6982:
6978:
6977:
6969:
6965:
6959:
6941:
6937:
6930:
6929:
6922:
6914:
6908:
6904:
6900:
6896:
6889:
6873:
6869:
6865:
6859:
6840:
6834:
6826:
6820:
6818:
6816:
6814:
6812:
6810:
6808:
6806:
6804:
6787:
6786:
6779:
6777:
6775:
6773:
6771:
6769:
6767:
6765:
6763:
6746:
6742:
6738:
6732:
6716:
6712:
6708:
6704:
6697:
6679:
6675:
6674:
6666:
6660:
6644:
6640:
6634:
6626:
6622:
6616:
6609:
6601:September 24,
6596:
6592:
6588:
6582:
6567:
6565:0-13-825001-4
6561:
6557:
6556:Prentice Hall
6553:
6552:
6544:
6542:
6540:
6538:
6536:
6534:
6518:
6514:
6510:
6509:
6502:
6487:
6483:
6479:
6478:
6473:
6467:
6460:
6444:
6437:
6431:
6429:
6413:
6409:
6403:
6392:September 11,
6387:
6383:
6382:
6377:
6370:
6359:September 11,
6354:
6350:
6349:
6344:
6337:
6321:
6317:
6313:
6307:
6305:
6288:
6284:
6280:
6274:
6272:
6270:
6268:
6251:
6247:
6243:
6237:
6235:
6233:
6228:
6218:
6214:
6211:
6208:
6205:
6202:
6199:
6196:
6193:
6190:
6187:
6184:
6181:
6180:
6174:
6172:
6168:
6165:
6161:
6157:
6153:
6151:
6150:PRIMEHPC FX10
6147:
6143:
6139:
6135:
6131:
6126:
6122:
6118:
6114:
6109:
6107:
6094:
6090:
6089:SystemVerilog
6086:
6083:
6082:
6081:
6079:
6071:
6068:
6065:
6062:
6059:
6056:
6052:
6048:
6045:
6042:
6039:
6035:
6031:
6027:
6023:
6020:
6019:
6018:
6016:
6006:
6003:
6001:
5997:
5992:
5990:
5986:
5982:
5978:
5974:
5970:
5966:
5962:
5958:
5954:
5950:
5946:
5942:
5924:
5915:
5906:
5897:
5891:@440 MHz
5888:
5882:@400 MHz
5879:
5873:@250 MHz
5870:
5864:@167 MHz
5861:
5854:
5850:
5846:
5840:
5831:
5829:
5824:
5821:
5819:
5792:
5784:Process (nm)
5777:
5768:
5765:
5764:
5760:
5757:
5754:
5751:
5733:
5730:
5727:
5724:
5719:
5716:
5714:
5711:
5710:
5706:
5703:
5700:
5697:
5694:
5691:
5685:
5682:
5679:
5676:
5673:
5670:
5667:
5664:
5661:
5659:
5656:
5655:
5651:
5648:
5645:
5642:
5639:
5624:
5621:
5618:
5615:
5612:
5609:
5606:
5604:
5601:
5600:
5596:
5593:
5590:
5587:
5584:
5581:
5578:
5575:
5572:
5569:
5566:
5563:
5560:
5557:
5554:
5552:
5549:
5548:
5544:
5541:
5538:
5535:
5532:
5529:
5526:
5523:
5520:
5517:
5514:
5511:
5508:
5505:
5502:
5499:
5498:
5494:
5491:
5488:
5485:
5482:
5479:
5476:
5473:
5470:
5467:
5464:
5461:
5458:
5455:
5452:
5449:
5448:
5444:
5441:
5438:
5435:
5432:
5429:
5426:
5423:
5420:
5417:
5414:
5411:
5408:
5405:
5402:
5400:
5397:
5396:
5392:
5389:
5386:
5383:
5380:
5377:
5374:
5371:
5368:
5365:
5362:
5359:
5356:
5353:
5350:
5348:
5345:
5344:
5340:
5337:
5334:
5331:
5328:
5325:
5322:
5319:
5316:
5313:
5310:
5307:
5304:
5301:
5298:
5295:
5292:
5291:
5287:
5284:
5281:
5278:
5275:
5272:
5269:
5266:
5263:
5260:
5257:
5254:
5251:
5248:
5245:
5242:
5241:
5237:
5234:
5231:
5228:
5225:
5222:
5219:
5216:
5213:
5210:
5207:
5204:
5201:
5198:
5195:
5192:
5191:
5187:
5184:
5181:
5178:
5175:
5172:
5169:
5166:
5163:
5160:
5157:
5154:
5151:
5148:
5145:
5143:
5140:
5139:
5135:
5132:
5129:
5126:
5123:
5120:
5117:
5114:
5111:
5108:
5105:
5102:
5099:
5096:
5093:
5090:
5087:
5086:
5082:
5079:
5076:
5073:
5070:
5067:
5064:
5061:
5058:
5055:
5052:
5049:
5046:
5043:
5040:
5038:
5035:
5034:
5030:
5027:
5024:
5021:
5018:
5015:
5012:
5009:
5006:
5003:
5000:
4997:
4994:
4991:
4988:
4985:
4982:
4981:
4977:
4974:
4971:
4968:
4965:
4962:
4956:
4953:
4950:
4947:
4944:
4941:
4938:
4935:
4932:
4930:
4927:
4926:
4922:
4919:
4916:
4913:
4910:
4907:
4895:
4892:
4889:
4886:
4883:
4880:
4877:
4875:
4872:
4871:
4867:
4864:
4861:
4858:
4852:
4840:
4837:
4834:
4831:
4828:
4825:
4821:
4816:
4813:
4812:
4808:
4805:
4802:
4799:
4796:
4793:
4790:
4787:
4784:
4781:
4778:
4775:
4772:
4769:
4766:
4763:
4761:
4758:
4757:
4753:
4750:
4747:
4744:
4741:
4738:
4735:
4732:
4729:
4726:
4723:
4720:
4717:
4714:
4711:
4708:
4705:
4704:
4694:
4691:
4688:
4685:
4682:
4673:
4670:
4667:
4664:
4661:
4659:Atmel AT697F
4658:
4656:
4653:
4652:
4648:
4645:
4642:
4639:
4636:
4633:
4630:
4627:
4624:
4621:
4618:
4615:
4612:
4609:
4606:
4603:
4600:
4599:
4595:
4592:
4589:
4586:
4583:
4580:
4577:
4574:
4571:
4568:
4565:
4562:
4559:
4556:
4553:
4550:
4546:
4545:
4541:
4538:
4535:
4532:
4526:
4520:
4517:
4514:
4511:
4508:
4505:
4502:
4499:
4496:
4493:
4492:
4488:
4485:
4482:
4479:
4470:
4467:
4464:
4461:
4458:
4455:
4452:
4449:
4447:Sun SME1910A
4446:
4443:
4442:
4438:
4435:
4432:
4429:
4427:1.1–1.5
4426:
4423:
4420:
4417:
4414:
4411:
4408:
4405:
4402:
4399:
4397:Sun SME1908A
4396:
4393:
4392:UltraSPARC T2
4390:
4389:
4385:
4382:
4379:
4376:
4373:
4371:120–150
4370:
4364:
4361:
4358:
4355:
4352:
4349:
4346:
4343:
4340:
4337:
4336:
4332:
4329:
4326:
4323:
4320:
4317:
4314:
4311:
4308:
4305:
4302:
4299:
4296:
4293:
4290:
4287:
4286:UltraSPARC T1
4284:
4283:
4279:
4276:
4273:
4270:
4267:
4264:
4261:
4258:
4255:
4252:
4249:
4246:
4243:
4240:
4238:Sun SME1167A
4237:
4234:
4231:
4230:
4226:
4223:
4220:
4217:
4214:
4211:
4208:
4205:
4202:
4199:
4196:
4193:
4190:
4187:
4184:
4181:
4180:UltraSPARC IV
4178:
4177:
4170:
4167:
4164:
4161:
4158:
4155:
4152:
4149:
4146:
4143:
4140:
4137:
4134:
4131:
4128:
4125:
4124:
4117:
4114:
4111:
4108:
4105:
4102:
4099:
4096:
4093:
4090:
4087:
4084:
4081:
4078:
4075:
4072:
4071:
4067:
4064:
4061:
4058:
4055:
4052:
4049:
4046:
4043:
4040:
4037:
4034:
4031:
4028:
4025:
4022:
4019:
4018:
4014:
4011:
4008:
4005:
4002:
3999:
3996:
3993:
3990:
3987:
3984:
3981:
3978:
3975:
3972:
3969:
3968:
3964:
3961:
3958:
3955:
3952:
3946:
3940:
3937:
3934:
3931:
3928:
3926:750–900
3925:
3922:
3919:
3918:
3914:
3911:
3908:
3905:
3902:
3899:
3896:
3893:
3890:
3887:
3884:
3881:
3878:
3875:
3872:
3869:
3866:
3865:
3858:
3855:
3852:
3834:
3831:
3828:
3825:
3823:450–810
3822:
3819:
3816:
3815:
3808:
3805:
3802:
3799:
3787:
3784:
3781:
3775:
3773:600–810
3772:
3769:
3767:
3764:
3763:
3756:
3753:
3750:
3747:
3738:
3735:
3732:
3729:
3726:
3723:
3721:400–563
3720:
3717:
3715:
3712:
3711:
3707:
3704:
3701:
3698:
3695:
3692:
3689:
3680:
3677:
3674:
3671:
3669:550–650
3668:
3665:
3662:
3661:
3657:
3654:
3651:
3648:
3645:
3642:
3639:
3630:
3627:
3624:
3621:
3619:400–500
3618:
3615:
3612:
3609:
3608:
3604:
3601:
3598:
3595:
3592:
3589:
3586:
3580:
3577:
3574:
3571:
3568:
3566:333–480
3565:
3562:
3559:
3558:
3554:
3551:
3548:
3545:
3542:
3539:
3536:
3533:
3530:
3527:
3524:
3521:
3518:
3516:270–360
3515:
3512:
3509:
3506:
3505:
3501:
3498:
3495:
3492:
3489:
3486:
3483:
3480:
3477:
3474:
3471:
3468:
3465:
3463:360–480
3462:
3459:
3456:
3455:
3451:
3448:
3445:
3442:
3439:
3436:
3433:
3430:
3427:
3424:
3421:
3418:
3415:
3413:250–400
3412:
3409:
3406:
3403:
3402:
3395:
3392:
3389:
3386:
3377:
3374:
3371:
3368:
3365:
3362:
3360:250–330
3359:
3356:
3354:
3351:
3350:
3340:
3337:
3334:
3331:
3328:
3325:
3319:
3316:
3313:
3310:
3308:141–161
3307:
3304:
3302:
3299:
3298:
3288:
3285:
3282:
3279:
3276:
3273:
3267:
3264:
3261:
3258:
3256:101–118
3255:
3252:
3250:
3247:
3246:
3242:
3239:
3236:
3233:
3230:
3218:
3215:
3212:
3209:
3206:
3204:180–200
3203:
3200:
3197:
3196:
3192:
3189:
3186:
3183:
3180:
3174:
3171:
3168:
3165:
3162:
3159:
3156:
3153:
3150:
3147:
3146:
3142:
3139:
3136:
3133:
3130:
3127:
3124:
3121:
3118:
3115:
3112:
3109:
3106:
3104:143–167
3103:
3100:
3097:
3094:
3093:
3089:
3086:
3083:
3080:
3077:
3074:
3071:
3068:
3065:
3062:
3059:
3056:
3053:
3051:160–180
3050:
3047:
3045:
3042:
3041:
3037:
3034:
3031:
3028:
3025:
3013:
3010:
3007:
3004:
3001:
2999:125–166
2998:
2995:
2992:
2991:
2987:
2984:
2981:
2978:
2972:
2966:
2963:
2960:
2957:
2954:
2951:
2948:
2945:
2942:
2941:
2937:
2934:
2931:
2928:
2925:
2913:
2910:
2907:
2904:
2901:
2898:
2895:
2892:
2891:
2887:
2884:
2881:
2878:
2875:
2872:
2869:
2866:
2863:
2860:
2857:
2854:
2851:
2848:
2845:
2842:
2841:
2837:
2834:
2831:
2828:
2825:
2813:
2810:
2807:
2804:
2801:
2798:
2795:
2793:(Colorado 1)
2792:
2789:
2788:
2784:
2781:
2778:
2775:
2772:
2766:
2754:
2751:
2748:
2745:
2742:
2740:
2737:
2736:
2732:
2729:
2726:
2723:
2720:
2717:
2714:
2708:
2705:
2702:
2699:
2696:
2693:
2690:
2687:
2684:
2683:
2679:
2676:
2673:
2670:
2667:
2664:
2661:
2658:
2655:
2652:
2649:
2646:
2643:
2640:
2638:TI TMS390S10
2637:
2634:
2631:
2630:
2626:
2623:
2620:
2617:
2602:
2596:
2593:
2590:
2587:
2585:
2581:
2578:
2575:
2574:
2570:
2567:
2556:160–256
2555:
2549:
2546:
2543:
2540:
2537:
2534:
2531:
2528:
2527:
2523:
2520:
2508:
2502:
2499:
2496:
2493:
2490:
2487:
2485:
2482:
2480:
2479:SPARC MB86900
2477:
2476:
2454:
2446:Process (nm)
2439:
2430:
2427:
2426:
2415:
2412:
2409:
2406:
2404:
2401:
2399:
2396:
2393:
2391:
2388:
2386:
2383:
2381:
2378:
2376:
2373:
2370:
2367:
2365:
2362:
2360:
2357:
2355:
2352:
2350:
2347:
2344:
2341:
2338:
2335:
2333:
2330:
2327:
2324:
2322:
2319:
2318:
2316:
2303:
2281:
2271:
2270:
2266:
2244:
2234:
2233:
2229:
2207:
2197:
2196:
2192:
2170:
2160:
2159:
2155:
2133:
2123:
2122:
2118:
2096:
2086:
2085:
2081:
2059:
2049:
2048:
2044:
2022:
2006:
2005:
2001:
1979:
1963:
1962:
1958:
1936:
1920:
1919:
1915:
1893:
1877:
1876:
1872:
1859:
1852:
1851:
1847:
1834:
1827:
1826:
1822:
1809:
1802:
1801:
1797:
1775:
1765:
1764:
1760:
1744:
1737:
1736:
1732:
1729:
1726:
1725:
1719:
1711:
1701:
1690:
1668:
1661:
1658:
1654:
1645:
1641:
1632:(carry set),
1596:(less than),
1574:
1572:
1567:
1563:
1555:
1552:
1548:
1544:
1534:
1480:
1474:
1468:
1464:
1424:
1415:
1412:
1407:
1380:
1349:
1307:
1297:
1295:
1271:
1256:
1255:
1245:
1230:
1229:
1222:
1207:
1206:
1196:
1182:JMPL register
1181:
1180:
1168:110110/110111
1158:
1157:
1145:110100/110101
1136:FPU operation
1135:
1134:
1127:
1112:
1111:
1101:
1086:
1085:
1075:
1074:
1061:
1055:
1054:
1041:
1035:
1034:
1021:
1015:
1014:
998:
997:
993:
990:
987:
984:
981:
978:
975:
972:
969:
966:
963:
960:
957:
954:
951:
948:
945:
942:
939:
936:
933:
930:
927:
924:
921:
918:
915:
912:
909:
906:
903:
900:
899:
891:
885:
876:
873:
866:
863:
860:
859:
858:
855:
852:
847:
844:
836:
833:
830:
827:
826:
822:
819:
816:
813:
812:
808:
805:
802:
799:
798:
794:
791:
788:
785:
784:
781:Availability
780:
777:
774:
771:
770:
764:
762:
758:
753:
748:
746:
742:
738:
728:
724:
722:
718:
714:
710:
700:
698:
693:
690:
688:
683:
681:
677:
672:
670:
666:
665:UltraSPARC T2
661:
659:
658:UltraSPARC T2
655:
647:
644:
641:
638:
635:
632:
628:
627:
626:
624:
623:UltraSPARC T1
620:
615:
612:
610:
605:
603:
599:
595:
591:
587:
583:
579:
575:
571:
567:
563:
561:
557:
553:
549:
539:
537:
533:
528:
524:
519:
517:
513:
509:
504:
500:
497:
493:
489:
485:
480:
478:
473:
471:
467:
463:
459:
458:register file
455:
449:
447:
443:
439:
435:
430:
428:
424:
420:
416:
412:
408:
398:
396:
392:
387:
383:
381:
377:
373:
369:
364:
362:
358:
354:
350:
346:
342:
338:
332:
330:
326:
322:
318:
314:
310:
306:
302:
298:
294:
290:
286:
282:
278:
273:
270:
269:Berkeley RISC
266:
262:
258:
254:
250:
243:
242:UltraSPARC II
240:
235:
226:
224:
220:
216:
212:
210:
206:
203:
199:
195:
191:
187:
184:
180:
176:
172:
168:
165:
163:
159:
156:
153:
151:
147:
143:
141:
137:
134:
131:
127:
124:
121:
119:
115:
111:
107:
79:
75:
71:
67:
63:
60:(acquired by
59:
56:
52:
48:
43:
37:
33:
19:
11703:Chip carrier
11641:Clock gating
11560:Mixed-signal
11457:Write buffer
11434:Control unit
11246:Clock signal
10985:accelerators
10967:Cypress PSoC
10624:Simultaneous
10441:Out-of-order
10263:
10073:Neuromorphic
9954:Architecture
9912:Belt machine
9905:Zeno machine
9838:Hierarchical
9685:
9660:Oracle Linux
9468:Virtual Iron
9405:Jack F. Kemp
9360:Jeffrey Berg
9217:Acquisitions
9204:Vinod Khosla
9018:Open Storage
8698:
8616:Blade server
8547:SPARCclassic
8319:Apollo PRISM
8302:Discontinued
8270:
8226:LatticeMico8
8093:
7979:. Retrieved
7960:
7949:, retrieved
7938:
7921:
7910:, retrieved
7904:, May 2015,
7899:
7890:
7879:, retrieved
7868:
7859:
7848:, retrieved
7844:the original
7837:
7828:
7820:the original
7813:
7804:
7793:, retrieved
7782:
7773:
7762:, retrieved
7752:
7746:
7735:, retrieved
7726:
7722:
7712:
7700:. Retrieved
7680:
7668:. Retrieved
7654:
7642:. Retrieved
7622:
7610:. Retrieved
7596:
7584:. Retrieved
7563:
7551:. Retrieved
7531:
7519:. Retrieved
7499:
7487:. Retrieved
7480:the original
7467:
7455:. Retrieved
7435:
7423:. Retrieved
7403:
7391:. Retrieved
7371:
7359:. Retrieved
7339:
7327:. Retrieved
7307:
7296:, retrieved
7285:
7276:
7265:, retrieved
7256:The Register
7254:
7244:
7233:, retrieved
7224:The Register
7222:
7212:
7201:, retrieved
7187:
7175:
7164:, retrieved
7155:The Register
7153:
7143:
7132:, retrieved
7118:
7106:
7081:, retrieved
7076:The Inquirer
7074:
7064:
7053:, retrieved
7045:heise online
7044:
7035:
7024:, retrieved
7013:
7000:
6989:, retrieved
6974:
6958:
6947:, retrieved
6927:
6921:
6894:
6888:
6876:. Retrieved
6867:
6858:
6848:December 17,
6846:. Retrieved
6833:
6790:. Retrieved
6784:
6749:. Retrieved
6740:
6731:
6719:. Retrieved
6706:
6701:Soat, John.
6696:
6687:November 25,
6685:, retrieved
6671:
6659:
6647:. Retrieved
6643:the original
6633:
6625:the original
6615:
6606:
6599:. Retrieved
6590:
6581:
6569:. Retrieved
6550:
6521:, retrieved
6507:
6501:
6490:, retrieved
6476:
6466:
6457:
6450:. Retrieved
6417:February 15,
6415:. Retrieved
6411:
6402:
6390:. Retrieved
6381:The Register
6379:
6369:
6357:. Retrieved
6346:
6336:
6324:. Retrieved
6315:
6291:. Retrieved
6282:
6254:. Retrieved
6245:
6154:
6110:
6103:
6093:BSD licenses
6075:
6012:
6004:
5993:
5963:, but other
5938:
5923:
5914:
5905:
5896:
5887:
5878:
5869:
5860:
5839:
5817:
5816:
5799:Voltage (V)
5594:128×32+256×8
5500:SPARC64 XII
5347:SPARC64 XIfx
5037:SPARC64 IXfx
4819:
4815:SPARC64 VII+
4554:Sun SME1832
4394:(Niagara 2)
4341:(Olympus-C)
4291:Sun SME1905
4185:Sun SME1167
4129:(Olympus-B)
4026:Sun SME1603
3973:Sun SME1056
3923:Sun SME1052
3873:Sun SME1050
3666:Sun SME1532
3616:Sun SME1701
3563:Sun SME1430
3513:Sun SME1040
3449:1024 or 4096
3410:Sun STP1031
3407:(Blackbird)
3201:Ross RT620D
3151:Sun STP1030
3101:Sun STP1030
2996:Ross RT620C
2946:Sun STP1021
2899:90–125
2896:Ross RT620B
2849:60–125
2796:Ross RT620A
2746:66–108
2635:I (Tsunami)
2583:
2461:Voltage (V)
2314:
1717:
1705:
1694:
1674:
1662:
1656:
1646:
1642:
1624:(negative),
1620:(positive),
1575:
1570:
1565:
1561:
1559:
1540:
1484:
1478:
1466:
1428:
1421:
1408:
1381:
1350:
1302:
1290:
1282:Instructions
1159:CP operation
999:SETHI format
882:
874:
870:
856:
848:
845:
842:
760:
751:
749:
744:
740:
736:
734:
725:
712:
706:
703:Architecture
694:
691:
686:
684:
675:
673:
662:
653:
651:
618:
616:
613:
608:
606:
565:
564:
551:
547:
545:
520:
501:
481:
474:
450:
437:
431:
404:
388:
384:
365:
333:
274:
252:
248:
247:
91:(production)
36:
11488:Multiplexer
11452:Data buffer
11163:Single-core
11135:bit slicing
10993:Coprocessor
10848:Coprocessor
10729:performance
10651:Cooperative
10641:Speculative
10601:Distributed
10560:Superscalar
10545:Instruction
10513:Parallelism
10486:Speculative
10318:System/3x0
10190:Instruction
9967:Von Neumann
9880:Post–Turing
9519:Berkeley DB
9156:OpenSolaris
9059:Grid Engine
9037:Performance
8967:Java System
8937:OpenWindows
8678:Cobalt Qube
8663:JavaStation
8314:AMD Am29000
7951:December 6,
7795:December 6,
7764:December 4,
7737:December 6,
7586:January 25,
7553:October 10,
7298:February 3,
7267:December 8,
7235:December 6,
7203:November 5,
7166:December 6,
7134:December 6,
7083:December 6,
7055:December 6,
6991:December 6,
6949:December 6,
6878:January 14,
6751:January 21,
6721:October 13,
6078:open source
6030:Source code
6024:, a 32-bit
6015:open source
5961:OpenIndiana
5953:OpenSolaris
5640:1.2/2.5/3.3
5492:256×2+256×4
5363:1×(32+2)=34
4966:1, 1.8, 2.5
4817:(Jupiter-E
4712:Oracle/Sun
4495:SPARC64 VII
4023:(Jalapeño)
3353:SPARC64 III
3098:(Spitfire)
2949:75–90
2799:40–90
2779:1, 2, 8, 16
2776:1, 2, 8, 16
2694:33–60
2688:I (Viking)
2641:40–50
2584:Matsushita
1761:do nothing
1608:(greater),
707:SPARC is a
536:memory page
419:clock cycle
372:SPARC64 XII
285:workstation
104:(shipments)
11718:Categories
11608:management
11503:Multiplier
11364:Logic gate
11354:Sequential
11261:Functional
11241:Clock rate
11214:Data cache
11187:Components
11168:Multi-core
11156:Core count
10646:Preemptive
10550:Pipelining
10533:Bit-serial
10476:Wide-issue
10421:Structural
10343:Tilera ISA
10309:MicroBlaze
10279:ETRAX CRIS
10174:Comparison
10019:Load–store
9999:Endianness
9700:StorageTek
9694:Enterprise
9607:Middleware
9573:JDeveloper
9458:JD Edwards
9438:PeopleSoft
9375:Safra Catz
9274:Tarantella
9269:StorageTek
8992:VirtualBox
8957:StarOffice
8719:UltraSPARC
8714:SuperSPARC
8709:microSPARC
8692:Processors
8683:Cobalt RaQ
8604:Enterprise
8352:Intel i860
8289:MicroBlaze
7981:August 28,
7881:January 8,
7850:January 8,
7644:August 29,
7612:August 29,
7521:August 12,
7489:August 29,
7457:August 29,
7425:August 29,
7393:August 29,
7361:August 29,
6523:January 8,
6492:January 8,
6279:"Timeline"
6224:References
6113:K computer
6111:Fujitsu's
6106:SPARC64 fx
6000:Windows NT
5996:Intergraph
5796:Power (W)
5421:>10,000
5296:(Athena+)
5294:SPARC64 X+
4497:(Jupiter)
4339:SPARC64 VI
4288:(Niagara)
4235:(Panther)
4127:SPARC64 V+
3870:(Cheetah)
3766:SPARC64 GP
3714:SPARC64 GP
3301:SPARC64 II
3096:UltraSPARC
3044:TurboSPARC
2791:hyperSPARC
2686:SuperSPARC
2633:microSPARC
2594:1990–1991
2458:Power (W)
1655:-relative
1588:(equals),
757:interrupts
747:register.
586:Matsushita
532:load–store
523:endianness
462:Intel i960
454:call stack
357:Matsushita
335:providing
315:(SMP) and
309:UltraSPARC
301:SuperSPARC
182:Extensions
169:(Big → Bi)
162:Endianness
133:Load–store
77:Introduced
11542:Circuitry
11462:Microcode
11386:Registers
11229:coherence
11204:CPU cache
11062:Word size
10727:Processor
10371:Execution
10274:DEC Alpha
10252:Power ISA
10068:Cognitive
9875:Universal
9644:GlassFish
9634:Coherence
9624:SOA Suite
9619:WebCenter
9497:Databases
9400:Mark Hurd
9161:OpenSPARC
9125:Community
9104:Education
8987:GlassFish
8814:Fireplane
8347:DEC PRISM
8293:PicoBlaze
8245:Power ISA
8063:OpenSPARC
6976:OpenSPARC
6649:March 20,
6217:OpenSPARC
6167:OpenSPARC
6085:RAMP Gold
6067:OpenSPARC
6044:OpenSPARC
5994:In 1993,
5851:(FPU), a
5845:LSI Logic
5665:(Russia)
5450:SPARC S7
5302:3200–3700
5243:SPARC M6
5193:SPARC M5
5091:(Athena)
5089:SPARC64 X
4992:2850–3000
4936:(Russia)
4829:2667–3000
4182:(Jaguar)
4074:SPARC64 V
3326:Multichip
3274:Multichip
2985:1024–2048
2739:SPARClite
2541:1989–1992
2364:LSI Logic
1727:mnemonic
1537:Branching
1076:CALL disp
731:Registers
669:OpenSPARC
582:LSI Logic
470:AMD 29000
395:mainframe
325:Solbourne
283:computer
202:Registers
174:Page size
150:Branching
11480:Datapath
11173:Manycore
11145:variable
10983:Hardware
10619:Temporal
10299:OpenRISC
9994:Cellular
9984:Dataflow
9977:modified
9760:Category
9690:T-Series
9681:Sun Fire
9583:NetBeans
9524:TimesTen
9483:NetSuite
9478:Sunopsis
9473:TimesTen
9463:RightNow
9443:Hyperion
9306:Category
9249:MySQL AB
9234:Gridware
9189:Bill Joy
9146:NetBeans
9090:Fortress
9085:picoJava
9073:Research
8881:Software
8819:LOM port
8778:SPARC T5
8773:SPARC T4
8768:SPARC T3
8451:Hardware
8240:OpenRISC
8221:eSi-RISC
8201:Blackfin
7975:Archived
7945:archived
7906:archived
7875:archived
7870:Green500
7815:Green500
7789:archived
7758:archived
7731:archived
7693:Archived
7664:Archived
7635:Archived
7606:Archived
7577:Archived
7544:Archived
7512:Archived
7448:Archived
7416:Archived
7384:Archived
7352:Archived
7320:Archived
7292:archived
7261:archived
7229:archived
7194:archived
7160:archived
7125:archived
7092:citation
7049:archived
7020:archived
6985:archived
6940:archived
6872:Archived
6745:Archived
6715:Archived
6678:archived
6595:Archived
6517:archived
6486:archived
6452:June 13,
6443:Archived
6386:Archived
6353:Archived
6326:June 30,
6320:Archived
6293:June 30,
6287:Archived
6256:June 30,
6250:Archived
6177:See also
6156:Tianhe-2
6138:Green500
6130:Green500
6076:A fully
5969:NeXTSTEP
5793:IO pins
5567:8×32=256
5551:SPARC M8
5503:Fujitsu
5415:8×32=256
5399:SPARC M7
5351:Fujitsu
5299:Fujitsu
5158:8×16=128
5142:SPARC T5
5094:Fujitsu
5041:Fujitsu
4984:SPARC T4
4881:GR712RC
4826:Fujitsu
4779:8×16=128
4767:(China)
4724:8×16=128
4707:SPARC T3
4607:Fujitsu
4604:(Venus)
4563:canceled
4500:Fujitsu
4344:Fujitsu
4132:Fujitsu
4079:Fujitsu
3510:(Sabre)
3190:512–1024
3140:512–1024
3035:512–1024
2767:144, 176
2532:Various
2455:IO pins
1733:purpose
851:IEEE 754
775:Mnemonic
508:run time
413:and the
401:Features
380:SPARC M8
140:Encoding
54:Designer
18:SPARC V8
11656:Related
11587:Quantum
11577:Digital
11572:Boolean
11470:Counter
11369:Quantum
11130:512-bit
11125:256-bit
11120:128-bit
10963:(MPSoC)
10948:on chip
10946:Systems
10764:(FLOPS)
10577:Process
10426:Control
10408:Hazards
10294:Itanium
10289:Unicore
10247:PowerPC
9972:Harvard
9932:Pointer
9927:Counter
9885:Quantum
9534:Essbase
9283:Slogans
9166:OpenJDK
9001:Storage
8962:iPlanet
8927:SunView
8893:Solaris
8834:Neptune
8704:MB86900
8480:Sun386i
8458:Systems
8389:PowerPC
8380:PA-RISC
8332:Clipper
8281:Unicore
8250:Renesas
8172:IBM 801
8165:Origins
8107:YouTube
8075:at the
8065:at the
8055:at the
8045:at the
8032:at the
8006:at the
7912:May 27,
7329:May 17,
7287:Fujitsu
7189:Fujitsu
7026:May 23,
6936:Fujitsu
6792:May 27,
6571:May 27,
6195:Sparcle
6173:score.
6171:LINPACK
6051:Verilog
5981:OpenBSD
5977:FreeBSD
5957:illumos
5945:Solaris
5758:16–8192
5561:OSA2017
5555:Oracle
5515:8×12=96
5459:OSA2015
5453:Oracle
5409:OSA2015
5403:Oracle
5311:2×16=32
5258:8×12=96
5252:OSA2011
5246:Oracle
5202:OSA2011
5196:Oracle
5152:OSA2011
5146:Oracle
5106:2×16=32
5053:1x16=16
4995:OSA2011
4989:Oracle
4911:1.8/3.3
4874:LEON3FT
4773:UA2007?
4701:—|none
4689:1.8/3.3
4655:LEON2FT
4566:2×16=32
4076:(Zeus)
3646:1.5–1.7
3249:SPARC64
2935:128–256
2835:128–256
2484:Fujitsu
2359:Hyundai
2343:Fujitsu
2339:(ESTEC)
831:I0...I7
817:L0...L7
803:O0...O7
789:G0...G7
590:Philips
574:Fujitsu
542:History
525:of the
415:IBM 801
368:Fujitsu
353:Fujitsu
329:Fujitsu
321:CC-NUMA
259:(RISC)
255:) is a
109:Version
98: (
85: (
11592:Switch
11582:Analog
11320:(IMC)
11291:(MMU)
11140:others
11115:64-bit
11110:48-bit
11105:32-bit
11100:24-bit
11095:16-bit
11090:15-bit
11085:12-bit
10922:Mobile
10838:Stream
10833:Barrel
10828:Vector
10817:(GPU)
10776:(SUPS)
10744:(IPC)
10596:Memory
10589:Vector
10572:Thread
10555:Scalar
10357:Others
10304:RISC-V
10269:SuperH
10238:Power
10234:MIPS-X
10209:PDP-11
10058:Fabric
9810:Models
9639:Tuxedo
9555:PL/SQL
9514:InnoDB
9488:Cerner
9448:Siebel
9264:SavaJe
9181:People
9064:Lustre
8947:Studio
8734:Gemini
8375:M·CORE
8366:MIPS-X
8286:Xilinx
8276:Sunway
8266:RISC-V
8257:SuperH
8191:Active
8116:Curlie
7940:Nvidia
7901:TOP500
7839:TOP500
7784:TOP500
7729:(11),
6909:
6562:
6513:OSNews
6160:TOP500
6134:TOP500
6125:TOP500
6121:VIIIfx
6117:TOP500
5987:, and
5985:NetBSD
5949:JavaOS
5769:Model
5610:GR740
5597:65536
5545:32768
5542:512×12
5495:16384
5465:8×8=64
5445:65536
5442:256×24
5288:49152
5285:128×12
5238:49152
5208:8×6=48
5185:128×16
5001:8×8=64
4806:512×16
4718:UA2007
4459:8×8=64
4453:UA2007
4409:8×8=64
4403:UA2007
4303:4×8=32
4297:UA2005
4280:32768
3988:130 Cu
3938:130 Al
3888:180 Al
3681:180 Cu
3631:180 Al
2730:0–2048
2624:0–256
2597:1x1=1
2588:33–36
2529:SPARC
2431:Model
2414:Weitek
2394:Prisma
1687:%lo(X)
1683:%hi(X)
1511:MULSCC
1491:MULSCC
1487:MULSCC
1457:, and
1402:, and
1390:, and
1266:opcode
1240:opcode
1217:111000
1191:111000
1122:opcode
1096:opcode
786:global
721:memory
600:, and
527:32-bit
503:Tagged
477:64-bit
468:, and
376:Oracle
327:, and
305:64-bit
289:server
277:32-bit
118:Design
11648:(PPW)
11606:Power
11498:Adder
11374:Array
11341:Logic
11302:(TLB)
11285:(FPU)
11279:(AGU)
11273:(ALU)
11263:units
11199:Cache
11080:8-bit
11075:4-bit
11070:1-bit
11034:(TPU)
11028:(DSP)
11022:(PPU)
11016:(VPU)
11005:(GPU)
10974:(NoC)
10957:(SoC)
10892:(PoP)
10886:(SiP)
10880:(MCM)
10821:GPGPU
10811:(CPU)
10801:Types
10782:(PPW)
10770:(TPS)
10758:(IPS)
10750:(CPI)
10521:Level
10332:S/390
10327:S/370
10322:S/360
10264:SPARC
10242:POWER
10125:TRIPS
10093:Types
9686:SPARC
9578:Forms
9509:MySQL
9116:BlueJ
9044:Cloud
8977:MySQL
8888:SunOS
8804:Sun4d
8797:Other
8699:SPARC
8651:X4500
8646:T2000
8609:10000
8557:Ultra
8552:Netra
8485:Sun-4
8475:Sun-3
8470:Sun-2
8465:Sun-1
8385:POWER
8342:CRISP
8327:AVR32
8324:Atmel
8309:Alpha
8271:SPARC
8112:SPARC
7696:(PDF)
7689:(PDF)
7638:(PDF)
7631:(PDF)
7580:(PDF)
7573:(PDF)
7547:(PDF)
7540:(PDF)
7515:(PDF)
7508:(PDF)
7483:(PDF)
7476:(PDF)
7451:(PDF)
7444:(PDF)
7419:(PDF)
7412:(PDF)
7387:(PDF)
7380:(PDF)
7355:(PDF)
7348:(PDF)
7323:(PDF)
7316:(PDF)
7197:(PDF)
7184:(PDF)
7128:(PDF)
7115:(PDF)
6971:(PDF)
6943:(PDF)
6932:(PDF)
6842:(PDF)
6681:(PDF)
6668:(PDF)
6608:FPU).
6446:(PDF)
6439:(PDF)
6348:ZDNet
6207:R1000
6183:ERC32
5989:Linux
5973:RTEMS
5951:, or
5941:SunOS
5818:Notes
5778:Year
5761:none
5713:LEON5
5707:none
5677:1×8=8
5658:R2000
5652:none
5622:1×4=4
5603:LEON4
5591:16×32
5588:32×32
5539:64×12
5536:64×12
5439:16×32
5436:16×32
5393:none
5390:12M×2
5387:64×34
5384:64×34
5341:none
5335:64×16
5332:64×16
5282:16×12
5279:16×12
5235:128×6
5188:8192
5182:16×16
5179:16×16
5136:none
5133:24576
5130:64×16
5127:64×16
5115:587.5
5083:none
5080:12288
5077:32×16
5074:32×16
5031:4096
5028:128×8
4978:none
4948:1×4=4
4929:R1000
4923:none
4917:4x4Kb
4914:4x4Kb
4893:1×2=2
4868:none
4865:12288
4838:2×4=8
4809:4096
4803:16×16
4800:16×16
4754:none
4671:1×1=1
4649:none
4619:1×8=8
4542:none
4512:2×4=8
4489:none
4439:none
4386:none
4380:128×2
4377:128×2
4356:2×2=4
4333:none
4250:1×2=2
4227:none
4224:16384
4197:1×2=2
4144:1×1=1
4091:1×1=1
4068:none
4038:1×1=1
4015:none
3985:1×1=1
3965:none
3935:1×1=1
3915:none
3885:1×1=1
3832:1×1=1
3782:1×1=1
3730:1×1=1
3708:none
3678:1×1=1
3658:none
3628:1×1=1
3605:none
3575:1×1=1
3555:none
3525:1×1=1
3502:none
3472:1×1=1
3452:none
3422:1×1=1
3369:1×1=1
3317:1×1=1
3265:1×1=1
3243:none
3213:1×1=1
3193:none
3163:1×1=1
3143:none
3113:1×1=1
3090:none
3060:1×1=1
3038:none
3008:1×1=1
2988:none
2958:1×1=1
2938:none
2908:1×1=1
2888:none
2858:1×1=1
2838:none
2808:1×1=1
2785:none
2755:1×1=1
2733:none
2703:1×1=1
2680:none
2650:1×1=1
2627:none
2571:none
2544:1×1=1
2524:none
2497:1×1=1
2440:Year
2410:TEMIC
2371:(MHS)
2328:(BIT)
2173:subcc
2163:deccc
2099:addcc
2089:inccc
2034:const
2012:const
1997:%reg2
1991:%reg1
1975:%reg2
1969:%reg1
1948:const
1939:subcc
1932:const
1905:%reg2
1899:%reg1
1896:subcc
1889:%reg2
1883:%reg1
1747:sethi
1678:SETHI
1571:ANNUL
1531:UDIVX
1527:SDIVX
893:Type
834:R...R
820:R...R
814:local
806:R...R
792:R...R
466:IA-64
442:stack
341:Atmel
293:Sun-3
281:Sun-4
249:SPARC
144:Fixed
40:SPARC
11626:ACPI
11359:Glue
11251:FIFO
11194:Core
10932:ASIP
10873:CPLD
10868:FPOA
10863:FPGA
10858:ASIC
10711:SPMD
10706:MIMD
10701:MISD
10694:SWAR
10674:SIMD
10669:SISD
10584:Data
10567:Task
10538:Word
10284:M32R
10229:MIPS
10192:sets
10159:ZISC
10154:NISC
10149:OISC
10144:MISC
10137:EPIC
10132:VLIW
10120:EDGE
10110:RISC
10105:CISC
10014:HUMA
10009:NUMA
9588:Apex
9565:IDEs
9550:Java
9424:list
9254:Pixo
9111:SCPs
8952:Java
8932:NeWS
8920:ZFS+
8903:NIS+
8849:SPOT
8824:MBus
8809:SBus
8788:MAJC
8783:Rock
8641:E25K
8626:Fire
8393:ROMP
8361:META
8356:i960
8337:CR16
8261:V850
8253:M32R
8235:MIPS
7983:2017
7953:2011
7914:2015
7883:2013
7852:2013
7797:2011
7766:2015
7739:2011
7704:2017
7672:2017
7646:2017
7614:2017
7588:2022
7555:2015
7523:2014
7491:2017
7459:2017
7427:2017
7395:2017
7363:2017
7331:2015
7300:2012
7269:2011
7237:2011
7205:2011
7168:2011
7136:2011
7098:link
7085:2011
7057:2011
7028:2010
6993:2011
6951:2011
6907:ISBN
6880:2020
6850:2023
6794:2023
6753:2019
6723:2015
6689:2015
6651:2021
6603:2011
6573:2023
6560:ISBN
6525:2013
6494:2013
6454:2016
6419:2022
6394:2017
6361:2017
6328:2019
6295:2019
6258:2019
6201:LEON
6146:XIfx
6144:and
6142:IXfx
6034:VHDL
6022:LEON
5959:and
5728:2019
5674:2018
5668:2000
5663:MCST
5649:2048
5619:2017
5564:2017
5558:5000
5527:1860
5521:5500
5512:2017
5506:4250
5489:16×8
5486:16×8
5471:????
5462:2016
5456:4270
5412:2015
5406:4133
5375:1001
5369:3750
5360:2014
5354:2200
5323:1500
5317:2990
5308:2014
5264:4270
5255:2013
5249:3600
5232:16×6
5229:16×6
5214:3900
5205:2013
5199:3600
5164:1500
5155:2013
5149:3600
5118:1500
5112:2950
5103:2012
5097:2800
5065:1442
5059:1870
5050:2012
5044:1850
5025:16×8
5022:16×8
4998:2011
4975:2048
4945:2011
4942:JPS2
4939:1000
4934:MCST
4920:none
4890:2011
4862:64×4
4859:64×4
4835:2010
4832:JPS2
4823:M3)
4785:????
4776:201?
4770:1800
4765:NUDT
4751:6144
4730:????
4721:2010
4715:1650
4668:2009
4646:6144
4643:32×8
4640:32×8
4631:1271
4616:2009
4610:2000
4593:2048
4578:2326
4560:????
4557:2300
4549:Rock
4539:6144
4536:64×4
4533:64×4
4509:2008
4506:JPS2
4486:4096
4471:1831
4456:2008
4436:4096
4421:1831
4406:2007
4353:2007
4350:JPS2
4330:3072
4315:1933
4300:2005
4277:2048
4262:1368
4247:2005
4244:JPS2
4215:1.35
4209:1368
4194:2004
4191:JPS2
4171:4096
4141:2004
4138:JPS1
4118:2048
4088:2003
4085:JPS1
4065:1024
4044:87.5
4035:2003
4032:JPS1
4012:8192
3997:1368
3982:2001
3979:JPS1
3962:8192
3947:1368
3932:2001
3929:JPS1
3912:8192
3897:1368
3882:2001
3879:JPS1
3859:2048
3829:2000
3809:8192
3788:30.2
3757:8192
3736:30.2
3727:2000
3693:17.6
3675:2000
3625:1999
3602:2048
3572:1998
3522:1997
3469:1999
3419:1997
3396:8192
3375:17.6
3366:1998
3314:1996
3262:1995
3210:1996
3160:1995
3110:1995
3057:1996
3005:1995
2955:1994
2905:1994
2885:none
2855:1994
2805:1993
2782:none
2752:1992
2718:14.3
2700:1992
2677:none
2659:225?
2647:1992
2603:1.0
2568:none
2521:none
2503:0.11
2500:1300
2494:1986
2287:%reg
2284:orcc
2277:%reg
2262:%reg
2256:%reg
2240:%reg
2225:%reg
2213:%reg
2210:xnor
2203:%reg
2188:%reg
2176:%reg
2166:%reg
2151:%reg
2139:%reg
2129:%reg
2114:%reg
2102:%reg
2092:%reg
2077:%reg
2065:%reg
2055:%reg
2040:%reg
2018:%reg
1942:%reg
1926:%reg
1855:clrb
1830:clrh
1793:%reg
1771:%reg
1685:and
1665:JMPL
1663:The
1657:word
1649:CALL
1647:The
1622:BNEG
1618:BPOS
1602:BLEU
1523:MULX
1507:SDIV
1503:UDIV
1499:SMUL
1495:UMUL
1459:XNOR
1451:ANDN
1409:The
1404:STQF
1400:STDF
1392:LDQF
1388:LDDF
1382:The
1369:LDSW
1357:LDUW
1330:LDSH
1326:LDUH
1322:LDSB
1318:LDUB
1252:RS2
1203:RS2
1177:RS2
1154:FS2
1108:RS2
896:Bit
697:SPEC
629:the
560:IEEE
521:The
516:Lisp
510:for
407:RISC
359:and
287:and
193:Open
129:Type
123:RISC
100:1987
93:1987
87:1986
80:1986
69:Bits
11621:APM
11616:PMU
11508:CPU
11465:ROM
11236:Bus
10853:PAL
10528:Bit
10314:LMC
10219:ARM
10214:x86
10204:VAX
9529:Rdb
9453:BEA
9433:Sun
9028:ZFS
9023:QFS
8982:xVM
8915:ZFS
8910:NFS
8898:NIS
8673:Ray
8636:15K
8631:12K
8530:IPX
8525:IPC
8216:AVR
8211:ARM
8206:ARC
8114:at
8105:on
7933:mp4
6899:doi
6482:GNU
6038:GPL
5725:V8E
5683:500
5646:4x4
5643:4x4
5616:V8E
5613:250
5524:795
5338:24M
5326:392
5320:600
5267:643
5217:511
5167:478
5121:270
5068:110
5062:484
5016:240
5010:403
5007:855
4957:128
4954:180
4908:1.5
4896:180
4887:V8E
4884:100
4853:160
4788:???
4739:139
4733:371
4683:196
4674:180
4662:100
4628:513
4625:760
4575:396
4527:150
4521:445
4518:600
4468:342
4465:503
4418:342
4415:503
4374:1.1
4365:422
4362:540
4321:1.3
4312:340
4309:300
4268:1.1
4259:336
4256:295
4212:108
4206:356
4200:130
4168:128
4165:128
4156:279
4153:297
4150:400
4115:128
4112:128
4109:1.2
4103:269
4100:289
4097:190
4094:130
4056:1.3
4050:959
4047:206
4041:130
4003:1.6
3994:232
3953:1.6
3903:1.6
3894:330
3876:600
3856:128
3853:128
3835:130
3806:128
3803:128
3800:1.5
3785:150
3770:--
3754:128
3751:128
3748:1.8
3739:217
3733:180
3705:512
3696:1.7
3690:370
3655:256
3640:370
3593:1.9
3587:587
3581:5.4
3578:250
3543:1.9
3537:587
3534:156
3531:5.4
3528:350
3490:1.9
3484:521
3481:126
3478:5.4
3475:250
3440:2.5
3434:521
3431:149
3428:5.4
3425:350
3387:2.5
3378:240
3372:240
3341:128
3338:128
3335:3.3
3329:286
3320:350
3289:128
3286:128
3283:3.8
3277:286
3268:400
3240:512
3231:3.3
3219:1.7
3216:350
3181:3.3
3175:521
3172:265
3169:5.2
3166:420
3154:200
3131:3.3
3125:521
3122:315
3119:3.8
3116:470
3087:512
3078:3.5
3072:416
3069:132
3066:3.0
3063:350
3026:3.3
3014:1.5
3011:350
2967:299
2964:3.1
2961:800
2926:3.3
2914:1.5
2911:400
2876:3.3
2870:321
2867:233
2864:2.3
2861:500
2814:1.5
2811:500
2749:V8E
2715:293
2709:3.1
2706:800
2665:2.5
2662:288
2656:0.8
2653:800
2591:V8
2509:256
2299:%g0
2293:%g0
2274:tst
2250:%g0
2247:sub
2237:neg
2219:%g0
2200:not
2136:sub
2126:dec
2062:add
2052:inc
2028:%g0
2009:mov
1985:%g0
1966:mov
1954:%g0
1923:cmp
1911:%g0
1880:cmp
1865:%g0
1862:stb
1840:%g0
1837:sth
1815:%g0
1805:clr
1787:%g0
1781:%g0
1768:clr
1756:%g0
1740:nop
1698:set
1638:BVS
1634:BVC
1630:BCS
1626:BCC
1614:BGU
1610:BGE
1598:BLE
1590:BNE
1566:fcc
1564:or
1562:icc
1551:x86
1519:WRY
1515:RDY
1467:not
1455:ORN
1447:XOR
1439:AND
1435:SUB
1431:ADD
1396:STF
1384:LDF
1377:STX
1373:LDX
1365:STW
1346:STD
1342:STH
1338:STB
1334:LDD
1269:RS1
1243:RS1
1220:RS1
1194:RS1
1174:opc
1171:RS1
1151:opf
1148:FS1
1125:RS1
1099:RS1
1068:111
1065:ccc
1048:110
1045:fcc
1028:010
1025:icc
1008:100
800:out
761:CWP
752:CWP
745:PSR
741:CWP
737:CWP
631:VIS
578:ICL
391:ARM
378:'s
370:'s
239:Sun
186:VIS
11720::
11555:3D
9692:,
8597:80
8592:60
8587:30
8582:24
8577:10
8540:ZX
8535:LX
8520:20
8515:10
8391:,
8387:,
8373:,
8354:,
8291:,
8259:,
8255:,
8228:,
7973:.
7969:.
7943:,
7937:,
7898:,
7867:,
7836:,
7812:,
7781:,
7727:55
7725:,
7721:,
7284:,
7259:,
7253:,
7227:,
7221:,
7186:,
7158:,
7152:,
7123:,
7117:,
7094:}}
7090:{{
7073:,
7043:,
7018:,
7012:,
6983:,
6979:,
6973:,
6934:,
6905:.
6870:.
6866:.
6802:^
6761:^
6743:.
6739:.
6713:.
6709:.
6705:.
6670:,
6605:.
6589:.
6558:.
6532:^
6511:,
6484:,
6480:,
6474:,
6456:.
6427:^
6410:.
6384:.
6378:.
6351:.
6345:.
6318:.
6314:.
6303:^
6285:.
6281:.
6266:^
6244:.
6231:^
6070:T2
6061:S1
6047:T1
5991:.
5983:,
5979:,
5975:,
5971:,
5947:,
5943:,
5827:^
5820::
5680:28
5625:32
5570:20
5518:20
5468:20
5418:20
5366:20
5314:28
5261:28
5211:28
5161:28
5109:28
5056:40
5004:40
4972:16
4969:32
4963:15
4951:90
4841:65
4820:or
4794:65
4782:40
4748:16
4727:40
4695:32
4692:16
4665:V8
4634:58
4622:45
4596:?
4590:32
4587:32
4569:65
4551:)
4515:65
4483:16
4462:65
4433:16
4424:95
4412:65
4359:90
4327:16
4318:72
4306:90
4274:64
4271:64
4265:90
4253:90
4221:32
4218:64
4203:66
4174:—
4159:65
4147:90
4121:—
4106:40
4062:32
4059:64
4053:52
4009:32
4006:64
4000:50
3991:29
3959:32
3956:64
3941:29
3909:32
3906:64
3900:53
3891:29
3862:—
3826:V9
3812:—
3776:V9
3760:—
3724:V9
3702:16
3699:16
3672:V9
3652:16
3649:16
3643:13
3622:V9
3599:16
3596:16
3590:21
3569:V9
3549:16
3546:16
3540:21
3519:V9
3496:16
3493:16
3487:21
3466:V9
3446:16
3443:16
3437:25
3416:V9
3399:—
3393:64
3390:64
3363:V9
3347:—
3332:64
3311:V9
3295:—
3280:50
3259:V9
3237:16
3234:16
3207:V8
3187:16
3184:16
3157:V9
3137:16
3134:16
3128:30
3107:V9
3084:16
3081:16
3054:V8
3002:V8
2982:20
2979:16
2973:16
2952:V8
2902:V8
2882:16
2852:V8
2826:5?
2802:V8
2727:20
2724:16
2697:V8
2644:V8
2621:8
2618:8
2615:—
2612:—
2609:—
2606:—
2600:—
2582:,
2538:V7
2491:V7
2025:or
1982:or
1812:st
1778:or
1708:ld
1606:BG
1594:BL
1586:BE
1582:BN
1578:BA
1471:cc
1453:,
1445:,
1443:OR
1441:,
1437:,
1433:,
1398:,
1386:,
1361:ST
1353:LD
1316:,
1314:ST
1312:,
1310:LD
1263:RD
1260:11
1237:RD
1234:11
1214:RD
1211:10
1188:RD
1185:10
1165:RD
1162:10
1142:FD
1139:10
1119:RD
1116:10
1093:RD
1090:10
1079:01
1059:00
1039:00
1019:00
1005:RD
1002:00
994:0
964:10
961:11
958:12
955:13
952:14
949:15
946:16
943:17
940:18
937:19
934:20
931:21
928:22
925:23
922:24
919:25
916:26
913:27
910:28
907:29
904:30
901:31
828:in
596:,
592:,
588:,
584:,
580:,
576:,
572:,
514:,
512:ML
472:.
464:,
438:g0
429:.
355:,
351:,
347:,
343:,
237:A
167:Bi
9794:e
9787:t
9780:v
9696:)
9688:(
9426:)
9338:e
9331:t
9324:v
8572:5
8567:2
8562:1
8510:5
8505:4
8500:2
8495:1
8427:e
8420:t
8413:v
8149:e
8142:t
8135:v
7985:.
7935:)
7931:(
7706:.
7674:.
7648:.
7616:.
7590:.
7557:.
7525:.
7493:.
7461:.
7429:.
7397:.
7365:.
7333:.
7100:)
6915:.
6901::
6882:.
6852:.
6827:.
6796:.
6755:.
6725:.
6653:.
6575:.
6421:.
6396:.
6363:.
6330:.
6297:.
6260:.
6158:(
6095:.
6057:.
6040:.
5755:?
5752:?
5749:—
5746:—
5743:—
5740:—
5737:—
5734:?
5731:?
5722:—
5704:?
5701:?
5698:?
5695:?
5692:?
5689:—
5686:?
5671:?
5637:—
5634:—
5631:—
5628:—
5585:?
5582:?
5579:?
5576:?
5573:?
5533:?
5530:?
5483:?
5480:?
5477:?
5474:?
5433:?
5430:?
5427:?
5424:?
5381:?
5378:?
5372:?
5329:?
5276:?
5273:?
5270:?
5226:?
5223:?
5220:?
5176:?
5173:?
5170:?
5124:?
5071:?
5019:?
5013:?
4960:—
4905:—
4902:—
4899:—
4856:—
4850:—
4847:—
4844:—
4797:?
4791:?
4745:8
4742:?
4736:?
4698:—
4686:1
4680:—
4677:—
4637:?
4584:?
4581:?
4572:?
4530:—
4524:—
4480:8
4477:—
4474:—
4430:8
4368:—
4324:8
4162:1
3950:—
3944:—
3850:—
3847:—
3844:—
3841:—
3838:—
3797:—
3794:—
3791:—
3779:—
3745:—
3742:—
3687:—
3684:—
3637:—
3634:—
3584:—
3384:—
3381:—
3344:—
3323:—
3292:—
3271:—
3228:—
3225:—
3222:—
3178:—
3075:7
3032:8
3029:0
3023:—
3020:—
3017:—
2976:—
2970:—
2932:8
2929:0
2923:—
2920:—
2917:—
2879:8
2873:5
2832:8
2829:0
2823:—
2820:—
2817:—
2770:—
2764:—
2761:—
2758:—
2721:5
2712:—
2674:4
2671:2
2668:5
2562:—
2559:—
2553:—
2515:—
2512:—
2506:—
2296:,
2290:,
2259:,
2253:,
2222:,
2216:,
2185:,
2182:1
2179:,
2148:,
2145:1
2142:,
2111:,
2108:1
2105:,
2074:,
2071:1
2068:,
2037:,
2031:,
2015:,
1994:,
1988:,
1972:,
1951:,
1945:,
1929:,
1908:,
1902:,
1886:,
1868:,
1843:,
1818:,
1790:,
1784:,
1753:,
1750:0
1272:1
1249:0
1246:0
1223:1
1200:0
1197:0
1128:1
1105:0
1102:0
1062:A
1042:A
1022:A
991:1
988:2
985:3
982:4
979:5
976:6
973:7
970:8
967:9
755:(
530:(
319:(
251:(
217:)
102:)
89:)
64:)
34:.
20:)
Text is available under the Creative Commons Attribution-ShareAlike License. Additional terms may apply.
