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Category:Electronic design automation

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This category has the following 9 subcategories, out of 14 total.
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The following 64 pages are in this category, out of 99 total.
635: 541: 15: 787: 355:Pages in category "Electronic design automation" 47: 420:Input/output Buffer Information Specification 572:Potential applications of carbon nanotubes 270:Electronic design automation organizations 661:Semiconductor intellectual property core 557:Placement (electronic design automation) 360:This list may not reflect recent changes 448:List of electrical engineering software 788: 676:Signoff (electronic design automation) 310:Satisfiability modulo theories solvers 149: 686:Silvaco Data Systems v. Intel Corp. 619:Resolution enhancement technologies 290:Electronic design automation people 13: 760:Universal Verification Methodology 369: 161: 148: 14: 812: 666:Semiconductor process simulation 18: 189:Hardware verification languages 631:Satisfiability modulo theories 176:Hardware description languages 1: 656:Semiconductor device modeling 547:Physical design (electronics) 530:Open Verification Methodology 334:Timing in electronic circuits 353: 39:Electronic design automation 7: 496:Multi-project wafer service 10: 817: 743:Transaction-level modeling 32:The main article for this 31: 755:Ultra-large-scale systems 582:Power network design (IC) 425:Integrated circuit layout 597:Programmable logic array 592:Programmable Array Logic 587:Power optimization (EDA) 253:Electronics optimization 609:Register-transfer level 469:Low-power FSM synthesis 398:High-level verification 567:Platform-based design 481:Mask data preparation 388:Hardware watermarking 491:Multi-channel length 393:High-level synthesis 383:Hardware obfuscation 801:Digital electronics 711:Symbolic simulation 691:Simulation software 209:IEEE DASC standards 706:Substrate coupling 454:Logic optimization 26:Electronics portal 796:Electronic design 772:VISC architecture 646:Schematic capture 513:Network on a chip 229:Network on a chip 808: 733:Test compression 681:Silicon compiler 671:Signal integrity 651:Schematic editor 614:Rent's rule 459:Logic simulation 450: 410:IC layout editor 339: 332: 315: 295: 275: 268: 258: 251: 234: 214: 194: 181: 174: 28: 23: 22: 816: 815: 811: 810: 809: 807: 806: 805: 786: 785: 784: 778: 777: 776: 764: 747: 738:Touchstone file 720: 623: 601: 552:Place and route 534: 522: 500: 473: 464:Logic synthesis 446: 429: 402: 352: 346: 345: 344: 341: 340: 329: 320: 317: 316: 300: 297: 296: 280: 277: 276: 265: 260: 259: 248: 239: 236: 235: 219: 216: 215: 199: 196: 195: 183: 182: 171: 147: 146: 145: 144: 50: 43: 24: 17: 12: 11: 5: 814: 804: 803: 798: 783:) (next page) 775: 774: 768: 765: 763: 762: 757: 751: 748: 746: 745: 740: 735: 730: 728:Technology CAD 724: 721: 719: 718: 716:Systems design 713: 708: 703: 701:Stuck-at fault 698: 693: 688: 683: 678: 673: 668: 663: 658: 653: 648: 643: 638: 633: 627: 624: 622: 621: 616: 611: 605: 602: 600: 599: 594: 589: 584: 579: 574: 569: 564: 559: 554: 549: 544: 538: 535: 533: 532: 526: 523: 521: 520: 515: 510: 504: 501: 499: 498: 493: 488: 483: 477: 474: 472: 471: 466: 461: 456: 451: 444: 439: 433: 430: 428: 427: 422: 417: 412: 406: 403: 401: 400: 395: 390: 385: 380: 374: 371: 370: 356: 351:) (next page) 343: 342: 328: 327: 324: 321: 319: 318: 308: 307: 304: 301: 299: 298: 288: 287: 284: 281: 279: 278: 264: 263: 261: 247: 246: 243: 240: 238: 237: 227: 226: 223: 220: 218: 217: 207: 206: 203: 200: 198: 197: 187: 186: 184: 170: 169: 166: 163: 162: 152: 143: 142: 62: 57: 51: 49: 46: 44: 30: 29: 9: 6: 4: 3: 2: 813: 802: 799: 797: 794: 793: 791: 782: 781:previous page 773: 770: 769: 766: 761: 758: 756: 753: 752: 749: 744: 741: 739: 736: 734: 731: 729: 726: 725: 722: 717: 714: 712: 709: 707: 704: 702: 699: 697: 696:Standard cell 694: 692: 689: 687: 684: 682: 679: 677: 674: 672: 669: 667: 664: 662: 659: 657: 654: 652: 649: 647: 644: 642: 639: 637: 634: 632: 629: 628: 625: 620: 617: 615: 612: 610: 607: 606: 603: 598: 595: 593: 590: 588: 585: 583: 580: 578: 575: 573: 570: 568: 565: 563: 560: 558: 555: 553: 550: 548: 545: 543: 540: 539: 536: 531: 528: 527: 524: 519: 516: 514: 511: 509: 506: 505: 502: 497: 494: 492: 489: 487: 484: 482: 479: 478: 475: 470: 467: 465: 462: 460: 457: 455: 452: 449: 445: 443: 442:Lee algorithm 440: 438: 435: 434: 431: 426: 423: 421: 418: 416: 413: 411: 408: 407: 404: 399: 396: 394: 391: 389: 386: 384: 381: 379: 376: 375: 372: 368:) (next page) 367: 366:previous page 363: 361: 354: 350: 349:previous page 335: 331: 326: 325: 322: 311: 306: 305: 302: 291: 286: 285: 282: 271: 267: 262: 254: 250: 245: 244: 241: 230: 225: 224: 221: 210: 205: 204: 201: 190: 185: 177: 173: 168: 167: 164: 160:) (next page) 159: 158:previous page 155: 151:Subcategories 150: 141: 138: 135: 132: 129: 126: 123: 120: 117: 114: 111: 108: 105: 102: 99: 96: 93: 90: 87: 84: 81: 78: 75: 72: 69: 66: 63: 61: 58: 56: 53: 52: 41: 40: 35: 27: 21: 16: 577:Power gating 518:Noise margin 437:Ladder logic 357: 153: 37: 486:Maze runner 415:IEC 61131-3 338:(1 C, 13 P) 257:(1 C, 20 P) 180:(2 C, 40 P) 790:Categories 562:Planar SAT 274:(1 C, 2 P) 641:Schematic 48:Contents 378:Handel-C 34:category 508:Netlist 294:(38 P) 213:(10 P) 636:SCALD 542:PBIST 314:(3 P) 233:(4 P) 193:(9 P) 60:0–9 55:Top 36:is 792:: 362:. 336:‎ 312:‎ 292:‎ 272:‎ 255:‎ 231:‎ 211:‎ 191:‎ 178:‎ 779:( 767:V 750:U 723:T 626:S 604:R 537:P 525:O 503:N 476:M 432:L 405:I 373:H 364:( 347:( 323:T 303:S 283:P 242:O 222:N 202:I 165:H 156:( 140:Z 137:Y 134:X 131:W 128:V 125:U 122:T 119:S 116:R 113:Q 110:P 107:O 104:N 101:M 98:L 95:K 92:J 89:I 86:H 83:G 80:F 77:E 74:D 71:C 68:B 65:A 42:.

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