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This category has the following 7 subcategories, out of 14 total.
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321:
The following 59 pages are in this category, out of 99 total.
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318:Pages in category "Electronic design automation"
47:
351:Input/output Buffer Information Specification
503:Potential applications of carbon nanotubes
233:Electronic design automation organizations
592:Semiconductor intellectual property core
488:Placement (electronic design automation)
323:This list may not reflect recent changes
379:List of electrical engineering software
719:
607:Signoff (electronic design automation)
273:Satisfiability modulo theories solvers
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617:Silvaco Data Systems v. Intel Corp.
550:Resolution enhancement technologies
253:Electronic design automation people
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691:Universal Verification Methodology
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597:Semiconductor process simulation
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562:Satisfiability modulo theories
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478:Physical design (electronics)
461:Open Verification Methodology
297:Timing in electronic circuits
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39:Electronic design automation
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427:Multi-project wafer service
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674:Transaction-level modeling
32:The main article for this
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686:Ultra-large-scale systems
513:Power network design (IC)
356:Integrated circuit layout
528:Programmable logic array
523:Programmable Array Logic
518:Power optimization (EDA)
216:Electronics optimization
540:Register-transfer level
400:Low-power FSM synthesis
498:Platform-based design
412:Mask data preparation
422:Multi-channel length
732:Digital electronics
642:Symbolic simulation
622:Simulation software
172:IEEE DASC standards
637:Substrate coupling
385:Logic optimization
26:Electronics portal
727:Electronic design
703:VISC architecture
577:Schematic capture
444:Network on a chip
192:Network on a chip
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664:Test compression
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449:Noise margin
368:Ladder logic
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417:Maze runner
346:IEC 61131-3
301:(1 C, 13 P)
220:(1 C, 20 P)
721:Categories
493:Planar SAT
237:(1 C, 2 P)
572:Schematic
48:Contents
34:category
439:Netlist
257:(38 P)
176:(10 P)
567:SCALD
473:PBIST
277:(3 P)
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