7518:, introduced in 2014, adds 512-bit wide vector registers (extending the 256-bit registers, which become the new registers' lower halves) and doubles their count to 32; the new registers are thus named zmm0 through zmm31. It adds eight mask registers, named k0 through k7, which may be used to restrict operations to specific parts of a vector register. Unlike previous instruction set extensions, AVX-512 is implemented in several groups; only the foundation ("AVX-512F") extension is mandatory. Most of the added instructions may also be used with the 256- and 128-bit registers.
5725:
vector register operand to a vector memory operand, leaving the remaining elements of the memory operand unchanged. On the AMD Jaguar processor architecture, this instruction with a memory source operand takes more than 300 clock cycles when the mask is zero, in which case the instruction should do nothing. This appears to be a design flaw.
7996:
instructions, the memory argument must use a memory addressing mode with the SIB-byte. Under this addressing mode, the base register and displacement are used to specify the starting address for the first row of the tile to load/store from/to memory โ the scale and index are used to specify a per-row
6034:
to provide a set of scalar/vector instructions using the xmm/ymm/zmm vector registers. FMA3 defines a set of 3-operand fused-multiply-add instructions that take three input operands and writes its result back to the first of them. FMA4 defines a set of 4-operand fused-multiply-add instructions that
5919:
Conditionally reads any number of elements from a SIMD vector memory operand into a destination register, leaving the remaining vector elements unread and setting the corresponding elements in the destination register to zero. Alternatively, conditionally writes any number of elements from a SIMD
5724:
Conditionally reads any number of elements from a SIMD vector memory operand into a destination register, leaving the remaining vector elements unread and setting the corresponding elements in the destination register to zero. Alternatively, conditionally writes any number of elements from a SIMD
6225:
For all FMA3 variants, the first two arguments must be xmm/ymm/zmm vector register arguments, while the last argument may be either a vector register or memory argument. Under AVX-512 and AVX10, the EVEX-encoded variants support EVEX-prefix-encoded broadcast, opmasks and rounding-controls.
2021:* The floating point single bitwise operations ANDPS, ANDNPS, ORPS and XORPS produce the same result as the SSE2 integer (PAND, PANDN, POR, PXOR) and double ones (ANDPD, ANDNPD, ORPD, XORPD), but can introduce extra latency for domain changes when applied values of the wrong type.
5738:
Permute In-Lane. Shuffle the 32-bit or 64-bit vector elements of one input operand. These are in-lane 256-bit instructions, meaning that they operate on all 256 bits with two separate 128-bit shuffles, so they can not shuffle across the 128-bit lanes.
5809:
Copy a 32-bit or 64-bit register operand to all elements of a XMM or YMM vector register. These are register versions of the same instructions in AVX1. There is no 128-bit version however, but the same effect can be simply achieved using VINSERTF128.
6058:
onwards. The FMA3/FMA4 extensions are not considered to be an intrinsic part of AVX or AVX2, although all Intel and AMD (but not
Zhaoxin) processors that support AVX2 also support FMA3. FMA3 instructions (in EVEX-encoded form) are, however,
6327:
The 10 fused-multiply-add operations and the 122 instruction variants they give rise to are given by the following table โ with FMA4 instructions highlighted with * and yellow cell coloring, and FMA3 instructions not highlighted:
6065:
The FMA3 and FMA4 instruction sets both define a set of 10 fused-multiply-add operations, all available in FP32 and FP64 variants. For each of these variants, FMA3 defines three operand orderings while FMA4 defines two.
80:
4208:
Computes the absolute differences of the packed unsigned byte integers; the 8 low differences and 8 high differences are then summed separately to produce two unsigned word integer results
5628:
Convert eight half-precision floating point values in memory or an XMM register (the bottom half of a YMM register) to eight single-precision floating-point values in a YMM register
7999:
These instructions are all interruptible โ an interrupt or memory exception taken in the middle of these instructions will cause progress tracking information to be written to
119:
in 1997, typically define sets of wide registers and instructions that subdivide these registers into fixed-size lanes and perform a computation for each lane in parallel.
5854:
Replaces either the lower half or the upper half of a 256-bit YMM register with the value of a 128-bit source operand. The other half of the destination is unchanged.
5708:
Replaces either the lower half or the upper half of a 256-bit YMM register with the value of a 128-bit source operand. The other half of the destination is unchanged.
5618:
Convert four half-precision floating point values in memory or the bottom half of an XMM register to four single-precision floating-point values in an XMM register
6276:
uses its bottom bit to select floating-point format (0=FP32, 1=FP64) and the remaining bits to select one of the 10 fused-multiply-add operations to perform.
5638:
Convert four single-precision floating point values in an XMM register to half-precision floating-point values in memory or the bottom half an XMM register
5933:
Shuffle the eight 32-bit vector elements of one 256-bit source operand into a 256-bit destination operand, with a register or memory operand as selector.
8027:
For all of the AMX matrix multiply instructions, the three arguments are required to be three different tile registers, or else the instruction will #UD.
5946:
Shuffle the four 64-bit vector elements of one 256-bit source operand into a 256-bit destination operand, with a register or memory operand as selector.
87:
5752:
Shuffle the four 128-bit vector elements of two 256-bit source operands into a 256-bit destination operand, with an immediate constant as selector.
8132:
6279:
For FMA4, operand ordering is controlled by the VEX.W bit. If VEX.W=0, then the third operand is the r/m operand specified by the instruction's
5650:
Convert eight single-precision floating point values in a YMM register to half-precision floating-point values in memory or an XMM register
6256:
with the opcode byte again working similar to the FP32/FP64 variants. (For the FMA4 instructions, no FP16 or BF16 variants are defined.)
8145:
7548:
register to configure the sizes of the actual matrices held in each of the eight tile-registers, and a set of instructions to perform
6244:
with the opcode byte working in the same way as for the FP32/FP64 variants. The AVX10.2 extension, published in 2024, similarly adds
7732:
Matrix multiplication of tiles, with source data interpreted as 8-bit integers and destination data accumulated as 32-bit integers.
5862:
Extracts either the lower half or the upper half of a 256-bit YMM register and copies the value to a 128-bit destination operand.
5716:
Extracts either the lower half or the upper half of a 256-bit YMM register and copies the value to a 128-bit destination operand.
48:
4959:
Insert a selected single-precision floating-point value at the specified destination element and zero out destination elements
54:
8045:
60:
7701:
Load a data tile from memory into AMX tile register, with a hint that data should not be kept in the nearest cache levels.
4970:
Extract one single-precision floating-point value at specified offset and store the result (zero-extended, if applicable)
8102:
7948:
Matrix multiply complex numbers from tmm2 with complex numbers from tmm3, accumulating imaginary part of result in tmm1.
6030:
instructions are introduced in x86 as two instruction set extensions, "FMA3" and "FMA4", both of which build on top of
5870:
8079:"The microarchitecture of Intel, AMD and VIA CPUs: An optimization guide for assembly programmers and compiler makers"
4219:
The following instructions can be used only on SSE registers, since by their nature they do not work on MMX registers
1637:
Extract Packed Single-Precision
Floating-Point 4-bit Sign Mask. The upper bits of the register are filled with zeros.
8197:
108:
73:
7922:
Matrix multiply complex numbers from tmm2 with complex numbers from tmm3, accumulating real part of result in tmm1.
5920:
vector register operand to a vector memory operand, leaving the remaining elements of the memory operand unchanged.
2759:
Convert with
Truncation Packed Single-Precision Floating-Point Values to Packed Signed Doubleword Integer Values
6009:
Shift right arithmetically. Allows variable shifts where each element is shifted according to the packed input.
5823:
Copy an 8, 16, 32 or 64-bit integer register or memory operand to all elements of a XMM or YMM vector register.
6043:
5760:
Set all YMM registers to zero and tag them as unused. Used when switching between 128-bit use and 256-bit use.
130:
MMX instructions operate on the mm registers, which are 64 bits wide. They are shared with the FPU registers.
6051:
5786:
8173:
5768:
Set the upper half of all YMM registers to zero. Used when switching between 128-bit use and 256-bit use.
6287:(8-bit immediate) part of the instruction. If VEX.W=1, then these two operands are swapped. For example:
6039:
5996:
Shift right logical. Allows variable shifts where each element is shifted according to the packed input.
5782:
5515:
2832:
SSE2 allows execution of MMX instructions on SSE registers, processing twice the amount of data at once.
5983:
Shift left logical. Allows variable shifts where each element is shifted according to the packed input.
8128:
7527:
6031:
5663:
5657:
2814:
2660:
Convert Packed Single-Precision
Floating-Point Values to Packed Double-Precision Floating-Point Values
2627:
Convert Packed Double-Precision
Floating-Point Values to Packed Single-Precision Floating-Point Values
6148:
At the assembly language level, the operand ordering is specified in the mnemonic of the instruction:
8192:
7792:
Matrix multiply unsigned bytes from tmm2 with unsigned bytes from tmm3, accumulating result in tmm1.
5386:
Convert 2 ร 4 packed signed doubleword integers into 8 packed unsigned word integers with saturation
4681:
Multiply signed and unsigned bytes, add horizontal pair of signed words, pack saturated signed-words
2795:
2726:
Convert Scalar Single-Precision
Floating-Point Value to Scalar Double-Precision Floating-Point Value
2693:
Convert Scalar Double-Precision
Floating-Point Value to Scalar Single-Precision Floating-Point Value
1387:
1266:
Multiply signed and unsigned bytes, add horizontal pair of signed words, pack saturated signed-words
8065:
5963:
256-bit source operands into a 256-bit destination operand, with an immediate constant as selector.
2737:
Convert with
Truncation Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
8040:
7777:
Matrix multiply unsigned bytes from tmm2 with signed bytes from tmm3, accumulating result in tmm1.
7762:
Matrix multiply signed bytes from tmm2 with unsigned bytes from tmm3, accumulating result in tmm1.
36:
27:
5001:
Sums absolute 8-bit integer difference of adjacent groups of 4 byte integers with starting offset
7747:
Matrix multiply signed bytes from tmm2 with signed bytes from tmm3, accumulating result in tmm1.
5690:
Copy a 32-bit, 64-bit or 128-bit memory operand to all elements of a XMM or YMM vector register.
2649:
Convert Packed Single-Precision
Floating-Point Values to Packed Signed Doubleword Integer Values
8003:, so that the instruction may continue on a partially-loaded/stored tile after the interruption.
3030:
Converts 4 packed signed doubleword integers into 8 packed signed word integers with saturation
7870:
Matrix multiply FP16 values from tmm2 with FP16 values from tmm3, accumulating result in tmm1.
7831:
Matrix multiply BF16 values from tmm2 with BF16 values from tmm3, accumulating result in tmm1.
7497:
manner โ the lane that contains the first byte of the vector is considered to be even-numbered.
5873:
single or double precision floating point values using either 32 or 64-bit indices and scale.
4758:
Concatenate destination and source operands, extract byte-aligned result shifted to the right
1347:
Concatenate destination and source operands, extract byte-aligned result shifted to the right
7549:
2781:
Convert with
Truncation Scalar Double-Precision Floating-Point Value To Signed Qword Integer
2770:
Convert with Truncation Scalar Double-Precision Floating-Point Value to Signed Dword Integer
2682:
Convert Scalar Double-Precision Floating-Point Value to Quadword Integer With Sign Extension
123:
112:
7541:
3049:
Converts 8 packed signed word integers into 16 packed signed byte integers with saturation
7510:
8:
6021:
8177:
6027:
5412:
8078:
6134:(values 6..F) selects which one of the 10 fused-multiply-add operations to perform. (
7601:
Load AMX tile configuration data structure from memory as a 64-byte data structure.
6248:
variants of the packed (but not scalar) FMA3 instructions โ these all take the form
6146:
outside the given ranges will result in something that is not an FMA3 instruction.)
4670:
Multiply 16-bit signed words, scale and round signed doublewords, pack high 16 bits
4603:
The following MMX-like instructions extended to SSE registers were added with SSSE3
2605:
Convert Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
2594:
Convert Packed Doubleword Integers to Packed Single-Precision Floating-Point Values
2583:
Convert Packed Doubleword Integers to Packed Double-Precision Floating-Point Values
1255:
Multiply 16-bit signed words, scale and round signed doublewords, pack high 16 bits
7544:, with a maximum capacity of 16 rows of 64 bytes per tile-register. It also adds a
2817:
strings. Assemblers disambiguate them based on the presence or absence of operands.
2807:
2748:
Convert with Truncation Packed Double-Precision FP Values to Packed Dword Integers
1681:
Convert with Truncation Packed Single-Precision FP Values to Packed Dword Integers
2992:
Extract specified word and move it to reg, setting bits 15-0 and zeroing the rest
1804:
Compute Reciprocal of Square Root of Scalar Single-Precision Floating-Point Value
1793:
Compute Reciprocal of Square Root of Packed Single-Precision Floating-Point Value
1310:
Add and pack 16-bit signed integers horizontally, pack saturated integers to mm1.
950:
The following MMX instruction were added with SSE. They are also available on the
7605:
6229:
5896:
Gathers 32 or 64-bit integer values using either 32 or 64-bit indices and scale.
104:
6283:
byte and the fourth operand is a register operand, specified by bits 7:4 of the
4860:
Selectively multiply packed DP floating-point values, add and selectively store
4849:
Selectively multiply packed SP floating-point values, add and selectively store
3448:
Multiply the packed signed word integers, store the high 16 bits of the results
1233:
Negate/zero/preserve packed doubleword integers depending on corresponding sign
8106:
7927:
7894:
7874:
3068:
Converts 8 signed word integers into 16 unsigned byte integers with saturation
2810:
2499:
Unordered Compare Scalar Double-Precision Floating-Point Values and Set EFLAGS
1749:
Unordered Compare Scalar Single-Precision Floating-Point Values and Set EFLAGS
3467:
Multiply packed unsigned word integers, store the high 16 bits of the results
8186:
7494:
5667:
2530:
Packed Interleave Shuffle of Pairs of Double-Precision Floating-Point Values
2488:
Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS
1760:
Compare Scalar Ordered Single-Precision Floating-Point Values and Set EFLAGS
6035:
take four input operands โ a destination operand and three source operands.
5564:
Packed comparison of string data with implicit lengths, generating an index
5542:
Packed comparison of string data with explicit lengths, generating an index
2095:
Store Packed Double-Precision Floating-Point Values Using Non-Temporal Hint
7966:, the tile-register to clear is specified by bits 5:3 of the instruction's
5188:
Extract a byte integer value at source byte offset, upper bits are zeroed.
4648:
Negate/zero/preserve packed doubleword integers depending on corresponding
2704:
Convert Doubleword Integer to Scalar Double-Precision Floating-Point Value
2671:
Convert Scalar Double-Precision Floating-Point Value to Doubleword Integer
943:
5575:
Packed comparison of string data with implicit lengths, generating a mask
5553:
Packed comparison of string data with explicit lengths, generating a mask
4637:
Negate/zero/preserve packed word integers depending on corresponding sign
4626:
Negate/zero/preserve packed byte integers depending on corresponding sign
1703:
Convert with Truncation Scalar Single-Precision FP Value to Qword Integer
1692:
Convert with Truncation Scalar Single-Precision FP Value to Dword Integer
1222:
Negate/zero/preserve packed word integers depending on corresponding sign
1211:
Negate/zero/preserve packed byte integers depending on corresponding sign
6077:
4882:
Select packed single precision floating-point values from specified mask
4871:
Select packed single precision floating-point values from specified mask
2715:
Convert Quadword Integer to Scalar Double-Precision Floating-Point value
2541:
Unpack and Interleave High Packed Double-Precision Floating-Point Values
2413:
Bitwise Logical AND NOT of Packed Double Precision Floating-Point Values
1560:
Unpack and Interleave High Packed Single-Precision Floating-Point Values
1439:
Bitwise Logical AND NOT of Packed Single-Precision Floating-Point Values
1396:
140:
116:
5846:
Copy a 128-bit memory operand to all elements of a YMM vector register.
4791:
Compute the absolute value of 32-bit integers and store unsigned result
4780:
Compute the absolute value of 16-bit integers and store unsigned result
2552:
Unpack and Interleave Low Packed Double-Precision Floating-Point Values
1549:
Unpack and Interleave Low Packed Single-Precision Floating-Point Values
1380:
Compute the absolute value of 32-bit integers and store unsigned result
1369:
Compute the absolute value of 16-bit integers and store unsigned result
6073:
2827:
5792:
Expansion of most vector integer SSE and AVX instructions to 256 bits
4242:
Non-Temporal Store of Selected Bytes from an XMM Register into Memory
4189:
Compare packed unsigned byte integers and store packed maximum values
4132:
Compare packed unsigned byte integers and store packed minimum values
1771:
Compute Square Roots of Packed Single-Precision Floating-Point Values
5034:
Multiply packed signed doubleword integers and store quadword result
4703:
Subtract and pack 16-bit signed integer horizontally with saturation
4482:
Move and duplicate even index single-precision floating-point values
2435:
Bitwise Logical XOR of Packed Double Precision Floating-Point Values
2402:
Bitwise Logical AND of Packed Double Precision Floating-Point Values
2034:
1428:
Bitwise Logical AND of Packed Single-Precision Floating-Point Values
1288:
Subtract and pack 16-bit signed integer horizontally with saturation
7970:
byte. Bits 7:6 must be set to 11b, and bits 2:0 must be set to 000b.
5023:
Multiply the packed dword signed integers and store the low 32 bits
4493:
Move and duplicate odd index single-precision floating-point values
4170:
Compare packed signed word integers and store maximum packed values
4151:
Compare packed signed word integers and store packed minimum values
2424:
Bitwise Logical OR of Packed Double Precision Floating-Point Values
2349:
Compute Square Root of Scalar Double-Precision Floating-Point Value
1826:
Compute Reciprocal of Scalar Single-Precision Floating-Point Values
1815:
Compute Reciprocal of Packed Single-Precision Floating-Point Values
1782:
Compute Square Root of Scalar Single-Precision Floating-Point Value
1405:
SSE consists of the following SSE SIMD floating-point instructions:
7809:
5364:
Set ZF if AND result is all 0s, set CF if AND NOT result is all 0s
4214:
3923:
Multiply the packed word integers, add adjacent doubleword results
2638:
Convert Packed Dword Integers to Packed Double-Precision FP Values
2616:
Convert Packed Double-Precision FP Values to Packed Dword Integers
1714:
Convert Packed Single-Precision FP Values to Packed Dword Integers
1648:
Convert Packed Dword Integers to Packed Single-Precision FP Values
1402:
SSE instructions operate on xmm registers, which are 128 bit wide.
538:
Multiply packed signed word integers, store high 16 bits of results
4540:
Horizontal subtract packed double-precision floating-point values
4529:
Horizontal subtract packed single-precision floating-point values
551:
Multiply packed signed word integers, store low 16 bits of results
111:) instruction set extensions. These extensions, starting from the
7515:
6060:
6055:
6047:
5353:
Zero extend 2 packed 32-bit integers to 2 packed 64-bit integers
5342:
Sign extend 2 packed 32-bit integers to 2 packed 64-bit integers
5331:
Zero extend 2 packed 16-bit integers to 2 packed 64-bit integers
5320:
Sign extend 2 packed 16-bit integers to 2 packed 64-bit integers
5309:
Zero extend 4 packed 16-bit integers to 4 packed 32-bit integers
5298:
Sign extend 4 packed 16-bit integers to 4 packed 32-bit integers
4725:
Add and pack 16-bit signed integers horizontally with saturation
4462:
7893:
Matrix multiplication of tiles, with source data interpreted as
7847:
Matrix multiplication of tiles, with source data interpreted as
7808:
Matrix multiplication of tiles, with source data interpreted as
6096:. The VEX.W/EVEX.W bit selects floating-point format (W=0 means
5666:
were first supported by Intel with Sandy Bridge and by AMD with
5287:
Zero extend 2 packed 8-bit integers to 2 packed 64-bit integers
5276:
Sign extend 2 packed 8-bit integers to 2 packed 64-bit integers
5265:
Zero extend 4 packed 8-bit integers to 4 packed 32-bit integers
5254:
Sign extend 4 packed 8-bit integers to 4 packed 32-bit integers
5243:
Zero extend 8 packed 8-bit integers to 8 packed 16-bit integers
5232:
Sign extend 8 packed 8-bit integers to 8 packed 16-bit integers
4308:
Move quadword from MMX register to low quadword of XMM register
936:
8066:
Intelยฎ 64 and IA-32 Architectures Optimization Reference Manual
7967:
6280:
6262:
FMA4 instructions are encoded with the VEX prefix, on the form
5507:
5397:
Move double quadword using non-temporal hint if WC memory type
4814:
4806:
4597:
2100:
2064:
1582:
Move Packed Single-Precision Floating-Point Values Low to High
1527:
Move Packed Single-Precision Floating-Point Values High to Low
1461:
Bitwise Logical XOR for Single-Precision Floating-Point Values
951:
5177:
Insert a qword integer value at specified destination element
5166:
Insert a dword integer value at specified destination element
4769:
Compute the absolute value of bytes and store unsigned result
1358:
Compute the absolute value of bytes and store unsigned result
5971:
Doubleword immediate version of the PBLEND instructions from
5404:
5155:
Insert a byte integer value at specified destination element
4584:
4518:
Horizontal add packed double-precision floating-point values
2164:
Move Unaligned Packed Double-Precision Floating-Point Values
2153:
Move Unaligned Packed Double-Precision Floating-Point Values
1958:
Return Maximum Scalar Single-Precision Floating-Point Values
1947:
Return Maximum Packed Single-Precision Floating-Point Values
1914:
Return Minimum Scalar Single-Precision Floating-Point Values
1903:
Return Minimum Packed Single-Precision Floating-Point Values
1494:
Move Unaligned Packed Single-Precision Floating-Point Values
1472:
Move Unaligned Packed Single-Precision Floating-Point Values
1450:
Bitwise Logical OR of Single-Precision Floating-Point Values
6236:
variants of the FMA3 instructions โ these all take the form
6050:
CPUs starting with YongFeng. FMA4 was only supported on AMD
4504:
Horizontal add packed single-precision floating-point values
2305:
Return Minimum Scalar Double-Precision Floating-Point Value
2283:
Return Maximum Scalar Double-Precision Floating-Point Value
7902:
7898:
7852:
7848:
7813:
6245:
6233:
6101:
6097:
5972:
5775:
5593:
4948:
Round the low packed double precision floating-point value
4926:
Round the low packed single precision floating-point value
4818:
4798:
4593:
4403:
3410:
Compare packed signed doubleword integers for greater than
2197:
Move or Merge Scalar Double-Precision Floating-Point Value
2186:
Move or Merge Scalar Double-Precision Floating-Point Value
2084:
Move Aligned Packed Double-Precision Floating-Point Values
2073:
Move Aligned Packed Double-Precision Floating-Point Values
2025:
1615:
Move Aligned Packed Single-Precision Floating-Point Values
1604:
Move Aligned Packed Single-Precision Floating-Point Values
941:
8129:
Advanced Vector Extensions 10.2 Architecture Specification
4824:
1738:
Convert Scalar Single-Precision FP Value to Qword Integer
1725:
Convert Scalar Single-Precision FP Value to Dword Integer
1670:
Convert Qword Integer to Scalar Single-Precision FP Value
1659:
Convert Dword Integer to Scalar Single-Precision FP Value
512:
Compare packed signed doubleword integers for greater than
8176:- searchable reference for Intel MMX/SSE/AVX/AVX512 SIMD
5500:
Move Non-Temporal Scalar Single-Precision Floating-Point
5486:
Move Non-Temporal Scalar Double-Precision Floating-Point
4577:
Instructionally equivalent to MOVDQU. For video encoding
4471:
Move double-precision floating-point value and duplicate
2973:
Move a byte mask, zeroing the upper bits of the register
2294:
Minimum of Packed Double-Precision Floating-Point Values
2272:
Maximum of Packed Double-Precision Floating-Point Values
2175:
Extract Packed Double-Precision Floating-Point Sign Mask
101:
4415:
2040:
1593:
Move High Packed Single-Precision Floating-Point Values
1571:
Move High Packed Single-Precision Floating-Point Values
1091:
Multiply Packed Unsigned Integers and Store High Result
7623:
Store AMX tile configuration data structure to memory.
5199:
Extract word and copy to lowest 16 bits, zero-extended
3961:
Subtract packed unsigned word integers with saturation
3942:
Subtract packed unsigned byte integers with saturation
2505:
2360:
Subtract Packed Double-Precision Floating-Point Values
2316:
Multiply Packed Double-Precision Floating-Point Values
2120:
Move High Packed Double-Precision Floating-Point Value
2109:
Move High Packed Double-Precision Floating-Point Value
1892:
Subtract Scalar Single-Precision Floating-Point Values
1881:
Subtract Packed Single-Precision Floating-Point Values
1870:
Multiply Scalar Single-Precision Floating-Point Values
1859:
Multiply Packed Single-Precision Floating-Point Values
1538:
Move Low Packed Single-Precision Floating-Point Values
1516:
Move Low Packed Single-Precision Floating-Point Values
7493:
Vector register lanes are counted from 0 upwards in a
4714:
Subtract and pack 32-bit signed integers horizontally
4692:
Subtract and pack 16-bit signed integers horizontally
2466:
Compare Packed Double-Precision Floating-Point Values
2371:
Subtract Scalar Double-Precision Floating-Point Value
2338:
Square Root of Double-Precision Floating-Point Values
2327:
Multiply Scalar Double-Precision Floating-Point Value
2203:
2142:
Move Low Packed Double-Precision Floating-Point Value
2131:
Move Low Packed Double-Precision Floating-Point Value
2015:
Shuffle Packed Single-Precision Floating-Point Values
2002:
Compare Scalar Single-Precision Floating-Point Values
1991:
Compare Packed Single-Precision Floating-Point Values
1299:
Subtract and pack 32-bit signed integers horizontally
1277:
Subtract and pack 16-bit signed integers horizontally
525:
Multiply packed words, add adjacent doubleword results
7684:
Load a data tile from memory into AMX tile register.
5959:
Shuffle (two of) the four 128-bit vector elements of
5221:
Extract a qword integer value at source qword offset
5210:
Extract a dword integer value at source dword offset
3904:
Subtract packed signed word integers with saturation
3885:
Subtract packed signed byte integers with saturation
3429:
Multiply packed signed word integers with saturation
3391:
Compare packed signed word integers for greater than
3372:
Compare packed signed byte integers for greater than
2250:
Divide Packed Double-Precision Floating-Point Values
1936:
Divide Scalar Single-Precision Floating-Point Values
1925:
Divide Packed Single-Precision Floating-Point Values
1135:
The following MMX instructions were added with SSE2:
7716:
Store a data tile to memory from AMX tile register.
4937:
Round packed double precision floating-point values
4915:
Round packed single precision floating-point values
4457:
Add/subtract double-precision floating-point values
4113:
Average packed unsigned word integers with rounding
4094:
Average packed unsigned byte integers with rounding
3638:
Shift doublewords right while shifting in sign bits
2828:
SSE2 MMX-like instructions extended to SSE registers
2261:
Divide Scalar Double-Precision Floating-Point Value
1186:
499:
Compare packed signed word integers for greater than
486:
Compare packed signed byte integers for greater than
4976:
4443:
Add/subtract single-precision floating-point values
3619:Shift doubleword right while shifting in sign bits
2477:Compare Low Double-Precision Floating-Point Values
1505:Move Scalar Single-Precision Floating-Point Values
1483:Move Scalar Single-Precision Floating-Point Values
1130:
3220:Add packed unsigned word integers with saturation
3201:Add packed unsigned byte integers with saturation
2228:Add Packed Double-Precision Floating-Point Values
2045:
1848:Add Scalar Single-Precision Floating-Point Values
1837:Add Packed Single-Precision Floating-Point Values
265:Pack doublewords to words (signed with saturation)
8068:(order no. 248966-044, June 2021) section 3.5.2.3
6270:(no EVEX encodings are defined). The opcode byte
4546:
2822:
8184:
4215:SSE2 integer instructions for SSE registers only
3182:Add packed signed word integers with saturation
3163:Add packed signed byte integers with saturation
1626:Move Aligned Four Packed Single-FP Non Temporal
5586:Compare packed signed qwords for greater than.
4904:Select packed DP FP values from specified mask
4893:Select packed DP-FP values from specified mask
2558:
6110:consists of two nibbles, where the top nibble
6038:FMA3 is supported on Intel CPUs starting with
4574:Load unaligned data and return double quadword
4319:Store Packed Integers Using Non-Temporal Hint
3676:Shift words right while shifting in sign bits
3657:Shift words right while shifting in sign bits
2239:Add Low Double-Precision Floating-Point Value
850:Subtract unsigned packed words with saturation
837:Subtract unsigned packed bytes with saturation
382:Add packed unsigned word integers and saturate
369:Add packed unsigned byte integers and saturate
291:Pack words to bytes (unsigned with saturation)
6015:
4374:Packed shift right logical double quadwords.
4018:Unpack and interleave high-order doublewords
3752:Shift doublewords right while shifting in 0s
3733:Shift doublewords right while shifting in 0s
3486:Multiply packed unsigned doubleword integers
3011:Move low word at the specified word position
937:MMX instructions added in specific processors
81:
8131:, order no. 361050-001, rev 1.0, July 2024.
7980:
7978:
7976:
7901:values, and destination data accumulated as
7851:values, and destination data accumulated as
7812:values, and destination data accumulated as
4385:Unpack and interleave high-order quadwords,
4363:Packed shift left logical double quadwords.
4253:Move low quadword from XMM to MMX register.
3562:Shift doublewords left while shifting in 0s
3543:Shift doublewords left while shifting in 0s
2441:
2377:
889:Unpack and interleave high-order doublewords
824:Subtract signed packed words with saturation
811:Subtract signed packed bytes with saturation
356:Add packed signed word integers and saturate
343:Add packed signed byte integers and saturate
278:Pack words to bytes (signed with saturation)
133:
16:List of x86 microprocessor SIMD instructions
3790:Shift quadwords right while shifting in 0s
3771:Shift quadwords right while shifting in 0s
928:Unpack and interleave low-order doublewords
655:Shift right doublewords, shift in sign bits
642:Shift right doublewords, shift in sign bits
172:Marks all x87 FPU registers for use by FPU
107:has several times been extended with SIMD (
6318:and can be encoded with either W=0 or W=1.
5599:Half-precision floating-point conversion.
4747:Add and pack 32-bit integers horizontally
4736:Add and pack 16-bit integers horizontally
3600:Shift quadwords left while shifting in 0s
3581:Shift quadwords left while shifting in 0s
1332:Add and pack 32-bit integers horizontally
1321:Add and pack 16-bit integers horizontally
115:instruction set extension introduced with
88:
74:
8023:
8021:
8019:
8017:
8015:
8013:
8011:
8009:
7973:
7532:Intel AMX adds eight new tile-registers,
6228:The AVX512-FP16 extension, introduced in
3353:Compare packed doublewords for equality.
1058:Maximum of Packed Unsigned Byte Integers
1047:Minimum of Packed Unsigned Byte Integers
7667:Zero out contents of one tile register.
6477:Packed alternating multiply-subtract/add
6358:Packed alternating multiply-add/subtract
5673:Vector operations on 256 bit registers.
7511:AVX-512 ยง New instructions by sets
6072:FMA3 instructions are encoded with the
5144:Compare packed unsigned dword integers
5100:Compare packed unsigned dword integers
5045:Select byte values from specified mask
4825:SSE4.1 SIMD floating-point instructions
3999:Unpack and interleave high-order words
3980:Unpack and interleave high-order bytes
3714:Shift words right while shifting in 0s
3695:Shift words right while shifting in 0s
1113:Maximum of Packed Signed Word Integers
1102:Minimum of Packed Signed Word Integers
733:Shift right doublewords, shift in zeros
720:Shift right doublewords, shift in zeros
473:Compare packed doublewords for equality
8185:
8006:
5122:Compare packed unsigned word integers
5078:Compare packed unsigned word integers
5039:PBLENDVB xmm1, xmm2/m128, <XMM0>
4898:BLENDVPD xmm1, xmm2/m128, <XMM0>
4876:BLENDVPS xmm1, xmm2/m128, <XMM0>
3524:Shift words left while shifting in 0s
3505:Shift words left while shifting in 0s
2806:; however, the former refer to scalar
988:Move Quadword Using Non-Temporal Hint
876:Unpack and interleave high-order words
863:Unpack and interleave high-order bytes
603:Shift left doublewords, shift in zeros
590:Shift left doublewords, shift in zeros
8046:List of discontinued x86 instructions
5133:Compare packed signed dword integers
5089:Compare packed signed dword integers
4583:
4416:SSE3 SIMD floating-point instructions
2041:SSE2 SIMD floating-point instructions
1180:Multiply unsigned doubleword integer
915:Unpack and interleave low-order words
902:Unpack and interleave low-order bytes
681:Shift right words, shift in sign bits
668:Shift right words, shift in sign bits
5111:Compare packed signed byte integers
5067:Compare packed signed byte integers
4797:
4411:Added with Pentium 4 supporting SSE3
4402:
3847:Subtract packed doubleword integers
2506:SSE2 shuffle and unpack instructions
2024:
1124:Compute Sum of Absolute Differences
759:Shift right quadword, shift in zeros
746:Shift right quadword, shift in zeros
5375:Compare packed qwords for equality
3866:Subtract packed quadword integers.
3334:Compare packed words for equality.
3315:Compare packed bytes for equality.
2204:SSE2 packed arithmetic instructions
1386:
798:Subtract packed doubleword integers
629:Shift left quadword, shift in zeros
616:Shift left quadword, shift in zeros
122:
13:
7650:) to the INIT state (all-zeroes).
1169:Subtract packed quadword integers
14:
8209:
8167:
7376:Scalar negative-multiply-subtract
7262:Packed negative-multiply-subtract
6054:CPUs and has been abandoned from
5056:Select words from specified mask
4075:Interleave low-order doublewords
1187:MMX instructions added with SSSE3
707:Shift right words, shift in zeros
694:Shift right words, shift in zeros
460:Compare packed words for equality
447:Compare packed bytes for equality
109:Single instruction, multiple data
7586:AMX control and tile management.
7478:
7475:
7452:
7427:
7402:
7370:
7367:
7256:
7253:
7230:
7205:
7180:
7148:
7145:
7034:
7031:
7008:
6983:
6958:
6926:
6923:
6812:
6809:
6786:
6761:
6736:
6704:
6701:
6590:
6587:
6564:
6539:
6514:
6471:
6468:
6445:
6420:
6395:
4977:SSE4.1 SIMD integer instructions
1131:MMX instructions added with SSE2
577:Shift left words, shift in zeros
564:Shift left words, shift in zeros
5569:PCMPISTRM xmm1, xmm2/m128, imm8
5558:PCMPISTRI xmm1, xmm2/m128, imm8
5547:PCMPESTRM xmm1, xmm2/m128, imm8
5536:PCMPESTRI xmm1, xmm2/m128, imm8
5012:Find the minimum unsigned word
4297:Move unaligned double quadword
4286:Move unaligned double quadword
3125:Add packed doubleword integers
2046:SSE2 data movement instructions
8138:
8121:
8095:
8071:
8058:
7956:
7887:
7487:
6128:='231') and the bottom nibble
5645:VCVTPS2PH xmmrm128,ymmreg,imm8
4547:SSE3 SIMD integer instructions
3828:Subtract packed word integers
3809:Subtract packed byte integers
3144:Add packed quadword integers.
2823:SSE2 SIMD integer instructions
330:Add packed doubleword integers
1:
8051:
5634:VCVTPS2PH xmmrm64,xmmreg,imm8
5050:PBLENDW xmm1, xmm2/m128, imm8
4995:MPSADBW xmm1, xmm2/m128, imm8
4964:EXTRACTPS reg/m32, xmm1, imm8
4953:INSERTPS xmm1, xmm2/m32, imm8
4931:ROUNDPD xmm1, xmm2/m128, imm8
4909:ROUNDPS xmm1, xmm2/m128, imm8
4887:BLENDPD xmm1, xmm2/m128, imm8
4865:BLENDPS xmm1, xmm2/m128, imm8
4752:PALIGNR xmm1, xmm2/m128, imm8
4335:PSHUFLW xmm1, xmm2/m128, imm8
4324:PSHUFHW xmm1, xmm2/m128, imm8
4275:Move aligned double quadword
4264:Move aligned double quadword
1158:Add packed quadword integers
785:Subtract packed word integers
772:Subtract packed byte integers
8146:"Intel AVX-512 Instructions"
7154:Scalar negative-multiply-add
7040:Packed negative-multiply-add
6312:vfmaddsd xmm1,xmm2,xmm3,xmm4
6042:, on AMD CPUs starting with
5442:Extract Field From Register
4942:ROUNDSD xmm1, xmm2/m64, imm8
4920:ROUNDSS xmm1, xmm2/m32, imm8
4352:Shuffle packed doublewords.
4346:PSHUFD xmm1, xmm2/m128, imm8
2813:whereas the latter refer to
2559:SSE2 conversion instructions
2524:SHUFPD xmm1, xmm2/m128, imm8
2008:SHUFPS xmm1, xmm2/m128, imm8
942:MMX instructions added with
7:
8034:
7938:TCMMILFP16PS tmm1,tmm2,tmm3
7912:TCMMRLFP16PS tmm1,tmm2,tmm3
7841:
7802:
7726:
7580:
6308:and require a W=1 encoding.
6298:and require a W=0 encoding.
4330:Shuffle packed high words.
4056:Interleave low-order words
4037:Interleave low-order bytes
2471:CMPSD* xmm1, xmm2/m64, imm8
2460:CMPPD xmm1, xmm2/m128, imm8
1985:CMPPS xmm1, xmm2/m128, imm8
1980:Store MXCSR Register State
10:
8214:
7603:
7528:Advanced Matrix Extensions
7525:
7508:
7504:
6116:selects operand ordering (
6019:
6016:FMA3 and FMA4 instructions
5006:PHMINPOSUW xmm1, xmm2/m128
4854:DPPD xmm1, xmm2/m128, imm8
4843:DPPS xmm1, xmm2/m128, imm8
4396:Interleave low quadwords,
4390:PUNPCKLQDQ xmm1, xmm2/m128
4379:PUNPCKHQDQ xmm1, xmm2/m128
4341:Shuffle packed low words.
2794:have the same name as the
1996:CMPSS xmm1, xmm2/m32, imm8
1969:Load MXCSR Register State
1338:PALIGNR mm1, mm2/m64, imm8
169:Empty MMX Technology State
7924:
7885:
7881:
7835:
7796:
7724:
7720:
7642:and tile data registers (
7578:
7574:
7375:
7261:
7153:
7039:
6931:
6817:
6709:
6595:
6476:
6357:
6063:foundation instructions.
5995:
5982:
5945:
5932:
5918:
5895:
5869:
5822:
5808:
5783:Haswell microarchitecture
5737:
5723:
5689:
5624:VCVTPH2PS ymmreg,xmmrm128
5506:
5463:
5454:
5441:
5432:
5193:PEXTRW reg/m16, xmm, imm8
5182:PEXTRB reg/m8, xmm2, imm8
5149:PINSRB xmm1, r32/m8, imm8
4805:
4675:PMADDUBSW xmm1, xmm2/m128
4506:
4445:
4063:PUNPCKLDQ xmm1, xmm2/m128
4044:PUNPCKLWD xmm1, xmm2/m128
4025:PUNPCKLBW xmm1, xmm2/m128
4006:PUNPCKHDQ xmm1, xmm2/m128
3987:PUNPCKHWD xmm1, xmm2/m128
3968:PUNPCKHBW xmm1, xmm2/m128
3106:Add packed word integers
3087:Add packed byte integers
2999:PINSRW xmm, r32/m16, imm8
2753:CVTTPS2DQ xmm1, xmm2/m128
2731:CVTTPD2DQ xmm1, xmm2/m128
2442:SSE2 compare instructions
2378:SSE2 logical instructions
994:PSHUFW mm1, mm2/m64, imm8
134:Original MMX instructions
45:(MMX, SSE, AVX, FMA, AMX)
8198:Instruction set listings
8103:"Chess programming AVX2"
8041:x86 instruction listings
7944:VEX.128.66.0F38.W0 6C /r
7918:VEX.128.NP.0F38.W0 6C /r
7897:represented as pairs of
7866:VEX.128.F2.0F38.W0 5C /r
7861:TDPFP16PS tmm1,tmm2,tmm3
7827:VEX.128.F3.0F38.W0 5C /r
7822:TDPBF16PS tmm1,tmm2,tmm3
7788:VEX.128.NP.0F38.W0 5E /r
7773:VEX.128.66.0F38.W0 5E /r
7758:VEX.128.F3.0F38.W0 5E /r
7743:VEX.128.F2.0F38.W0 5E /r
7712:VEX.128.F3.0F38.W0 4B /r
7697:VEX.128.66.0F38.W0 4B /r
7679:VEX.128.F2.0F38.W0 4B /r
7662:VEX.128.F2.0F38.W0 49 /r
7634:VEX.128.NP.0F38.W0 49 C0
7619:VEX.128.66.0F38 W0 49 /0
7597:VEX.128.NP.0F38.W0 49 /0
6932:Scalar multiply-subtract
6818:Packed multiply-subtract
6302:vfmaddsd xmm1,xmm2,xmm3,
6292:vfmaddsd xmm1,xmm2,,xmm3
5614:VCVTPH2PS xmmreg,xmmrm64
5403:
5380:PACKUSDW xmm1, xmm2/m128
5215:PEXTRQ r/m64, xmm2, imm8
5204:PEXTRD r/m32, xmm2, imm8
5171:PINSRQ xmm1, r/m64, imm8
5160:PINSRD xmm1, r/m32, imm8
4664:PMULHRSW xmm1, xmm2/m128
4596:5100 series and initial
4487:MOVSHDUP xmm1, xmm2/m128
4476:MOVSLDUP xmm1, xmm2/m128
4451:ADDSUBPD xmm1, xmm2/m128
4437:ADDSUBPS xmm1, xmm2/m128
3056:PACKUSWB xmm1, xmm2/m128
3037:PACKSSWB xmm1, xmm2/m128
3018:PACKSSDW xmm1, xmm2/m128
2643:CVTPS2DQ xmm1, xmm2/m128
2621:CVTPD2PS xmm1, xmm2/m128
2599:CVTPD2DQ xmm1, xmm2/m128
2588:CVTDQ2PS xmm1, xmm2/m128
2546:UNPCKLPD xmm1, xmm2/m128
2535:UNPCKHPD xmm1, xmm2/m128
1554:UNPCKHPS xmm1, xmm2/m128
1543:UNPCKLPS xmm1, xmm2/m128
1080:Average Packed Integers
1069:Average Packed Integers
1008:PINSRW mm, r32/m16, imm8
977:Masked Move of Quadword
317:Add packed word integers
304:Add packed byte integers
28:x86 instruction listings
7691:TILELOADDT1 tmm, sibmem
7567:Instruction description
6316:xmm1 โ (xmm2*xmm3)+xmm4
5774:
5592:
5369:PCMPEQQ xmm1, xmm2/m128
5347:PMOVZXDQ xmm1, xmm2/m64
5336:PMOVSXDQ xmm1, xmm2/m64
5325:PMOVZXWQ xmm1, xmm2/m32
5314:PMOVSXWQ xmm1, xmm2/m32
5303:PMOVZXWD xmm1, xmm2/m64
5292:PMOVSXWD xmm1, xmm2/m64
5281:PMOVZXBQ xmm1, xmm2/m16
5270:PMOVSXBQ xmm1, xmm2/m16
5259:PMOVZXBD xmm1, xmm2/m32
5248:PMOVSXBD xmm1, xmm2/m32
5237:PMOVZXBW xmm1, xmm2/m64
5226:PMOVSXBW xmm1, xmm2/m64
5218:66 REX.W 0F 3A 16 /r ib
5174:66 REX.W 0F 3A 22 /r ib
4719:PHADDSW xmm1, xmm2/m128
4697:PHSUBSW xmm1, xmm2/m128
4446:for Complex Arithmetic
3949:PSUBUSW xmm1, xmm2/m128
3930:PSUBUSB xmm1, xmm2/m128
3911:PMADDWD xmm1, xmm2/m128
3474:PMULUDQ xmm1, xmm2/m128
3455:PMULHUW xmm1, xmm2/m128
3398:PCMPGTD xmm1, xmm2/m128
3379:PCMPGTW xmm1, xmm2/m128
3360:PCMPGTB xmm1, xmm2/m128
3341:PCMPEQD xmm1, xmm2/m128
3322:PCMPEQW xmm1, xmm2/m128
3303:PCMPEQB xmm1, xmm2/m128
3208:PADDUSW xmm1, xmm2/m128
3189:PADDUSB xmm1, xmm2/m128
2775:CVTTSD2SI r64, xmm1/m64
2764:CVTTSD2SI r32, xmm1/m64
2720:CVTSS2SD xmm1, xmm2/m32
2687:CVTSD2SS xmm1, xmm2/m64
2654:CVTPS2PD xmm1, xmm2/m64
2577:CVTDQ2PD xmm1, xmm2/m64
1787:RSQRTPS xmm1, xmm2/m128
1697:CVTTSS2SI r64, xmm1/m32
1433:ANDNPS* xmm1, xmm2/m128
63:(e.g. 3DNow!, MPX, XOP)
8174:Intel Intrinsics Guide
7905:floating-point values.
7855:floating-point values.
7816:floating-point values.
7783:TDPBUUD tmm1,tmm2,tmm3
7768:TDPBUSD tmm1,tmm2,tmm3
7753:TDPBSUD tmm1,tmm2,tmm3
7738:TDPBSSD tmm1,tmm2,tmm3
7707:TILESTORED mem, sibtmm
7550:matrix multiplications
7521:
6484:in even-numbered lanes
6365:in even-numbered lanes
6052:Family 15h (Bulldozer)
5781:Introduced in Intel's
5656:
5580:PCMPGTQ xmm1,xmm2/m128
5138:PMAXUD xmm1, xmm2/m128
5127:PMAXSD xmm1, xmm2/m128
5116:PMAXUW xmm1, xmm2/m128
5105:PMAXSB xmm1, xmm2/m128
5094:PMINUD xmm1, xmm2/m128
5083:PMINSD xmm1, xmm2/m128
5072:PMINUW xmm1, xmm2/m128
5061:PMINSB xmm1, xmm2/m128
5028:PMULDQ xmm1, xmm2/m128
5017:PMULLD xmm1, xmm2/m128
4741:PHADDD xmm1, xmm2/m128
4730:PHADDW xmm1, xmm2/m128
4708:PHSUBD xmm1, xmm2/m128
4686:PHSUBW xmm1, xmm2/m128
4653:PSHUFB xmm1, xmm2/m128
4642:PSIGND xmm1, xmm2/m128
4631:PSIGNW xmm1, xmm2/m128
4620:PSIGNB xmm1, xmm2/m128
4534:HSUBPD xmm1, xmm2/m128
4523:HSUBPS xmm1, xmm2/m128
4512:HADDPD xmm1, xmm2/m128
4498:HADDPS xmm1, xmm2/m128
4291:MOVDQU xmm2/m128, xmm1
4280:MOVDQU xmm1, xmm2/m128
4269:MOVDQA xmm2/m128, xmm1
4258:MOVDQA xmm1, xmm2/m128
4196:PSADBW xmm1, xmm2/m128
4177:PMAXUB xmm1, xmm2/m128
4158:PMAXSW xmm1, xmm2/m128
4139:PMINSW xmm1, xmm2/m128
4120:PMINUB xmm1, xmm2/m128
3892:PSUBSW xmm1, xmm2/m128
3873:PSUBSB xmm1, xmm2/m128
3436:PMULHW xmm1, xmm2/m128
3417:PMULLW xmm1, xmm2/m128
3170:PADDSW xmm1, xmm2/m128
3151:PADDSB xmm1, xmm2/m128
2742:CVTTPD2PI mm, xmm/m128
2698:CVTSI2SD xmm1, r32/m32
2676:CVTSD2SI r64, xmm1/m64
2665:CVTSD2SI r32, xmm1/m64
2493:UCOMISD xmm1, xmm2/m64
2407:ANDNPD xmm1, xmm2/m128
2332:SQRTPD xmm1, xmm2/m128
2158:MOVUPD xmm2/m128, xmm1
2147:MOVUPD xmm1, xmm2/m128
2078:MOVAPD xmm2/m128, xmm1
1798:RSQRTSS xmm1, xmm2/m32
1765:SQRTPS xmm1, xmm2/m128
1743:UCOMISS xmm1, xmm2/m32
1730:CVTSS2SI r64, xmm1/m32
1686:CVTTSS2SI r32, xmm/m32
1609:MOVAPS xmm2/m128, xmm1
1598:MOVAPS xmm1, xmm2/m128
1488:MOVUPS xmm2/m128, xmm1
1466:MOVUPS xmm1, xmm2/m128
1455:XORPS* xmm1, xmm2/m128
1422:ANDPS* xmm1, xmm2/m128
1260:PMADDUBSW mm1, mm2/m64
39:(integer, system, x87)
7673:TILELOADD tmm, sibmem
7561:Instruction mnemonics
6490:in odd-numbered lanes
6371:in odd-numbered lanes
5358:PTEST xmm1, xmm2/m128
4785:PABSD xmm1, xmm2/m128
4774:PABSW xmm1, xmm2/m128
4763:PABSB xmm1, xmm2/m128
4236:MASKMOVDQU xmm1, xmm2
4101:PAVGW xmm1, xmm2/m128
4082:PAVGB xmm1, xmm2/m128
3854:PSUBQ xmm1, xmm2/m128
3835:PSUBD xmm1, xmm2/m128
3816:PSUBW xmm1, xmm2/m128
3797:PSUBB xmm1, xmm2/m128
3759:PSRLQ xmm1, xmm2/m128
3721:PSRLD xmm1, xmm2/m128
3683:PSRLW xmm1, xmm2/m128
3645:PSRAW xmm1, xmm2/m128
3607:PSRAD xmm1, xmm2/m128
3569:PSLLQ xmm1, xmm2/m128
3531:PSLLD xmm1, xmm2/m128
3493:PSLLW xmm1, xmm2/m128
3246:PANDN xmm1, xmm2/m128
3132:PADDQ xmm1, xmm2/m128
3113:PADDD xmm1, xmm2/m128
3094:PADDW xmm1, xmm2/m128
3075:PADDB xmm1, xmm2/m128
2980:PEXTRW reg, xmm, imm8
2798:instruction mnemonics
2610:CVTPD2PI mm, xmm/m128
2482:COMISD xmm1, xmm2/m64
2429:XORPD xmm1, xmm2/m128
2396:ANDPD xmm1, xmm2/m128
2354:SUBPD xmm1, xmm2/m128
2310:MULPD xmm1, xmm2/m128
2288:MINPD xmm1, xmm2/m128
2266:MAXPD xmm1, xmm2/m128
2244:DIVPD xmm1, xmm2/m128
2222:ADDPD xmm1, xmm2/m128
2180:MOVSD* xmm1, xmm2/m64
1941:MAXPS xmm1, xmm2/m128
1919:DIVPS xmm1, xmm2/m128
1897:MINPS xmm1, xmm2/m128
1875:SUBPS xmm1, xmm2/m128
1853:MULPS xmm1, xmm2/m128
1831:ADDPS xmm1, xmm2/m128
1809:RCPPS xmm1, xmm2/m128
1776:SQRTSS xmm1, xmm2/m32
1754:COMISS xmm1, xmm2/m32
1719:CVTSS2SI r32, xmm/m32
1675:CVTTPS2PI mm, xmm/m64
1444:ORPS* xmm1, xmm2/m128
1249:PMULHRSW mm1, mm2/m64
1003:Shuffle Packed Words
954:under the name MMX+.
272:PACKSSWB mm1, mm2/m64
258:PACKSSDW mm1, mm2/m64
57:(e.g. RDRAND, AES-NI)
7552:on these registers.
3284:PXOR xmm1, xmm2/m128
3227:PAND xmm1, xmm2/m128
2709:CVTSI2SD xmm1, r/m64
2632:CVTPI2PD xmm, mm/m64
2418:ORPD xmm1, xmm2/m128
2365:SUBSD xmm1, xmm2/m64
2343:SQRTSD xmm1,xmm2/m64
2299:MINSD xmm1, xmm2/m64
2277:MAXSD xmm1, xmm2/m64
2255:DIVSD xmm1, xmm2/m64
2233:ADDSD xmm1, xmm2/m64
2191:MOVSD xmm1/m64, xmm2
1952:MAXSS xmm1, xmm2/m32
1930:DIVSS xmm1, xmm2/m32
1908:MINSS xmm1, xmm2/m32
1886:SUBSS xmm1, xmm2/m32
1864:MULSS xmm1, xmm2/m32
1842:ADDSS xmm1, xmm2/m32
1820:RCPSS xmm1, xmm2/m32
1708:CVTPS2PI mm, xmm/m64
1642:CVTPI2PS xmm, mm/m64
1499:MOVSS xmm2/m32, xmm1
1477:MOVSS xmm1, xmm2/m32
1304:PHADDSW mm1, mm2/m64
1282:PHSUBSW mm1, mm2/m64
1174:PMULUDQ mm1, mm2/m64
1085:PMULHUW mm1, mm2/m64
1019:PEXTRW reg, mm, imm8
922:PUNPCKLDQ mm, mm/m32
909:PUNPCKLWD mm, mm/m32
896:PUNPCKLBW mm, mm/m32
883:PUNPCKHDQ mm, mm/m64
870:PUNPCKHWD mm, mm/m64
857:PUNPCKHBW mm, mm/m64
6710:Scalar multiply-add
6596:Packed multiply-add
6306:xmm1 โ (xmm2*xmm3)+
6296:xmm1 โ (xmm2*)+xmm3
6104:). The opcode byte
6022:FMA instruction set
5572:66 0F 3A 62 /r imm8
5561:66 0F 3A 63 /r imm8
5550:66 0F 3A 60 /r imm8
5539:66 0F 3A 61 /r imm8
5391:MOVNTDQA xmm1, m128
3265:POR xmm1, xmm2/m128
2908:MOVQ xmm2/m64, xmm1
2889:MOVQ xmm1, xmm2/m64
2321:MULSD xmm1,xmm2/m64
1664:CVTSI2SS xmm, r/m64
1653:CVTSI2SS xmm, r/m32
1326:PHADDD mm1, mm2/m64
1315:PHADDW mm1, mm2/m64
1293:PHSUBD mm1, mm2/m64
1271:PHSUBW mm1, mm2/m64
1238:PSHUFB mm1, mm2/m64
1227:PSIGND mm1, mm2/m64
1216:PSIGNW mm1, mm2/m64
1205:PSIGNB mm1, mm2/m64
1118:PSADBW mm1, mm2/m64
1107:PMAXSW mm1, mm2/m64
1096:PMINSW mm1, mm2/m64
1052:PMAXUB mm1, mm2/m64
1041:PMINUB mm1, mm2/m64
285:PACKUSWB mm, mm/m64
22:Part of a series on
6028:fused multiply-add
4313:MOVNTDQ m128, xmm1
2089:MOVNTPD m128, xmm1
1620:MOVNTPS m128, xmm1
1576:MOVLHPS xmm1, xmm2
1521:MOVHLPS xmm1, xmm2
1374:PABSD mm1, mm2/m64
1363:PABSW mm1, mm2/m64
1352:PABSB mm1, mm2/m64
1163:PSUBQ mm1, mm2/m64
1074:PAVGW mm1, mm2/m64
1063:PAVGB mm1, mm2/m64
844:PSUBUSW mm, mm/m64
831:PSUBUSB mm, mm/m64
519:PMADDWD mm, mm/m64
506:PCMPGTD mm, mm/m64
493:PCMPGTW mm, mm/m64
480:PCMPGTB mm, mm/m64
467:PCMPEQD mm, mm/m64
454:PCMPEQW mm, mm/m64
441:PCMPEQB mm, mm/m64
376:PADDUSW mm, mm/m64
363:PADDUSB mm, mm/m64
51:(VT-x, AMD-V, TDX)
8001:TILECFG.start_row
7952:
7951:
7540:, each holding a
7483:
7482:
7344:VFNMSUB231NEPBF16
7317:VFNMSUB213NEPBF16
7290:VFNMSUB132NEPBF16
7122:VFNMADD231NEPBF16
7095:VFNMADD213NEPBF16
7068:VFNMADD132NEPBF16
6351:BF16 instructions
6346:FP16 instructions
6343:FP64 instructions
6340:FP32 instructions
6205:sd xmm1,xmm2,xmm3
6181:sd xmm1,xmm2,xmm3
6157:sd xmm1,xmm2,xmm3
6013:
6012:
5772:
5771:
5654:
5653:
5590:
5589:
5504:
5503:
5401:
5400:
5207:66 0F 3A 16 /r ib
5196:66 0F 3A 15 /r ib
5185:66 0F 3A 14 /r ib
5163:66 0F 3A 22 /r ib
5152:66 0F 3A 20 /r ib
5053:66 0F 3A 0E /r ib
4998:66 0F 3A 42 /r ib
4974:
4973:
4967:66 0F 3A 17 /r ib
4956:66 0F 3A 21 /r ib
4945:66 0F 3A 0B /r ib
4934:66 0F 3A 09 /r ib
4923:66 0F 3A 0A /r ib
4912:66 0F 3A 08 /r ib
4890:66 0F 3A 0D /r ib
4868:66 0F 3A 0C /r ib
4857:66 0F 3A 41 /r ib
4846:66 0F 3A 40 /r ib
4795:
4794:
4755:66 0F 3A 0F /r ib
4581:
4580:
4544:
4543:
4400:
4399:
4368:PSRLDQ xmm1, imm8
4357:PSLLDQ xmm1, imm8
4212:
4211:
2961:PMOVMSKB reg, xmm
2949:66 REX.W 0F 6E /r
2932:66 REX.W 0F 7E /r
2785:
2784:
2778:F2 REX.W 0F 2C /r
2712:F2 REX.W 0F 2A /r
2679:F2 REX.W 0F 2D /r
2556:
2555:
2503:
2502:
2439:
2438:
2375:
2374:
2201:
2200:
2169:MOVMSKPD reg, xmm
2019:
2018:
1734:F3 REX.W 0F 2D /r
1700:F3 REX.W 0F 2C /r
1667:F3 REX.W 0F 2A /r
1631:MOVMSKPS reg, xmm
1384:
1383:
1184:
1183:
1128:
1127:
971:MASKMOVQ mm1, mm2
934:
933:
818:PSUBSW mm, mm/m64
805:PSUBSB mm, mm/m64
545:PMULLW mm, mm/m64
532:PMULHW mm, mm/m64
350:PADDSW mm, mm/m64
337:PADDSB mm, mm/m64
98:
97:
8205:
8193:X86 instructions
8161:
8160:
8158:
8156:
8142:
8136:
8125:
8119:
8118:
8116:
8114:
8109:on July 10, 2017
8105:. Archived from
8099:
8093:
8092:
8090:
8088:
8083:
8075:
8069:
8062:
8028:
8025:
8004:
8002:
7995:
7991:
7987:
7982:
7971:
7965:
7960:
7945:
7940:
7939:
7931:
7919:
7914:
7913:
7867:
7862:
7828:
7823:
7789:
7784:
7774:
7769:
7759:
7754:
7744:
7739:
7713:
7708:
7698:
7693:
7692:
7681:
7680:
7674:
7664:
7663:
7657:
7649:
7645:
7641:
7635:
7630:
7620:
7615:
7608:
7598:
7593:
7555:
7554:
7547:
7539:
7535:
7498:
7491:
7472:
7466:
7460:
7450:
7445:
7440:
7435:
7425:
7420:
7415:
7410:
7400:
7395:
7390:
7385:
7364:
7358:
7352:
7345:
7340:
7335:
7330:
7325:
7318:
7313:
7308:
7303:
7298:
7291:
7286:
7281:
7276:
7271:
7250:
7244:
7238:
7228:
7223:
7218:
7213:
7203:
7198:
7193:
7188:
7178:
7173:
7168:
7163:
7142:
7136:
7130:
7123:
7118:
7113:
7108:
7103:
7096:
7091:
7086:
7081:
7076:
7069:
7064:
7059:
7054:
7049:
7028:
7022:
7016:
7006:
7001:
6996:
6991:
6981:
6976:
6971:
6966:
6956:
6951:
6946:
6941:
6920:
6914:
6908:
6901:
6900:VFMSUB231NEPBF16
6896:
6891:
6886:
6881:
6874:
6873:VFMSUB213NEPBF16
6869:
6864:
6859:
6854:
6847:
6846:VFMSUB132NEPBF16
6842:
6837:
6832:
6827:
6806:
6800:
6794:
6784:
6779:
6774:
6769:
6759:
6754:
6749:
6744:
6734:
6729:
6724:
6719:
6698:
6692:
6686:
6679:
6678:VFMADD231NEPBF16
6674:
6669:
6664:
6659:
6652:
6651:VFMADD213NEPBF16
6647:
6642:
6637:
6632:
6625:
6624:VFMADD132NEPBF16
6620:
6615:
6610:
6605:
6584:
6578:
6572:
6562:
6557:
6552:
6547:
6537:
6532:
6527:
6522:
6512:
6507:
6502:
6497:
6465:
6459:
6453:
6443:
6438:
6433:
6428:
6418:
6413:
6408:
6403:
6393:
6388:
6383:
6378:
6331:
6330:
6317:
6313:
6307:
6303:
6297:
6293:
6275:
6269:
6255:
6250:EVEX.NP.MAP6.W0
6243:
6238:EVEX.66.MAP6.W0
6221:
6206:
6197:
6182:
6173:
6158:
6145:
6139:
6133:
6127:
6123:
6119:
6115:
6109:
6095:
6087:
5795:
5794:
5676:
5675:
5647:
5646:
5635:
5625:
5615:
5602:
5601:
5522:
5521:
5419:
5418:
4981:
4980:
4829:
4828:
4817:manufactured in
4606:
4605:
4551:
4550:
4420:
4419:
4222:
4221:
4205:
4204:
4198:
4197:
4186:
4185:
4179:
4178:
4167:
4166:
4160:
4159:
4148:
4147:
4141:
4140:
4129:
4128:
4122:
4121:
4110:
4109:
4103:
4102:
4091:
4090:
4084:
4083:
4072:
4071:
4065:
4064:
4053:
4052:
4046:
4045:
4034:
4033:
4027:
4026:
4015:
4014:
4008:
4007:
3996:
3995:
3989:
3988:
3977:
3976:
3970:
3969:
3958:
3957:
3951:
3950:
3939:
3938:
3932:
3931:
3920:
3919:
3913:
3912:
3901:
3900:
3894:
3893:
3882:
3881:
3875:
3874:
3863:
3862:
3856:
3855:
3844:
3843:
3837:
3836:
3825:
3824:
3818:
3817:
3806:
3805:
3799:
3798:
3787:
3786:
3780:
3779:
3778:PSRLQ xmm1, imm8
3768:
3767:
3761:
3760:
3749:
3748:
3742:
3741:
3740:PSRLD xmm1, imm8
3730:
3729:
3723:
3722:
3711:
3710:
3704:
3703:
3702:PSRLW xmm1, imm8
3692:
3691:
3685:
3684:
3673:
3672:
3666:
3665:
3664:PSRAW xmm1, imm8
3654:
3653:
3647:
3646:
3635:
3634:
3628:
3627:
3626:PSRAD xmm1, imm8
3616:
3615:
3609:
3608:
3597:
3596:
3590:
3589:
3588:PSLLQ xmm1, imm8
3578:
3577:
3571:
3570:
3559:
3558:
3552:
3551:
3550:PSLLD xmm1, imm8
3540:
3539:
3533:
3532:
3521:
3520:
3514:
3513:
3512:PSLLW xmm1, imm8
3502:
3501:
3495:
3494:
3483:
3482:
3476:
3475:
3464:
3463:
3457:
3456:
3445:
3444:
3438:
3437:
3426:
3425:
3419:
3418:
3407:
3406:
3400:
3399:
3388:
3387:
3381:
3380:
3369:
3368:
3362:
3361:
3350:
3349:
3343:
3342:
3331:
3330:
3324:
3323:
3312:
3311:
3305:
3304:
3293:
3292:
3286:
3285:
3274:
3273:
3267:
3266:
3258:Bitwise AND NOT
3255:
3254:
3248:
3247:
3236:
3235:
3229:
3228:
3217:
3216:
3210:
3209:
3198:
3197:
3191:
3190:
3179:
3178:
3172:
3171:
3160:
3159:
3153:
3152:
3141:
3140:
3134:
3133:
3122:
3121:
3115:
3114:
3103:
3102:
3096:
3095:
3084:
3083:
3077:
3076:
3065:
3064:
3058:
3057:
3046:
3045:
3039:
3038:
3027:
3026:
3020:
3019:
3008:
3007:
3001:
3000:
2989:
2988:
2982:
2981:
2970:
2969:
2963:
2962:
2951:
2950:
2944:
2943:
2929:
2928:
2917:
2916:
2910:
2909:
2898:
2897:
2891:
2890:
2882:Move doubleword
2879:
2878:
2872:
2871:
2863:Move doubleword
2860:
2859:
2853:
2852:
2835:
2834:
2808:double-precision
2563:
2562:
2510:
2509:
2446:
2445:
2382:
2381:
2208:
2207:
2136:MOVLPD m64, xmm1
2125:MOVLPD xmm1, m64
2114:MOVHPD m64, xmm1
2050:
2049:
2009:
1735:
1408:
1407:
1344:
1339:
1191:
1190:
1152:PADDQ mm, mm/m64
1138:
1137:
1030:PMOVMSKB reg, mm
1000:
995:
957:
956:
792:PSUBD mm, mm/m64
779:PSUBW mm, mm/m64
766:PSUBB mm, mm/m64
753:PSRLQ mm, mm/m64
727:PSRLD mm, mm/m64
701:PSRLW mm, mm/m64
675:PSRAW mm, mm/m64
649:PSRAD mm, mm/m64
623:PSLLQ mm, mm/m64
597:PSLLD mm, mm/m64
571:PSLLW mm, mm/m64
402:PANDN mm, mm/m64
324:PADDD mm, mm/m64
311:PADDW mm, mm/m64
298:PADDB mm, mm/m64
259:
247:REX.W + 0F 7E /r
234:
233:REX.W + 0F 6E /r
146:
145:
90:
83:
76:
19:
18:
8213:
8212:
8208:
8207:
8206:
8204:
8203:
8202:
8183:
8182:
8170:
8165:
8164:
8154:
8152:
8144:
8143:
8139:
8126:
8122:
8112:
8110:
8101:
8100:
8096:
8086:
8084:
8081:
8077:
8076:
8072:
8063:
8059:
8054:
8037:
8032:
8031:
8026:
8007:
8000:
7998:
7993:
7989:
7985:
7983:
7974:
7963:
7961:
7957:
7943:
7937:
7936:
7925:
7917:
7911:
7910:
7895:complex numbers
7890:
7865:
7860:
7844:
7826:
7821:
7805:
7787:
7782:
7772:
7767:
7757:
7752:
7742:
7737:
7729:
7711:
7706:
7696:
7690:
7689:
7678:
7677:
7672:
7661:
7660:
7655:
7647:
7643:
7639:
7633:
7628:
7618:
7613:
7606:Sapphire Rapids
7604:
7596:
7591:
7583:
7545:
7537:
7533:
7530:
7524:
7513:
7507:
7502:
7501:
7492:
7488:
7470:
7464:
7458:
7448:
7443:
7438:
7433:
7423:
7418:
7413:
7408:
7398:
7393:
7388:
7383:
7377:
7362:
7356:
7350:
7343:
7338:
7333:
7328:
7323:
7316:
7311:
7306:
7301:
7296:
7289:
7284:
7279:
7274:
7269:
7263:
7248:
7242:
7236:
7226:
7221:
7216:
7211:
7201:
7196:
7191:
7186:
7176:
7171:
7166:
7161:
7155:
7140:
7134:
7128:
7121:
7116:
7111:
7106:
7101:
7094:
7089:
7084:
7079:
7074:
7067:
7062:
7057:
7052:
7047:
7041:
7026:
7020:
7014:
7004:
6999:
6994:
6989:
6979:
6974:
6969:
6964:
6954:
6949:
6944:
6939:
6933:
6918:
6912:
6906:
6899:
6894:
6889:
6884:
6879:
6872:
6867:
6862:
6857:
6852:
6845:
6840:
6835:
6830:
6825:
6819:
6804:
6798:
6792:
6782:
6777:
6772:
6767:
6757:
6752:
6747:
6742:
6732:
6727:
6722:
6717:
6711:
6696:
6690:
6684:
6677:
6672:
6667:
6662:
6657:
6650:
6645:
6640:
6635:
6630:
6623:
6618:
6613:
6608:
6603:
6597:
6582:
6576:
6570:
6560:
6555:
6550:
6545:
6535:
6530:
6525:
6520:
6510:
6505:
6500:
6495:
6478:
6463:
6457:
6451:
6441:
6436:
6431:
6426:
6416:
6411:
6406:
6401:
6391:
6386:
6381:
6376:
6359:
6352:
6347:
6334:Basic operation
6326:
6322:
6315:
6311:
6305:
6301:
6295:
6291:
6271:
6263:
6261:
6257:
6249:
6237:
6230:Sapphire Rapids
6227:
6208:
6200:
6184:
6176:
6160:
6152:
6147:
6141:
6135:
6129:
6125:
6121:
6117:
6111:
6105:
6089:
6081:
6071:
6067:
6064:
6026:Floating-point
6024:
6018:
5843:VBROADCASTI128
5779:
5700:VBROADCASTF128
5661:
5644:
5643:
5633:
5623:
5613:
5597:
5511:
5408:
4979:
4827:
4810:
4803:
4589:
4568:LDDQU xmm1, mem
4549:
4418:
4408:
4302:MOVQ2DQ xmm, mm
4247:MOVDQ2Q mm, xmm
4217:
4202:
4201:
4195:
4194:
4183:
4182:
4176:
4175:
4164:
4163:
4157:
4156:
4145:
4144:
4138:
4137:
4126:
4125:
4119:
4118:
4107:
4106:
4100:
4099:
4088:
4087:
4081:
4080:
4069:
4068:
4062:
4061:
4050:
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4043:
4042:
4031:
4030:
4024:
4023:
4012:
4011:
4005:
4004:
3993:
3992:
3986:
3985:
3974:
3973:
3967:
3966:
3955:
3954:
3948:
3947:
3936:
3935:
3929:
3928:
3917:
3916:
3910:
3909:
3898:
3897:
3891:
3890:
3879:
3878:
3872:
3871:
3860:
3859:
3853:
3852:
3841:
3840:
3834:
3833:
3822:
3821:
3815:
3814:
3803:
3802:
3796:
3795:
3784:
3783:
3777:
3776:
3765:
3764:
3758:
3757:
3746:
3745:
3739:
3738:
3727:
3726:
3720:
3719:
3708:
3707:
3701:
3700:
3689:
3688:
3682:
3681:
3670:
3669:
3663:
3662:
3651:
3650:
3644:
3643:
3632:
3631:
3625:
3624:
3613:
3612:
3606:
3605:
3594:
3593:
3587:
3586:
3575:
3574:
3568:
3567:
3556:
3555:
3549:
3548:
3537:
3536:
3530:
3529:
3518:
3517:
3511:
3510:
3499:
3498:
3492:
3491:
3480:
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3473:
3472:
3461:
3460:
3454:
3453:
3442:
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3435:
3434:
3423:
3422:
3416:
3415:
3404:
3403:
3397:
3396:
3385:
3384:
3378:
3377:
3366:
3365:
3359:
3358:
3347:
3346:
3340:
3339:
3328:
3327:
3321:
3320:
3309:
3308:
3302:
3301:
3290:
3289:
3283:
3282:
3271:
3270:
3264:
3263:
3252:
3251:
3245:
3244:
3233:
3232:
3226:
3225:
3214:
3213:
3207:
3206:
3195:
3194:
3188:
3187:
3176:
3175:
3169:
3168:
3157:
3156:
3150:
3149:
3138:
3137:
3131:
3130:
3119:
3118:
3112:
3111:
3100:
3099:
3093:
3092:
3081:
3080:
3074:
3073:
3062:
3061:
3055:
3054:
3043:
3042:
3036:
3035:
3024:
3023:
3017:
3016:
3005:
3004:
2998:
2997:
2986:
2985:
2979:
2978:
2967:
2966:
2960:
2959:
2948:
2947:
2942:MOVQ xmm, r/m64
2941:
2940:
2927:MOVQ r/m64, xmm
2926:
2925:
2914:
2913:
2907:
2906:
2895:
2894:
2888:
2887:
2876:
2875:
2870:MOVD r/m32, xmm
2869:
2868:
2857:
2856:
2851:MOVD xmm, r/m32
2850:
2849:
2830:
2825:
2811:floating-points
2561:
2508:
2444:
2380:
2206:
2067:xmm1, xmm2/m128
2048:
2043:
2030:
2007:
1733:
1587:MOVHPS m64, xmm
1565:MOVHPS xmm, m64
1532:MOVLPS m64, xmm
1510:MOVLPS xmm, m64
1392:
1342:
1337:
1189:
1133:
1036:Move Byte Mask
998:
993:
948:
939:
558:PSLLW mm1, imm8
428:PXOR mm, mm/m64
408:Bitwise AND NOT
389:PAND mm, mm/m64
257:
232:
216:MOVQ mm, mm/m64
203:MOVQ mm/m64, mm
196:Move doubleword
183:Move doubleword
136:
128:
105:instruction set
94:
17:
12:
11:
5:
8211:
8201:
8200:
8195:
8181:
8180:
8169:
8168:External links
8166:
8163:
8162:
8137:
8135:on 1 Aug 2024.
8120:
8094:
8070:
8056:
8055:
8053:
8050:
8049:
8048:
8043:
8036:
8033:
8030:
8029:
8005:
7972:
7954:
7953:
7950:
7949:
7946:
7941:
7933:
7932:
7928:Granite Rapids
7923:
7920:
7915:
7908:
7907:
7906:
7891:
7888:
7883:
7882:
7879:
7878:
7875:Granite Rapids
7871:
7868:
7863:
7858:
7857:
7856:
7845:
7842:
7837:
7836:
7833:
7832:
7829:
7824:
7819:
7818:
7817:
7806:
7803:
7798:
7797:
7794:
7793:
7790:
7785:
7779:
7778:
7775:
7770:
7764:
7763:
7760:
7755:
7749:
7748:
7745:
7740:
7735:
7734:
7733:
7730:
7727:
7722:
7721:
7718:
7717:
7714:
7709:
7703:
7702:
7699:
7694:
7686:
7685:
7682:
7675:
7669:
7668:
7665:
7658:
7652:
7651:
7636:
7631:
7625:
7624:
7621:
7616:
7614:STTILECFG m512
7610:
7609:
7602:
7599:
7594:
7592:LDTILECFG m512
7589:
7588:
7587:
7584:
7581:
7576:
7575:
7572:
7571:
7568:
7565:
7562:
7559:
7526:Main article:
7523:
7520:
7509:Main article:
7506:
7503:
7500:
7499:
7485:
7484:
7481:
7480:
7477:
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7369:
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7360:
7354:
7347:
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7336:
7331:
7326:
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7309:
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7299:
7293:
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7233:
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7208:
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7199:
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6808:
6802:
6796:
6789:
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6755:
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6707:
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6694:
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6681:
6680:
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6611:
6606:
6601:
6593:
6592:
6589:
6586:
6580:
6574:
6567:
6566:
6563:
6561:VFMSUBADD231PH
6558:
6556:VFMSUBADD231PD
6553:
6551:VFMSUBADD231PS
6548:
6542:
6541:
6538:
6536:VFMSUBADD213PH
6533:
6531:VFMSUBADD213PD
6528:
6526:VFMSUBADD213PS
6523:
6517:
6516:
6513:
6511:VFMSUBADD132PH
6508:
6506:VFMSUBADD132PD
6503:
6501:VFMSUBADD132PS
6498:
6493:
6492:
6491:
6485:
6474:
6473:
6470:
6467:
6461:
6455:
6448:
6447:
6444:
6442:VFMADDSUB231PH
6439:
6437:VFMADDSUB231PD
6434:
6432:VFMADDSUB231PS
6429:
6423:
6422:
6419:
6417:VFMADDSUB213PH
6414:
6412:VFMADDSUB213PD
6409:
6407:VFMADDSUB213PS
6404:
6398:
6397:
6394:
6392:VFMADDSUB132PH
6389:
6387:VFMADDSUB132PD
6384:
6382:VFMADDSUB132PS
6379:
6374:
6373:
6372:
6366:
6355:
6354:
6349:
6344:
6341:
6338:
6335:
6320:
6319:
6309:
6299:
6223:
6222:
6198:
6174:
6080:โ on the form
6020:Main article:
6017:
6014:
6011:
6010:
6007:
6003:
6002:
5998:
5997:
5994:
5990:
5989:
5985:
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5807:
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5799:
5778:
5773:
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5640:
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5626:
5620:
5619:
5616:
5610:
5609:
5606:
5596:
5591:
5588:
5587:
5584:
5583:66 0F 38 37 /r
5581:
5577:
5576:
5573:
5570:
5566:
5565:
5562:
5559:
5555:
5554:
5551:
5548:
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5537:
5533:
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5529:
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5505:
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5488:
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5473:
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5465:
5462:
5456:
5452:
5451:
5444:
5443:
5440:
5434:
5430:
5429:
5426:
5423:
5407:
5402:
5399:
5398:
5395:
5394:66 0F 38 2A /r
5392:
5388:
5387:
5384:
5383:66 0F 38 2B /r
5381:
5377:
5376:
5373:
5372:66 0F 38 29 /r
5370:
5366:
5365:
5362:
5361:66 0F 38 17 /r
5359:
5355:
5354:
5351:
5350:66 0f 38 35 /r
5348:
5344:
5343:
5340:
5339:66 0f 38 25 /r
5337:
5333:
5332:
5329:
5328:66 0f 38 34 /r
5326:
5322:
5321:
5318:
5317:66 0f 38 24 /r
5315:
5311:
5310:
5307:
5306:66 0f 38 33 /r
5304:
5300:
5299:
5296:
5293:
5289:
5288:
5285:
5284:66 0f 38 32 /r
5282:
5278:
5277:
5274:
5273:66 0f 38 22 /r
5271:
5267:
5266:
5263:
5262:66 0f 38 31 /r
5260:
5256:
5255:
5252:
5251:66 0f 38 21 /r
5249:
5245:
5244:
5241:
5240:66 0f 38 30 /r
5238:
5234:
5233:
5230:
5229:66 0f 38 20 /r
5227:
5223:
5222:
5219:
5216:
5212:
5211:
5208:
5205:
5201:
5200:
5197:
5194:
5190:
5189:
5186:
5183:
5179:
5178:
5175:
5172:
5168:
5167:
5164:
5161:
5157:
5156:
5153:
5150:
5146:
5145:
5142:
5141:66 0F 38 3F /r
5139:
5135:
5134:
5131:
5130:66 0F 38 3D /r
5128:
5124:
5123:
5120:
5117:
5113:
5112:
5109:
5108:66 0F 38 3C /r
5106:
5102:
5101:
5098:
5097:66 0F 38 3B /r
5095:
5091:
5090:
5087:
5086:66 0F 38 39 /r
5084:
5080:
5079:
5076:
5073:
5069:
5068:
5065:
5064:66 0F 38 38 /r
5062:
5058:
5057:
5054:
5051:
5047:
5046:
5043:
5042:66 0F 38 10 /r
5040:
5036:
5035:
5032:
5031:66 0F 38 28 /r
5029:
5025:
5024:
5021:
5020:66 0F 38 40 /r
5018:
5014:
5013:
5010:
5009:66 0F 38 41 /r
5007:
5003:
5002:
4999:
4996:
4992:
4991:
4988:
4985:
4978:
4975:
4972:
4971:
4968:
4965:
4961:
4960:
4957:
4954:
4950:
4949:
4946:
4943:
4939:
4938:
4935:
4932:
4928:
4927:
4924:
4921:
4917:
4916:
4913:
4910:
4906:
4905:
4902:
4901:66 0F 38 15 /r
4899:
4895:
4894:
4891:
4888:
4884:
4883:
4880:
4879:66 0F 38 14 /r
4877:
4873:
4872:
4869:
4866:
4862:
4861:
4858:
4855:
4851:
4850:
4847:
4844:
4840:
4839:
4836:
4833:
4826:
4823:
4809:
4804:
4802:
4796:
4793:
4792:
4789:
4788:66 0F 38 1E /r
4786:
4782:
4781:
4778:
4777:66 0F 38 1D /r
4775:
4771:
4770:
4767:
4766:66 0F 38 1C /r
4764:
4760:
4759:
4756:
4753:
4749:
4748:
4745:
4744:66 0F 38 02 /r
4742:
4738:
4737:
4734:
4733:66 0F 38 01 /r
4731:
4727:
4726:
4723:
4722:66 0F 38 03 /r
4720:
4716:
4715:
4712:
4711:66 0F 38 06 /r
4709:
4705:
4704:
4701:
4700:66 0F 38 07 /r
4698:
4694:
4693:
4690:
4689:66 0F 38 05 /r
4687:
4683:
4682:
4679:
4678:66 0F 38 04 /r
4676:
4672:
4671:
4668:
4667:66 0F 38 0B /r
4665:
4661:
4660:
4659:Shuffle bytes
4657:
4656:66 0F 38 00 /r
4654:
4650:
4649:
4646:
4645:66 0F 38 0A /r
4643:
4639:
4638:
4635:
4634:66 0F 38 09 /r
4632:
4628:
4627:
4624:
4623:66 0F 38 08 /r
4621:
4617:
4616:
4613:
4610:
4588:
4582:
4579:
4578:
4575:
4572:
4569:
4565:
4564:
4561:
4558:
4555:
4548:
4545:
4542:
4541:
4538:
4535:
4531:
4530:
4527:
4524:
4520:
4519:
4516:
4513:
4509:
4508:
4505:
4502:
4499:
4495:
4494:
4491:
4488:
4484:
4483:
4480:
4477:
4473:
4472:
4469:
4466:
4465:xmm1, xmm2/m64
4459:
4458:
4455:
4452:
4448:
4447:
4444:
4441:
4438:
4434:
4433:
4430:
4427:
4424:
4417:
4414:
4407:
4401:
4398:
4397:
4394:
4391:
4387:
4386:
4383:
4380:
4376:
4375:
4372:
4371:66 0F 73 /3 ib
4369:
4365:
4364:
4361:
4360:66 0F 73 /7 ib
4358:
4354:
4353:
4350:
4349:66 0F 70 /r ib
4347:
4343:
4342:
4339:
4338:F2 0F 70 /r ib
4336:
4332:
4331:
4328:
4327:F3 0F 70 /r ib
4325:
4321:
4320:
4317:
4314:
4310:
4309:
4306:
4303:
4299:
4298:
4295:
4292:
4288:
4287:
4284:
4281:
4277:
4276:
4273:
4270:
4266:
4265:
4262:
4259:
4255:
4254:
4251:
4248:
4244:
4243:
4240:
4237:
4233:
4232:
4229:
4226:
4216:
4213:
4210:
4209:
4206:
4199:
4191:
4190:
4187:
4180:
4172:
4171:
4168:
4161:
4153:
4152:
4149:
4142:
4134:
4133:
4130:
4123:
4115:
4114:
4111:
4104:
4096:
4095:
4092:
4085:
4077:
4076:
4073:
4066:
4058:
4057:
4054:
4047:
4039:
4038:
4035:
4028:
4020:
4019:
4016:
4009:
4001:
4000:
3997:
3990:
3982:
3981:
3978:
3971:
3963:
3962:
3959:
3952:
3944:
3943:
3940:
3933:
3925:
3924:
3921:
3914:
3906:
3905:
3902:
3895:
3887:
3886:
3883:
3876:
3868:
3867:
3864:
3857:
3849:
3848:
3845:
3838:
3830:
3829:
3826:
3819:
3811:
3810:
3807:
3800:
3792:
3791:
3788:
3785:66 0F 73 /2 ib
3781:
3773:
3772:
3769:
3762:
3754:
3753:
3750:
3747:66 0F 72 /2 ib
3743:
3735:
3734:
3731:
3724:
3716:
3715:
3712:
3709:66 0F 71 /2 ib
3705:
3697:
3696:
3693:
3686:
3678:
3677:
3674:
3671:66 0F 71 /4 ib
3667:
3659:
3658:
3655:
3648:
3640:
3639:
3636:
3633:66 0F 72 /4 ib
3629:
3621:
3620:
3617:
3610:
3602:
3601:
3598:
3595:66 0F 73 /6 ib
3591:
3583:
3582:
3579:
3572:
3564:
3563:
3560:
3557:66 0F 72 /6 ib
3553:
3545:
3544:
3541:
3534:
3526:
3525:
3522:
3519:66 0F 71 /6 ib
3515:
3507:
3506:
3503:
3496:
3488:
3487:
3484:
3477:
3469:
3468:
3465:
3458:
3450:
3449:
3446:
3439:
3431:
3430:
3427:
3420:
3412:
3411:
3408:
3401:
3393:
3392:
3389:
3382:
3374:
3373:
3370:
3363:
3355:
3354:
3351:
3344:
3336:
3335:
3332:
3325:
3317:
3316:
3313:
3306:
3298:
3297:
3294:
3287:
3279:
3278:
3275:
3268:
3260:
3259:
3256:
3249:
3241:
3240:
3237:
3230:
3222:
3221:
3218:
3211:
3203:
3202:
3199:
3192:
3184:
3183:
3180:
3173:
3165:
3164:
3161:
3154:
3146:
3145:
3142:
3135:
3127:
3126:
3123:
3116:
3108:
3107:
3104:
3097:
3089:
3088:
3085:
3078:
3070:
3069:
3066:
3059:
3051:
3050:
3047:
3040:
3032:
3031:
3028:
3021:
3013:
3012:
3009:
3006:66 0F C4 /r ib
3002:
2994:
2993:
2990:
2987:66 0F C5 /r ib
2983:
2975:
2974:
2971:
2964:
2956:
2955:
2954:Move quadword
2952:
2945:
2937:
2936:
2935:Move quadword
2933:
2930:
2922:
2921:
2920:Move quadword
2918:
2911:
2903:
2902:
2901:Move quadword
2899:
2892:
2884:
2883:
2880:
2873:
2865:
2864:
2861:
2854:
2846:
2845:
2842:
2839:
2829:
2826:
2824:
2821:
2820:
2819:
2783:
2782:
2779:
2776:
2772:
2771:
2768:
2765:
2761:
2760:
2757:
2754:
2750:
2749:
2746:
2743:
2739:
2738:
2735:
2732:
2728:
2727:
2724:
2721:
2717:
2716:
2713:
2710:
2706:
2705:
2702:
2699:
2695:
2694:
2691:
2688:
2684:
2683:
2680:
2677:
2673:
2672:
2669:
2666:
2662:
2661:
2658:
2655:
2651:
2650:
2647:
2644:
2640:
2639:
2636:
2633:
2629:
2628:
2625:
2622:
2618:
2617:
2614:
2611:
2607:
2606:
2603:
2600:
2596:
2595:
2592:
2589:
2585:
2584:
2581:
2578:
2574:
2573:
2570:
2567:
2560:
2557:
2554:
2553:
2550:
2547:
2543:
2542:
2539:
2536:
2532:
2531:
2528:
2527:66 0F C6 /r ib
2525:
2521:
2520:
2517:
2514:
2507:
2504:
2501:
2500:
2497:
2494:
2490:
2489:
2486:
2483:
2479:
2478:
2475:
2474:F2 0F C2 /r ib
2472:
2468:
2467:
2464:
2463:66 0F C2 /r ib
2461:
2457:
2456:
2453:
2450:
2443:
2440:
2437:
2436:
2433:
2430:
2426:
2425:
2422:
2419:
2415:
2414:
2411:
2408:
2404:
2403:
2400:
2397:
2393:
2392:
2389:
2386:
2379:
2376:
2373:
2372:
2369:
2366:
2362:
2361:
2358:
2355:
2351:
2350:
2347:
2344:
2340:
2339:
2336:
2333:
2329:
2328:
2325:
2322:
2318:
2317:
2314:
2311:
2307:
2306:
2303:
2300:
2296:
2295:
2292:
2289:
2285:
2284:
2281:
2278:
2274:
2273:
2270:
2267:
2263:
2262:
2259:
2256:
2252:
2251:
2248:
2245:
2241:
2240:
2237:
2234:
2230:
2229:
2226:
2223:
2219:
2218:
2215:
2212:
2205:
2202:
2199:
2198:
2195:
2192:
2188:
2187:
2184:
2181:
2177:
2176:
2173:
2170:
2166:
2165:
2162:
2159:
2155:
2154:
2151:
2148:
2144:
2143:
2140:
2137:
2133:
2132:
2129:
2126:
2122:
2121:
2118:
2115:
2111:
2110:
2107:
2104:
2097:
2096:
2093:
2090:
2086:
2085:
2082:
2079:
2075:
2074:
2071:
2068:
2061:
2060:
2057:
2054:
2047:
2044:
2042:
2039:
2029:
2023:
2017:
2016:
2013:
2010:
2004:
2003:
2000:
1999:F3 0F C2 /r ib
1997:
1993:
1992:
1989:
1986:
1982:
1981:
1978:
1975:
1971:
1970:
1967:
1964:
1960:
1959:
1956:
1953:
1949:
1948:
1945:
1942:
1938:
1937:
1934:
1931:
1927:
1926:
1923:
1920:
1916:
1915:
1912:
1909:
1905:
1904:
1901:
1898:
1894:
1893:
1890:
1887:
1883:
1882:
1879:
1876:
1872:
1871:
1868:
1865:
1861:
1860:
1857:
1854:
1850:
1849:
1846:
1843:
1839:
1838:
1835:
1832:
1828:
1827:
1824:
1821:
1817:
1816:
1813:
1810:
1806:
1805:
1802:
1799:
1795:
1794:
1791:
1788:
1784:
1783:
1780:
1777:
1773:
1772:
1769:
1766:
1762:
1761:
1758:
1755:
1751:
1750:
1747:
1744:
1740:
1739:
1736:
1731:
1727:
1726:
1723:
1720:
1716:
1715:
1712:
1709:
1705:
1704:
1701:
1698:
1694:
1693:
1690:
1687:
1683:
1682:
1679:
1676:
1672:
1671:
1668:
1665:
1661:
1660:
1657:
1654:
1650:
1649:
1646:
1643:
1639:
1638:
1635:
1632:
1628:
1627:
1624:
1621:
1617:
1616:
1613:
1610:
1606:
1605:
1602:
1599:
1595:
1594:
1591:
1588:
1584:
1583:
1580:
1577:
1573:
1572:
1569:
1566:
1562:
1561:
1558:
1555:
1551:
1550:
1547:
1544:
1540:
1539:
1536:
1533:
1529:
1528:
1525:
1522:
1518:
1517:
1514:
1511:
1507:
1506:
1503:
1500:
1496:
1495:
1492:
1489:
1485:
1484:
1481:
1478:
1474:
1473:
1470:
1467:
1463:
1462:
1459:
1456:
1452:
1451:
1448:
1445:
1441:
1440:
1437:
1434:
1430:
1429:
1426:
1423:
1419:
1418:
1415:
1412:
1391:
1385:
1382:
1381:
1378:
1375:
1371:
1370:
1367:
1364:
1360:
1359:
1356:
1353:
1349:
1348:
1345:
1343:0F 3A 0F /r ib
1340:
1334:
1333:
1330:
1327:
1323:
1322:
1319:
1316:
1312:
1311:
1308:
1305:
1301:
1300:
1297:
1294:
1290:
1289:
1286:
1283:
1279:
1278:
1275:
1272:
1268:
1267:
1264:
1261:
1257:
1256:
1253:
1250:
1246:
1245:
1244:Shuffle bytes
1242:
1239:
1235:
1234:
1231:
1228:
1224:
1223:
1220:
1217:
1213:
1212:
1209:
1206:
1202:
1201:
1198:
1195:
1188:
1185:
1182:
1181:
1178:
1175:
1171:
1170:
1167:
1164:
1160:
1159:
1156:
1153:
1149:
1148:
1145:
1142:
1132:
1129:
1126:
1125:
1122:
1119:
1115:
1114:
1111:
1108:
1104:
1103:
1100:
1097:
1093:
1092:
1089:
1086:
1082:
1081:
1078:
1075:
1071:
1070:
1067:
1064:
1060:
1059:
1056:
1053:
1049:
1048:
1045:
1042:
1038:
1037:
1034:
1031:
1027:
1026:
1023:
1020:
1016:
1015:
1012:
1009:
1005:
1004:
1001:
996:
990:
989:
986:
983:
982:MOVNTQ m64, mm
979:
978:
975:
972:
968:
967:
964:
961:
947:
940:
938:
935:
932:
931:
929:
926:
923:
919:
918:
916:
913:
910:
906:
905:
903:
900:
897:
893:
892:
890:
887:
884:
880:
879:
877:
874:
871:
867:
866:
864:
861:
858:
854:
853:
851:
848:
845:
841:
840:
838:
835:
832:
828:
827:
825:
822:
819:
815:
814:
812:
809:
806:
802:
801:
799:
796:
793:
789:
788:
786:
783:
780:
776:
775:
773:
770:
767:
763:
762:
760:
757:
754:
750:
749:
747:
744:
741:
740:PSRLQ mm, imm8
737:
736:
734:
731:
728:
724:
723:
721:
718:
715:
714:PSRLD mm, imm8
711:
710:
708:
705:
702:
698:
697:
695:
692:
689:
688:PSRLW mm, imm8
685:
684:
682:
679:
676:
672:
671:
669:
666:
663:
662:PSRAW mm, imm8
659:
658:
656:
653:
650:
646:
645:
643:
640:
637:
636:PSRAD mm, imm8
633:
632:
630:
627:
624:
620:
619:
617:
614:
611:
610:PSLLQ mm, imm8
607:
606:
604:
601:
598:
594:
593:
591:
588:
585:
584:PSLLD mm, imm8
581:
580:
578:
575:
572:
568:
567:
565:
562:
559:
555:
554:
552:
549:
546:
542:
541:
539:
536:
533:
529:
528:
526:
523:
520:
516:
515:
513:
510:
507:
503:
502:
500:
497:
494:
490:
489:
487:
484:
481:
477:
476:
474:
471:
468:
464:
463:
461:
458:
455:
451:
450:
448:
445:
442:
438:
437:
435:
432:
429:
425:
424:
422:
419:
416:
415:POR mm, mm/m64
412:
411:
409:
406:
403:
399:
398:
396:
393:
390:
386:
385:
383:
380:
377:
373:
372:
370:
367:
364:
360:
359:
357:
354:
351:
347:
346:
344:
341:
338:
334:
333:
331:
328:
325:
321:
320:
318:
315:
312:
308:
307:
305:
302:
299:
295:
294:
292:
289:
286:
282:
281:
279:
276:
273:
269:
268:
266:
263:
260:
254:
253:
251:
248:
245:
244:MOVQ r/m64, mm
241:
240:
238:
235:
230:
229:MOVQ mm, r/m64
226:
225:
223:
220:
217:
213:
212:
210:
207:
204:
200:
199:
197:
194:
191:
190:MOVD r/m32, mm
187:
186:
184:
181:
178:
177:MOVD mm, r/m32
174:
173:
170:
167:
164:
160:
159:
156:
153:
150:
135:
132:
127:
121:
96:
95:
93:
92:
85:
78:
70:
67:
66:
65:
64:
58:
52:
49:Virtualization
46:
40:
31:
30:
24:
23:
15:
9:
6:
4:
3:
2:
8210:
8199:
8196:
8194:
8191:
8190:
8188:
8179:
8175:
8172:
8171:
8151:
8147:
8141:
8134:
8130:
8124:
8108:
8104:
8098:
8080:
8074:
8067:
8061:
8057:
8047:
8044:
8042:
8039:
8038:
8024:
8022:
8020:
8018:
8016:
8014:
8012:
8010:
7981:
7979:
7977:
7969:
7959:
7955:
7947:
7942:
7935:
7934:
7929:
7921:
7916:
7909:
7904:
7900:
7896:
7892:
7886:
7884:
7880:
7876:
7872:
7869:
7864:
7859:
7854:
7850:
7846:
7840:
7839:
7838:
7834:
7830:
7825:
7820:
7815:
7811:
7807:
7801:
7800:
7799:
7795:
7791:
7786:
7781:
7780:
7776:
7771:
7766:
7765:
7761:
7756:
7751:
7750:
7746:
7741:
7736:
7731:
7725:
7723:
7719:
7715:
7710:
7705:
7704:
7700:
7695:
7688:
7687:
7683:
7676:
7671:
7670:
7666:
7659:
7654:
7653:
7637:
7632:
7627:
7626:
7622:
7617:
7612:
7611:
7607:
7600:
7595:
7590:
7585:
7579:
7577:
7573:
7569:
7566:
7563:
7560:
7557:
7556:
7553:
7551:
7543:
7529:
7519:
7517:
7512:
7496:
7495:little-endian
7490:
7486:
7469:
7463:
7457:
7456:
7447:
7442:
7437:
7432:
7431:
7422:
7417:
7412:
7407:
7406:
7397:
7392:
7387:
7382:
7380:
7374:
7361:
7355:
7349:
7348:
7342:
7337:
7332:
7327:
7322:
7321:
7315:
7310:
7305:
7300:
7295:
7294:
7288:
7283:
7278:
7273:
7268:
7266:
7260:
7247:
7241:
7235:
7234:
7225:
7220:
7215:
7210:
7209:
7200:
7195:
7190:
7185:
7184:
7175:
7170:
7165:
7160:
7158:
7152:
7139:
7133:
7127:
7126:
7120:
7115:
7110:
7105:
7100:
7099:
7093:
7088:
7083:
7078:
7073:
7072:
7066:
7061:
7056:
7051:
7046:
7044:
7038:
7025:
7019:
7013:
7012:
7003:
6998:
6993:
6988:
6987:
6978:
6973:
6968:
6963:
6962:
6953:
6948:
6943:
6938:
6936:
6930:
6917:
6911:
6905:
6904:
6898:
6893:
6888:
6883:
6878:
6877:
6871:
6866:
6861:
6856:
6851:
6850:
6844:
6839:
6834:
6829:
6824:
6822:
6816:
6803:
6797:
6791:
6790:
6781:
6776:
6771:
6766:
6765:
6756:
6751:
6746:
6741:
6740:
6731:
6726:
6721:
6716:
6714:
6708:
6695:
6689:
6683:
6682:
6676:
6671:
6666:
6661:
6656:
6655:
6649:
6644:
6639:
6634:
6629:
6628:
6622:
6617:
6612:
6607:
6602:
6600:
6594:
6581:
6575:
6569:
6568:
6559:
6554:
6549:
6544:
6543:
6534:
6529:
6524:
6519:
6518:
6509:
6504:
6499:
6494:
6489:
6486:
6483:
6480:
6479:
6475:
6462:
6456:
6450:
6449:
6440:
6435:
6430:
6425:
6424:
6415:
6410:
6405:
6400:
6399:
6390:
6385:
6380:
6375:
6370:
6367:
6364:
6361:
6360:
6356:
6350:
6348:(AVX512-FP16)
6345:
6342:
6339:
6336:
6333:
6332:
6329:
6325:
6314:will perform
6310:
6304:will perform
6300:
6294:will perform
6290:
6289:
6288:
6286:
6282:
6277:
6274:
6267:
6260:
6259:FMA4 encoding
6253:
6247:
6241:
6235:
6231:
6220:
6216:
6212:
6207:will perform
6204:
6199:
6196:
6192:
6188:
6183:will perform
6180:
6175:
6172:
6168:
6164:
6159:will perform
6156:
6151:
6150:
6149:
6144:
6138:
6132:
6114:
6108:
6103:
6099:
6093:
6090:EVEX.66.0F38
6085:
6079:
6078:EVEX prefixes
6075:
6070:
6069:FMA3 encoding
6062:
6057:
6053:
6049:
6045:
6041:
6036:
6033:
6029:
6023:
6008:
6005:
6004:
6000:
5999:
5992:
5991:
5987:
5986:
5979:
5978:
5974:
5970:
5967:
5966:
5962:
5958:
5955:
5954:
5950:
5949:
5942:
5941:
5937:
5936:
5929:
5928:
5924:
5923:
5915:
5914:
5910:
5909:
5905:
5904:
5900:
5899:
5892:
5891:
5887:
5886:
5882:
5881:
5877:
5876:
5872:
5866:
5865:
5861:
5859:VEXTRACTI128
5858:
5857:
5853:
5850:
5849:
5845:
5842:
5841:
5838:VPBROADCASTQ
5837:
5836:
5833:VPBROADCASTD
5832:
5831:
5828:VPBROADCASTW
5827:
5826:
5820:VPBROADCASTB
5819:
5818:
5815:VBROADCASTSD
5814:
5813:
5806:VBROADCASTSS
5805:
5804:
5800:
5797:
5796:
5793:
5790:
5788:
5784:
5777:
5767:
5764:
5763:
5759:
5756:
5755:
5751:
5748:
5747:
5743:
5742:
5734:
5733:
5729:
5728:
5720:
5719:
5715:
5713:VEXTRACTF128
5712:
5711:
5707:
5704:
5703:
5699:
5698:
5695:VBROADCASTSD
5694:
5693:
5687:VBROADCASTSS
5686:
5685:
5681:
5678:
5677:
5674:
5671:
5669:
5665:
5659:
5649:
5642:
5641:
5637:
5632:
5631:
5627:
5622:
5621:
5617:
5612:
5611:
5607:
5604:
5603:
5600:
5595:
5585:
5582:
5579:
5578:
5574:
5571:
5568:
5567:
5563:
5560:
5557:
5556:
5552:
5549:
5546:
5545:
5541:
5538:
5535:
5534:
5530:
5527:
5524:
5523:
5520:
5519:
5517:
5509:
5499:
5497:
5493:
5490:
5489:
5485:
5483:
5479:
5476:
5475:
5472:
5468:
5467:
5464:Insert Field
5461:
5457:
5453:
5450:
5446:
5445:
5439:
5435:
5431:
5427:
5424:
5421:
5420:
5417:
5416:
5414:
5406:
5396:
5393:
5390:
5389:
5385:
5382:
5379:
5378:
5374:
5371:
5368:
5367:
5363:
5360:
5357:
5356:
5352:
5349:
5346:
5345:
5341:
5338:
5335:
5334:
5330:
5327:
5324:
5323:
5319:
5316:
5313:
5312:
5308:
5305:
5302:
5301:
5297:
5295:66 0f 38 23/r
5294:
5291:
5290:
5286:
5283:
5280:
5279:
5275:
5272:
5269:
5268:
5264:
5261:
5258:
5257:
5253:
5250:
5247:
5246:
5242:
5239:
5236:
5235:
5231:
5228:
5225:
5224:
5220:
5217:
5214:
5213:
5209:
5206:
5203:
5202:
5198:
5195:
5192:
5191:
5187:
5184:
5181:
5180:
5176:
5173:
5170:
5169:
5165:
5162:
5159:
5158:
5154:
5151:
5148:
5147:
5143:
5140:
5137:
5136:
5132:
5129:
5126:
5125:
5121:
5119:66 0F 38 3E/r
5118:
5115:
5114:
5110:
5107:
5104:
5103:
5099:
5096:
5093:
5092:
5088:
5085:
5082:
5081:
5077:
5075:66 0F 38 3A/r
5074:
5071:
5070:
5066:
5063:
5060:
5059:
5055:
5052:
5049:
5048:
5044:
5041:
5038:
5037:
5033:
5030:
5027:
5026:
5022:
5019:
5016:
5015:
5011:
5008:
5005:
5004:
5000:
4997:
4994:
4993:
4989:
4986:
4983:
4982:
4969:
4966:
4963:
4962:
4958:
4955:
4952:
4951:
4947:
4944:
4941:
4940:
4936:
4933:
4930:
4929:
4925:
4922:
4919:
4918:
4914:
4911:
4908:
4907:
4903:
4900:
4897:
4896:
4892:
4889:
4886:
4885:
4881:
4878:
4875:
4874:
4870:
4867:
4864:
4863:
4859:
4856:
4853:
4852:
4848:
4845:
4842:
4841:
4837:
4834:
4831:
4830:
4822:
4821:
4820:
4816:
4808:
4800:
4790:
4787:
4784:
4783:
4779:
4776:
4773:
4772:
4768:
4765:
4762:
4761:
4757:
4754:
4751:
4750:
4746:
4743:
4740:
4739:
4735:
4732:
4729:
4728:
4724:
4721:
4718:
4717:
4713:
4710:
4707:
4706:
4702:
4699:
4696:
4695:
4691:
4688:
4685:
4684:
4680:
4677:
4674:
4673:
4669:
4666:
4663:
4662:
4658:
4655:
4652:
4651:
4647:
4644:
4641:
4640:
4636:
4633:
4630:
4629:
4625:
4622:
4619:
4618:
4614:
4611:
4608:
4607:
4604:
4601:
4600:
4599:
4595:
4586:
4576:
4573:
4570:
4567:
4566:
4562:
4559:
4556:
4553:
4552:
4539:
4536:
4533:
4532:
4528:
4525:
4522:
4521:
4517:
4514:
4511:
4510:
4507:for Graphics
4503:
4500:
4497:
4496:
4492:
4489:
4486:
4485:
4481:
4478:
4475:
4474:
4470:
4467:
4464:
4461:
4460:
4456:
4453:
4450:
4449:
4442:
4439:
4436:
4435:
4431:
4428:
4425:
4422:
4421:
4413:
4412:
4405:
4395:
4392:
4389:
4388:
4384:
4381:
4378:
4377:
4373:
4370:
4367:
4366:
4362:
4359:
4356:
4355:
4351:
4348:
4345:
4344:
4340:
4337:
4334:
4333:
4329:
4326:
4323:
4322:
4318:
4315:
4312:
4311:
4307:
4304:
4301:
4300:
4296:
4293:
4290:
4289:
4285:
4282:
4279:
4278:
4274:
4271:
4268:
4267:
4263:
4260:
4257:
4256:
4252:
4249:
4246:
4245:
4241:
4238:
4235:
4234:
4230:
4227:
4224:
4223:
4220:
4207:
4200:
4193:
4192:
4188:
4181:
4174:
4173:
4169:
4162:
4155:
4154:
4150:
4143:
4136:
4135:
4131:
4124:
4117:
4116:
4112:
4105:
4098:
4097:
4093:
4086:
4079:
4078:
4074:
4067:
4060:
4059:
4055:
4048:
4041:
4040:
4036:
4029:
4022:
4021:
4017:
4010:
4003:
4002:
3998:
3991:
3984:
3983:
3979:
3972:
3965:
3964:
3960:
3953:
3946:
3945:
3941:
3934:
3927:
3926:
3922:
3915:
3908:
3907:
3903:
3896:
3889:
3888:
3884:
3877:
3870:
3869:
3865:
3858:
3851:
3850:
3846:
3839:
3832:
3831:
3827:
3820:
3813:
3812:
3808:
3801:
3794:
3793:
3789:
3782:
3775:
3774:
3770:
3763:
3756:
3755:
3751:
3744:
3737:
3736:
3732:
3725:
3718:
3717:
3713:
3706:
3699:
3698:
3694:
3687:
3680:
3679:
3675:
3668:
3661:
3660:
3656:
3649:
3642:
3641:
3637:
3630:
3623:
3622:
3618:
3611:
3604:
3603:
3599:
3592:
3585:
3584:
3580:
3573:
3566:
3565:
3561:
3554:
3547:
3546:
3542:
3535:
3528:
3527:
3523:
3516:
3509:
3508:
3504:
3497:
3490:
3489:
3485:
3478:
3471:
3470:
3466:
3459:
3452:
3451:
3447:
3440:
3433:
3432:
3428:
3421:
3414:
3413:
3409:
3402:
3395:
3394:
3390:
3383:
3376:
3375:
3371:
3364:
3357:
3356:
3352:
3345:
3338:
3337:
3333:
3326:
3319:
3318:
3314:
3307:
3300:
3299:
3295:
3288:
3281:
3280:
3276:
3269:
3262:
3261:
3257:
3250:
3243:
3242:
3238:
3231:
3224:
3223:
3219:
3212:
3205:
3204:
3200:
3193:
3186:
3185:
3181:
3174:
3167:
3166:
3162:
3155:
3148:
3147:
3143:
3136:
3129:
3128:
3124:
3117:
3110:
3109:
3105:
3098:
3091:
3090:
3086:
3079:
3072:
3071:
3067:
3060:
3053:
3052:
3048:
3041:
3034:
3033:
3029:
3022:
3015:
3014:
3010:
3003:
2996:
2995:
2991:
2984:
2977:
2976:
2972:
2965:
2958:
2957:
2953:
2946:
2939:
2938:
2934:
2931:
2924:
2923:
2919:
2912:
2905:
2904:
2900:
2893:
2886:
2885:
2881:
2874:
2867:
2866:
2862:
2855:
2848:
2847:
2843:
2840:
2837:
2836:
2833:
2818:
2816:
2812:
2809:
2803:
2800:CMPSD (CMPS)
2799:
2797:
2791:
2787:
2786:
2780:
2777:
2774:
2773:
2769:
2766:
2763:
2762:
2758:
2755:
2752:
2751:
2747:
2744:
2741:
2740:
2736:
2733:
2730:
2729:
2725:
2722:
2719:
2718:
2714:
2711:
2708:
2707:
2703:
2700:
2697:
2696:
2692:
2689:
2686:
2685:
2681:
2678:
2675:
2674:
2670:
2667:
2664:
2663:
2659:
2656:
2653:
2652:
2648:
2645:
2642:
2641:
2637:
2634:
2631:
2630:
2626:
2623:
2620:
2619:
2615:
2612:
2609:
2608:
2604:
2601:
2598:
2597:
2593:
2590:
2587:
2586:
2582:
2579:
2576:
2575:
2571:
2568:
2565:
2564:
2551:
2548:
2545:
2544:
2540:
2537:
2534:
2533:
2529:
2526:
2523:
2522:
2518:
2515:
2512:
2511:
2498:
2495:
2492:
2491:
2487:
2484:
2481:
2480:
2476:
2473:
2470:
2469:
2465:
2462:
2459:
2458:
2454:
2451:
2448:
2447:
2434:
2431:
2428:
2427:
2423:
2420:
2417:
2416:
2412:
2409:
2406:
2405:
2401:
2398:
2395:
2394:
2390:
2387:
2384:
2383:
2370:
2367:
2364:
2363:
2359:
2356:
2353:
2352:
2348:
2345:
2342:
2341:
2337:
2334:
2331:
2330:
2326:
2323:
2320:
2319:
2315:
2312:
2309:
2308:
2304:
2301:
2298:
2297:
2293:
2290:
2287:
2286:
2282:
2279:
2276:
2275:
2271:
2268:
2265:
2264:
2260:
2257:
2254:
2253:
2249:
2246:
2243:
2242:
2238:
2235:
2232:
2231:
2227:
2224:
2221:
2220:
2216:
2213:
2210:
2209:
2196:
2193:
2190:
2189:
2185:
2182:
2179:
2178:
2174:
2171:
2168:
2167:
2163:
2160:
2157:
2156:
2152:
2149:
2146:
2145:
2141:
2138:
2135:
2134:
2130:
2127:
2124:
2123:
2119:
2116:
2113:
2112:
2108:
2105:
2102:
2099:
2098:
2094:
2091:
2088:
2087:
2083:
2080:
2077:
2076:
2072:
2069:
2066:
2063:
2062:
2058:
2055:
2052:
2051:
2038:
2037:
2036:
2027:
2022:
2014:
2011:
2006:
2005:
2001:
1998:
1995:
1994:
1990:
1987:
1984:
1983:
1979:
1976:
1973:
1972:
1968:
1965:
1962:
1961:
1957:
1954:
1951:
1950:
1946:
1943:
1940:
1939:
1935:
1932:
1929:
1928:
1924:
1921:
1918:
1917:
1913:
1910:
1907:
1906:
1902:
1899:
1896:
1895:
1891:
1888:
1885:
1884:
1880:
1877:
1874:
1873:
1869:
1866:
1863:
1862:
1858:
1855:
1852:
1851:
1847:
1844:
1841:
1840:
1836:
1833:
1830:
1829:
1825:
1822:
1819:
1818:
1814:
1811:
1808:
1807:
1803:
1800:
1797:
1796:
1792:
1789:
1786:
1785:
1781:
1778:
1775:
1774:
1770:
1767:
1764:
1763:
1759:
1756:
1753:
1752:
1748:
1745:
1742:
1741:
1737:
1732:
1729:
1728:
1724:
1721:
1718:
1717:
1713:
1710:
1707:
1706:
1702:
1699:
1696:
1695:
1691:
1688:
1685:
1684:
1680:
1677:
1674:
1673:
1669:
1666:
1663:
1662:
1658:
1655:
1652:
1651:
1647:
1644:
1641:
1640:
1636:
1633:
1630:
1629:
1625:
1622:
1619:
1618:
1614:
1611:
1608:
1607:
1603:
1600:
1597:
1596:
1592:
1589:
1586:
1585:
1581:
1578:
1575:
1574:
1570:
1567:
1564:
1563:
1559:
1556:
1553:
1552:
1548:
1545:
1542:
1541:
1537:
1534:
1531:
1530:
1526:
1523:
1520:
1519:
1515:
1512:
1509:
1508:
1504:
1501:
1498:
1497:
1493:
1490:
1487:
1486:
1482:
1479:
1476:
1475:
1471:
1468:
1465:
1464:
1460:
1457:
1454:
1453:
1449:
1446:
1443:
1442:
1438:
1435:
1432:
1431:
1427:
1424:
1421:
1420:
1416:
1413:
1410:
1409:
1406:
1403:
1400:
1399:
1398:
1389:
1379:
1376:
1373:
1372:
1368:
1365:
1362:
1361:
1357:
1354:
1351:
1350:
1346:
1341:
1336:
1335:
1331:
1328:
1325:
1324:
1320:
1317:
1314:
1313:
1309:
1306:
1303:
1302:
1298:
1295:
1292:
1291:
1287:
1284:
1281:
1280:
1276:
1273:
1270:
1269:
1265:
1262:
1259:
1258:
1254:
1251:
1248:
1247:
1243:
1240:
1237:
1236:
1232:
1229:
1226:
1225:
1221:
1218:
1215:
1214:
1210:
1207:
1204:
1203:
1199:
1196:
1193:
1192:
1179:
1176:
1173:
1172:
1168:
1165:
1162:
1161:
1157:
1154:
1151:
1150:
1146:
1143:
1140:
1139:
1136:
1123:
1120:
1117:
1116:
1112:
1109:
1106:
1105:
1101:
1098:
1095:
1094:
1090:
1087:
1084:
1083:
1079:
1076:
1073:
1072:
1068:
1065:
1062:
1061:
1057:
1054:
1051:
1050:
1046:
1043:
1040:
1039:
1035:
1032:
1029:
1028:
1025:Extract Word
1024:
1021:
1018:
1017:
1013:
1010:
1007:
1006:
1002:
997:
992:
991:
987:
984:
981:
980:
976:
973:
970:
969:
965:
962:
959:
958:
955:
953:
945:
930:
927:
924:
921:
920:
917:
914:
911:
908:
907:
904:
901:
898:
895:
894:
891:
888:
885:
882:
881:
878:
875:
872:
869:
868:
865:
862:
859:
856:
855:
852:
849:
846:
843:
842:
839:
836:
833:
830:
829:
826:
823:
820:
817:
816:
813:
810:
807:
804:
803:
800:
797:
794:
791:
790:
787:
784:
781:
778:
777:
774:
771:
768:
765:
764:
761:
758:
755:
752:
751:
748:
745:
742:
739:
738:
735:
732:
729:
726:
725:
722:
719:
716:
713:
712:
709:
706:
703:
700:
699:
696:
693:
690:
687:
686:
683:
680:
677:
674:
673:
670:
667:
664:
661:
660:
657:
654:
651:
648:
647:
644:
641:
638:
635:
634:
631:
628:
625:
622:
621:
618:
615:
612:
609:
608:
605:
602:
599:
596:
595:
592:
589:
586:
583:
582:
579:
576:
573:
570:
569:
566:
563:
560:
557:
556:
553:
550:
547:
544:
543:
540:
537:
534:
531:
530:
527:
524:
521:
518:
517:
514:
511:
508:
505:
504:
501:
498:
495:
492:
491:
488:
485:
482:
479:
478:
475:
472:
469:
466:
465:
462:
459:
456:
453:
452:
449:
446:
443:
440:
439:
436:
433:
430:
427:
426:
423:
420:
417:
414:
413:
410:
407:
404:
401:
400:
397:
394:
391:
388:
387:
384:
381:
378:
375:
374:
371:
368:
365:
362:
361:
358:
355:
352:
349:
348:
345:
342:
339:
336:
335:
332:
329:
326:
323:
322:
319:
316:
313:
310:
309:
306:
303:
300:
297:
296:
293:
290:
287:
284:
283:
280:
277:
274:
271:
270:
267:
264:
261:
256:
255:
252:
250:Move quadword
249:
246:
243:
242:
239:
237:Move quadword
236:
231:
228:
227:
224:
222:Move quadword
221:
218:
215:
214:
211:
209:Move quadword
208:
205:
202:
201:
198:
195:
192:
189:
188:
185:
182:
179:
176:
175:
171:
168:
165:
162:
161:
157:
154:
151:
148:
147:
144:
143:
142:
131:
125:
120:
118:
114:
110:
106:
103:
91:
86:
84:
79:
77:
72:
71:
69:
68:
62:
59:
56:
55:Cryptographic
53:
50:
47:
44:
41:
38:
35:
34:
33:
32:
29:
26:
25:
21:
20:
8153:. Retrieved
8149:
8140:
8123:
8111:. Retrieved
8107:the original
8097:
8085:. Retrieved
8073:
8060:
7958:
7656:TILEZERO tmm
7531:
7514:
7489:
7449:VFNMSUB231SH
7444:VFNMSUB231SD
7439:VFNMSUB231SS
7424:VFNMSUB213SH
7419:VFNMSUB213SD
7414:VFNMSUB213SS
7399:VFNMSUB132SH
7394:VFNMSUB132SD
7389:VFNMSUB132SS
7378:
7339:VFNMSUB231PH
7334:VFNMSUB231PD
7329:VFNMSUB231PS
7312:VFNMSUB213PH
7307:VFNMSUB213PD
7302:VFNMSUB213PS
7285:VFNMSUB132PH
7280:VFNMSUB132PD
7275:VFNMSUB132PS
7264:
7156:
7117:VFNMADD231PH
7112:VFNMADD231PD
7107:VFNMADD231PS
7090:VFNMADD213PH
7085:VFNMADD213PD
7080:VFNMADD213PS
7063:VFNMADD132PH
7058:VFNMADD132PD
7053:VFNMADD132PS
7042:
6934:
6820:
6712:
6598:
6487:
6481:
6368:
6362:
6324:Opcode table
6323:
6321:
6284:
6278:
6272:
6265:
6264:VEX.66.0F3A
6258:
6251:
6239:
6224:
6218:
6214:
6210:
6202:
6194:
6190:
6186:
6178:
6170:
6166:
6162:
6154:
6142:
6136:
6130:
6112:
6106:
6100:, W=1 means
6091:
6083:
6082:VEX.66.0F38
6068:
6037:
6025:
5960:
5851:VINSERTI128
5801:Description
5798:Instruction
5791:
5780:
5705:VINSERTF128
5682:Description
5679:Instruction
5672:
5662:
5598:
5513:
5512:
5495:
5481:
5470:
5459:
5448:
5437:
5436:66 0F 78 /0
5410:
5409:
4812:
4811:
4801:instructions
4602:
4591:
4590:
4587:instructions
4410:
4409:
4406:instructions
4218:
4089:66 0F E0, /r
3296:Bitwise XOR
3239:Bitwise AND
2831:
2805:
2804:MOVSD (MOVS)
2801:
2793:
2789:
2032:
2031:
2028:instructions
2020:
1404:
1401:
1394:
1393:
1390:instructions
1134:
1014:Insert Word
949:
138:
137:
129:
126:instructions
99:
61:Discontinued
42:
8113:October 17,
8087:October 17,
7990:TILELOADDT1
7889:AMX-COMPLEX
7638:Initialize
7629:TILERELEASE
7227:VFMADD231SH
7222:VFMADD231SD
7217:VFMADD231SS
7202:VFMADD213SH
7197:VFMADD213SD
7192:VFMADD213SS
7177:VFMADD132SH
7172:VFMADD132SD
7167:VFMADD132SS
7005:VFMSUB231SH
7000:VFMSUB231SD
6995:VFMSUB231SS
6980:VFMSUB213SH
6975:VFMSUB213SD
6970:VFMSUB213SS
6955:VFMSUB132SH
6950:VFMSUB132SD
6945:VFMSUB132SS
6895:VFMSUB231PH
6890:VFMSUB231PD
6885:VFMSUB231PS
6868:VFMSUB213PH
6863:VFMSUB213PD
6858:VFMSUB213PS
6841:VFMSUB132PH
6836:VFMSUB132PD
6831:VFMSUB132PS
6783:VFMADD231SH
6778:VFMADD231SD
6773:VFMADD231SS
6758:VFMADD213SH
6753:VFMADD213SD
6748:VFMADD213SS
6733:VFMADD132SH
6728:VFMADD132SD
6723:VFMADD132SS
6673:VFMADD231PH
6668:VFMADD231PD
6663:VFMADD231PS
6646:VFMADD213PH
6641:VFMADD213PD
6636:VFMADD213PS
6619:VFMADD132PH
6614:VFMADD132PD
6609:VFMADD132PS
6583:VFMSUBADDPD
6577:VFMSUBADDPS
6464:VFMADDSUBPD
6458:VFMADDSUBPS
6337:Opcode byte
6209:xmm1 โ (xmm
6185:xmm1 โ (xmm
6161:xmm1 โ (xmm
5956:VPERM2I128
5925:VPMASKMOVQ
5916:VPMASKMOVD
5911:VPGATHERQQ
5906:VPGATHERQD
5901:VPGATHERDQ
5893:VPGATHERDD
5888:VGATHERQPS
5883:VGATHERDPS
5878:VGATHERQPD
5867:VGATHERDPD
5765:VZEROUPPER
5749:VPERM2F128
5730:VMASKMOVPD
5721:VMASKMOVPS
5605:Instruction
5525:Instruction
5514:Added with
5422:Instruction
5411:Added with
4984:Instruction
4832:Instruction
4813:Added with
4609:Instruction
4592:Added with
4571:F2 0F F0 /r
4554:Instruction
4537:66 0F 7D /r
4526:F2 0F 7D /r
4515:66 0F 7C /r
4501:F2 0F 7C /r
4490:F3 0F 16 /r
4479:F3 0F 12 /r
4468:F2 0F 12 /r
4454:66 0F D0 /r
4440:F2 0F D0 /r
4423:Instruction
4393:66 0F 6C /r
4382:66 0F 6D /r
4316:66 0F E7 /r
4305:F3 0F D6 /r
4294:F3 0F 7F /r
4283:F3 0F 6F /r
4272:66 0F 7F /r
4261:66 0F 6F /r
4250:F2 0F D6 /r
4239:66 0F F7 /r
4225:Instruction
4203:66 0F F6 /r
4184:66 0F DE /r
4165:66 0F EE /r
4146:66 0F EA /r
4127:66 0F DA /r
4108:66 0F E3 /r
4070:66 0F 62 /r
4051:66 0F 61 /r
4032:66 0F 60 /r
4013:66 0F 6A /r
3994:66 0F 69 /r
3975:66 0F 68 /r
3956:66 0F D9 /r
3937:66 0F D8 /r
3918:66 0F F5 /r
3899:66 0F E9 /r
3880:66 0F E8 /r
3861:66 0F FB /r
3842:66 0F FA /r
3823:66 0F F9 /r
3804:66 0F F8 /r
3766:66 0F D3 /r
3728:66 0F D2 /r
3690:66 0F D1 /r
3652:66 0F E1 /r
3614:66 0F E2 /r
3576:66 0F F3 /r
3538:66 0F F2 /r
3500:66 0F F1 /r
3481:66 0F F4 /r
3462:66 0F E4 /r
3443:66 0F E5 /r
3424:66 0F D5 /r
3405:66 0F 66 /r
3386:66 0F 65 /r
3367:66 0F 64 /r
3348:66 0F 76 /r
3329:66 0F 75 /r
3310:66 0F 74 /r
3291:66 0F EF /r
3277:Bitwise OR
3272:66 0F EB /r
3253:66 0F DF /r
3234:66 0F DB /r
3215:66 0F DD /r
3196:66 0F DC /r
3177:66 0F ED /r
3158:66 0F EC /r
3139:66 0F D4 /r
3120:66 0F FE /r
3101:66 0F FD /r
3082:66 0F FC /r
3063:66 0F 67 /r
3044:66 0F 63 /r
3025:66 0F 6B /r
2968:66 0F D7 /r
2915:66 0F D6 /r
2896:F3 0F 7E /r
2877:66 0F 7E /r
2858:66 0F 6E /r
2838:Instruction
2767:F2 0F 2C /r
2756:F3 0F 5B /r
2745:66 0F 2C /r
2734:66 0F E6 /r
2723:F3 0F 5A /r
2701:F2 0F 2A /r
2690:F2 0F 5A /r
2668:F2 0F 2D /r
2646:66 0F 5B /r
2635:66 0F 2A /r
2624:66 0F 5A /r
2613:66 0F 2D /r
2602:F2 0F E6 /r
2580:F3 0F E6 /r
2566:Instruction
2549:66 0F 14 /r
2538:66 0F 15 /r
2513:Instruction
2496:66 0F 2E /r
2485:66 0F 2F /r
2449:Instruction
2410:66 0F 55 /r
2399:66 0F 54 /r
2385:Instruction
2368:F2 0F 5C /r
2357:66 0F 5C /r
2335:66 0F 51 /r
2324:F2 0F 59 /r
2313:66 0F 59 /r
2302:F2 0F 5D /r
2291:66 0F 5D /r
2280:F2 0F 5F /r
2269:66 0F 5F /r
2258:F2 0F 5E /r
2247:66 0F 5E /r
2236:F2 0F 58 /r
2225:66 0F 58 /r
2211:Instruction
2194:F2 0F 11 /r
2183:F2 0F 10 /r
2172:66 0F 50 /r
2161:66 0F 11 /r
2150:66 0F 10 /r
2128:66 0F 12 /r
2117:66 0F 17 /r
2106:66 0F 16 /r
2092:66 0F 2B /r
2081:66 0F 29 /r
2070:66 0F 28 /r
2053:Instruction
2033:Added with
2012:0F C6 /r ib
1988:0F C2 /r ib
1974:STMXCSR m32
1963:LDMXCSR m32
1955:F3 0F 5F /r
1933:F3 0F 5E /r
1911:F3 0F 5D /r
1889:F3 0F 5C /r
1867:F3 0F 59 /r
1845:F3 0F 58 /r
1823:F3 0F 53 /r
1801:F3 0F 52 /r
1779:F3 0F 51 /r
1722:F3 0F 2D /r
1689:F3 0F 2C /r
1656:F3 0F 2A /r
1502:F3 0F 11 /r
1480:F3 0F 10 /r
1411:Instruction
1397:Pentium III
1395:Added with
1377:0F 38 1E /r
1366:0F 38 1D /r
1355:0F 38 1C /r
1329:0F 38 02 /r
1318:0F 38 01 /r
1307:0F 38 03 /r
1296:0F 38 06 /r
1285:0F 38 07 /r
1274:0F 38 05 /r
1263:0F 38 04 /r
1252:0F 38 0B /r
1241:0F 38 00 /r
1230:0F 38 0A /r
1219:0F 38 09 /r
1208:0F 38 08 /r
1194:Instruction
1141:Instruction
999:0F 70 /r ib
960:Instruction
743:0F 73 /2 ib
717:0F 72 /2 ib
691:0F 71 /2 ib
665:0F 71 /4 ib
639:0F 72 /4 ib
613:0F 73 /6 ib
587:0F 72 /6 ib
561:0F 71 /6 ib
434:Bitwise XOR
395:Bitwise AND
149:Instruction
141:Pentium MMX
139:Added with
117:Pentium MMX
8187:Categories
8178:intrinsics
8052:References
7994:TILESTORED
7558:AMX subset
6353:(AVX10.2)
6044:Piledriver
5785:and AMD's
5744:VPERMILPD
5735:VPERMILPS
5518:processors
5415:processors
2815:doubleword
2432:66 0F 57/r
2421:66 0F 56/r
2346:F2 0F 51/r
2139:66 0F 13/r
421:Bitwise OR
7986:TILELOADD
7570:Added in
7471:VFNMSUBSD
7465:VFNMSUBSS
7363:VFNMSUBPD
7357:VFNMSUBPS
6046:, and on
5968:VPBLENDD
5787:Excavator
5757:VZEROALL
5668:Bulldozer
5494:F3 0F 2B
5480:F2 0F 2B
5469:F2 0F 79
5458:F2 0F 78
5447:66 0F 79
2103:xmm1, m64
2035:Pentium 4
8133:Archived
8035:See also
7984:For the
7964:TILEZERO
7843:AMX-FP16
7810:bfloat16
7804:AMX-BF16
7728:AMX-INT8
7582:AMX-TILE
7379:(-A*B)-C
7265:(-A*B)-C
7249:VFMADDSD
7243:VFMADDSS
7157:(-A*B)+C
7141:VFMADDPD
7135:VFMADDPS
7043:(-A*B)+C
7027:VFMSUBSD
7021:VFMSUBSS
6919:VFMSUBPD
6913:VFMSUBPS
6805:VFMADDSD
6799:VFMADDSS
6697:VFMADDPD
6691:VFMADDPS
6124:='213',
6120:='132',
6006:VPSRAVD
6001:VPSRLVQ
5993:VPSRLVD
5988:VPSLLVQ
5980:VPSLLVD
5943:VPERMPD
5930:VPERMPS
5608:Meaning
5531:Meaning
5460:/r ib ib
5428:Meaning
4990:Meaning
4838:Meaning
4615:Meaning
4231:Meaning
2844:Meaning
2657:0F 5A /r
2591:0F 5B /r
2572:Meaning
2519:Meaning
2455:Meaning
2391:Meaning
2217:Meaning
2059:Meaning
1977:0F AE /3
1966:0F AE /2
1944:0F 5F /r
1922:0F 5E /r
1900:0F 5D /r
1878:0F 5C /r
1856:0F 59 /r
1834:0F 58 /r
1812:0F 53 /r
1790:0F 52 /r
1768:0F 51 /r
1757:0F 2F /r
1746:0F 2E /r
1711:0F 2D /r
1678:0F 2C /r
1645:0F 2A /r
1634:0F 50 /r
1623:0F 2B /r
1612:0F 29 /r
1601:0F 28 /r
1590:0F 17 /r
1579:0F 16 /r
1568:0F 16 /r
1557:0F 15 /r
1546:0F 14 /r
1535:0F 13 /r
1524:0F 12 /r
1513:0F 12 /r
1491:0F 11 /r
1469:0F 10 /r
1458:0F 57 /r
1447:0F 56 /r
1436:0F 55 /r
1425:0F 54 /r
1417:Meaning
1200:Meaning
1177:0F F4 /r
1166:0F FB /r
1155:0F D4 /r
1147:Meaning
1121:0F F6 /r
1110:0F EE /r
1099:0F EA /r
1088:0F E4 /r
1077:0F E3 /r
1066:0F E0 /r
1055:0F DE /r
1044:0F DA /r
1033:0F D7 /r
1022:0F C5 /r
1011:0F C4 /r
985:0F E7 /r
974:0F F7 /r
966:Meaning
925:0F 62 /r
912:0F 61 /r
899:0F 60 /r
886:0F 6A /r
873:0F 69 /r
860:0F 68 /r
847:0F D9 /r
834:0F D8 /r
821:0F E9 /r
808:0F E8 /r
795:0F FA /r
782:0F F9 /r
769:0F F8 /r
756:0F D3 /r
730:0F D2 /r
704:0F D1 /r
678:0F E1 /r
652:0F E2 /r
626:0F F3 /r
600:0F F2 /r
574:0F F1 /r
548:0F D5 /r
535:0F E5 /r
522:0F F5 /r
509:0F 66 /r
496:0F 65 /r
483:0F 64 /r
470:0F 76 /r
457:0F 75 /r
444:0F 74 /r
431:0F EF /r
418:0F EB /r
405:0F DF /r
392:0F DB /r
379:0F DD /r
366:0F DC /r
353:0F ED /r
340:0F EC /r
327:0F FE /r
314:0F FD /r
301:0F FC /r
288:0F 67 /r
275:0F 63 /r
262:0F 6B /r
219:0F 6F /r
206:0F 7F /r
193:0F 7E /r
180:0F 6E /r
8155:21 June
8127:Intel,
8064:Intel,
7997:stride.
7640:TILECFG
7546:TILECFG
7516:AVX-512
7505:AVX-512
6935:(A*B)-C
6821:(A*B)-C
6713:(A*B)+C
6599:(A*B)+C
6488:(A*B)-C
6482:(A*B)+C
6369:(A*B)+C
6363:(A*B)-C
6232:, adds
6061:AVX-512
6056:AMD Zen
6048:Zhaoxin
6040:Haswell
5951:VPERMQ
5938:VPERMD
5871:Gathers
5516:Nehalem
5491:MOVNTSS
5477:MOVNTSD
5455:INSERTQ
4560:Meaning
4463:MOVDDUP
4429:Meaning
946:and SSE
155:Meaning
7968:ModR/M
7564:Opcode
7542:matrix
6281:ModR/M
6201:vfmadd
6177:vfmadd
6153:vfmadd
5528:Opcode
5508:SSE4.2
5433:EXTRQ
5425:Opcode
5413:Phenom
4987:Opcode
4835:Opcode
4815:Core 2
4807:SSE4.1
4612:Opcode
4598:Core 2
4563:Notes
4557:Opcode
4432:Notes
4426:Opcode
4228:Opcode
2841:Opcode
2796:string
2792:MOVSD
2788:CMPSD
2569:Opcode
2516:Opcode
2452:Opcode
2388:Opcode
2214:Opcode
2101:MOVHPD
2065:MOVAPD
2056:Opcode
1414:Opcode
1197:Opcode
1144:Opcode
963:Opcode
952:Athlon
158:Notes
152:Opcode
8150:Intel
8082:(PDF)
7459:7E/7F
7351:7C/7D
7237:7A/7B
7129:78/79
7015:6E/6F
6907:6C/6D
6793:6A/6B
6685:68/69
6571:5E/5F
6452:5C/5D
6268:/r ib
6217:)+xmm
6193:)+xmm
6169:)+xmm
5438:ib ib
5405:SSE4a
4585:SSSE3
166:0F 77
8157:2022
8115:2016
8089:2016
7992:and
7962:For
7903:FP32
7899:FP16
7853:FP32
7849:FP16
7814:FP32
7648:tmm7
7644:tmm0
7538:tmm7
7534:tmm0
6246:BF16
6234:FP16
6213:*xmm
6189:*xmm
6165:*xmm
6140:and
6102:FP64
6098:FP32
5973:SSE4
5776:AVX2
5594:F16C
4819:45nm
4799:SSE4
4594:Xeon
4404:SSE3
2026:SSE2
944:MMX+
163:EMMS
100:The
43:SIMD
37:Main
7646:to
7522:AMX
6203:231
6179:213
6155:132
6088:or
6076:or
6074:VEX
6032:AVX
5961:two
5664:AVX
5658:AVX
2802:and
2790:and
1388:SSE
124:MMX
113:MMX
102:x86
8189::
8148:.
8008:^
7988:,
7975:^
7930:D)
7877:)
7479:โ
7453:โ
7434:BF
7428:โ
7409:AF
7403:โ
7384:9F
7371:โ
7324:BE
7297:AE
7270:9E
7257:โ
7231:โ
7212:BD
7206:โ
7187:AD
7181:โ
7162:9D
7149:โ
7102:BC
7075:AC
7048:9C
7035:โ
7009:โ
6990:BB
6984:โ
6965:AB
6959:โ
6940:9B
6927:โ
6880:BA
6853:AA
6826:9A
6813:โ
6787:โ
6768:B9
6762:โ
6743:A9
6737:โ
6718:99
6705:โ
6658:B8
6631:A8
6604:98
6591:โ
6565:โ
6546:B7
6540:โ
6521:A7
6515:โ
6496:97
6472:โ
6446:โ
6427:B6
6421:โ
6402:A6
6396:โ
6377:96
6285:ib
6273:xx
6266:xx
6254:/r
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6094:/r
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5975:.
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8159:.
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7926:(
7873:(
7536:-
7476:โ
7473:*
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7365:*
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6807:*
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6454:*
6219:1
6215:3
6211:2
6195:3
6191:1
6187:2
6171:2
6167:3
6163:1
6143:y
6137:x
6131:y
6126:B
6122:A
6118:9
6113:x
89:e
82:t
75:v
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