Knowledge

x86 instruction listings

Source 📝

17990:
as "st" or "st(0)", and the other registers referred to as st(1),st(2),...st(7). It additionally provides a number of control and status registers, including "PC" (precision control, to control whether floating-point operations should be rounded to 24, 53 or 64 mantissa bits) and "RC" (rounding control, to pick rounding-mode: round-to-zero, round-to-positive-infinity, round-to-negative-infinity, round-to-nearest-even) and a 4-bit condition code register "CC", whose four bits are individually referred to as C0,C1,C2 and C3). Not all of the arithmetic instructions provided by x87 obey PC and RC.
4630:– most instruction forms that would previously take 16-bit data arguments were given the ability to take 32-bit arguments by setting their OperandSize to 32 bits, and instructions that could take 16-bit address arguments were given the ability to take 32-bit address arguments by setting their AddressSize to 32 bits. (Instruction forms that work on 8-bit data continue to be 8-bit regardless of OperandSize. Using a data size of 16 bits will cause only the bottom 16 bits of the 32-bit general-purpose registers to be modified – the top 16 bits are left unchanged.) 21735:
x87 coprocessors (other than the 8087) handle exceptions in a fairly unusual way. When an x87 instruction generates an unmasked arithmetic exception, it will still complete without causing a CPU fault – instead of causing a fault, it will record within the coprocessor information needed to handle the
17989:
coprocessor, if present, provides support for floating-point arithmetic. The coprocessor provides eight data registers, each holding one 80-bit floating-point value (1 sign bit, 15 exponent bits, 64 mantissa bits) – these registers are organized as a stack, with the top-of-stack register referred to
21742:
The exception to this is x87's "Non-Waiting" instructions, which will execute without causing such a fault even if a pending exception is present (with some caveats, see application note AP-578). These instructions are mostly control instructions that can inspect and/or modify the pending-exception
5253:
memory address might not be checked until after the port access has been performed – if this check fails (e.g. page fault or other memory exception), then the data item read from the port is lost. As such, it is not recommended to use this instruction to access an I/O port that performs any kind of
15985:
Read multiple MSRs. RSI points to a table of up to 64 MSR indexes to read (64 bits each), RDI points to a table of up to 64 data items that the MSR read-results will be written to (also 64 bits each), and RCX provides a 64-entry bitmap of which of the table entries to actually perform an MSR read
11715:
This prefix has the same encoding as the DS: segment override prefix – as of April 2022, Intel documentation does not appear to specify whether this prefix also retains its old segment-override function when used as a no-track prefix, nor does it provide an official mnemonic for this prefix. (GNU
15861:
Enqueue Command. Reads a 64-byte "command data" structure from memory (m512 argument) and writes atomically to a memory-mapped Enqueue Store device (register argument provides the memory address of this device, using ES segment and requiring 64-byte alignment.) Sets ZF=0 to indicate that device
17429:
The PREFETCHI instructions are hint instructions only - if an attempt is made to prefetch an invalid address, the instructions will act as NOPs with no exceptions generated. On processors that support Long-NOP but do not support the PREFETCHI instructions, these instructions will always act as
7056:) instruction is present on all known Intel x86 processors from the 80386 onwards, but only fully documented for Intel processors from the May 2018 release of the Intel SDM (rev 067) onwards. Before this release, mention of the instruction in Intel material was sporadic, e.g. AP-526 rev 001. 22075:
is implemented as a register renaming rather than a true data move. This has no semantic effect, but enables zero-cycle-latency operation. It also allows the instruction to break data dependencies for the x87 top-of-stack value, improving attainable performance for code optimized for these
4451:
These instructions were unprivileged on all x86 CPUs from 80286 onwards until the introduction of UMIP in 2017. This has been a significant security problem for software-based virtualization, since it enables these instructions to be used by a VM guest to detect that it is running inside a
16199:
Bind information to a platform by encrypting it with a platform-specific wrapping key. The instruction takes as input the addresses to two 256-byte-aligned "bind structures" in RBX and RCX, reads the structure pointed to by RBX and writes a modified structure to the address given in RCX.
11356:
When shadow stacks are enabled, return addresses are pushed on both the regular stack and the shadow stack when a function call is made. They are then both popped on return from the function call – if they do not match, then the stack is assumed to be corrupted, and a #CP exception is
7950:
In early processors, the TSC was a cycle counter, incrementing by 1 for each clock cycle (which could cause its rate to vary on processors that could change clock speed at runtime) – in later processors, it increments at a fixed rate that doesn't necessarily match the CPU clock speed.
16011:
Write multiple MSRs. RSI points to a table of up to 64 MSR indexes to write (64 bits each), RDI points to a table of up to 64 data items to write into the MSRs (also 64 bits each), and RCX provides a 64-entry bitmap of which of the table entries to actually perform an MSR write
24753: 9906:
prefix, the corresponding instruction with 32 bit operand size is encoded. This mechanism also applies to most other instructions with 32 bit operand size. These are not listed here as they do not gain a new mnemonic in Intel syntax when used with a 64 bit operand size.
21981:
On the Intel 8087 coprocessor, several reserved opcodes would perform operations behaving similarly to existing defined x87 instructions. These opcodes were documented for the 8087 and 80287, but then omitted from later manuals until the October 2017 update of the Intel
23656:
instruction is required to communicate the real-to-protected mode transition to the FPU. On 80387 and later x87 FPUs, real↔protected mode transitions are communicated automatically to the FPU without the need for any dedicated instructions – therefore, on these FPUs,
10984:
instructions are quite slow and exhibit data-dependent timing due to the use of a microcoded implementation (about 18 to 300 cycles, depending on the number of bits set in the mask argument). As a result, it is often faster to use other instruction sequences on these
12846:
value using the CRC-32C (Castagnoli) polynomial 0x11EDC6F41 (normal form 0x1EDC6F41). This is the polynomial used in iSCSI. In contrast to the more popular one used in Ethernet, its parity is even, and it can thus detect any error with an odd number of changed bits.
16864:
Intel documentation lists Tremont and Alder Lake as the processors in which CLDEMOTE was introduced. However, as of May 2022, no Tremont or Alder Lake models have been observed to have the CPUID feature bit for CLDEMOTE set, while several of them have the CPUID bit
17715:
Ensure that all preceding stores in thread have been committed to memory, and that any errors encountered by these stores have been signalled to any associated error logging resources. The set of errors that can be reported and the logging mechanism are
6359:
If the first argument is a memory operand and the second argument is a register operand, then the bit-index in the second argument is used in full – it is interpreted as a signed bit-index that is used to offset the memory address to use for the bit
24620:
internal (zero-)extending the value of a smaller (16-bit) register … applying the bswap to a 32-bit value "00 00 AH AL", … truncated to lower 16-bits, which are "00 00". … Bochs … bswap reg16 acts just like the bswap reg32 … QEMU … ignores the 66h
21736:
exception (instruction pointer, opcode, data pointer if the instruction had a memory operand) and set FPU status-word flag to indicate that a pending exception is present. This pending exception will then cause a CPU fault when the next x87, MMX or
13979:
instructions are hint instructions with effects only on performance, not program semantics. Providing an invalid address (e.g. address of an unmapped page or a non-canonical address) will cause the instruction to act as a NOP without any exceptions
23839: 24317: 17888:, the address size and 67h prefix control whether to use AX, EAX or RAX as address. The default segment DS: can be overridden by a segment-override prefix. The provided address does not need to be aligned – hardware will align it as necessary. 6355:
If the first argument to the instruction is a register operand and/or the second argument is an immediate, then the bit-index in the second argument is taken modulo operand size (16/32/64, in effect using only the bottom 4, 5 or 6 bits of the
14425:
The memory area that will be monitored will be not just the single byte specified by DS:rAX, but a linear memory region containing the byte – the size and alignment of this memory region is implementation-dependent and can be queried through
16852:
Since the instruction is considered a hint, it will execute as a NOP without any exceptions if the provided memory address is invalid or not in the L1 cache. It may also execute as a NOP under other implementation-dependent circumstances as
20296: 21590: 16082:
Read value from memory, then compare to first register operand. If the comparison passes, then add the second register operand to the memory value. The instruction as a whole is performed atomically. Memory argument is required to be
9516:) instruction will additionally stop subsequent bytes from being decoded as instructions, even speculatively. For this reason, if an indirect branch instruction is followed by something that is not code, it is recommended to place an 20577: 24757: 4301:
instructions consist of a 2-part data structure. The first part is a 16-bit value, specifying table size in bytes minus 1. The second part is a 32-bit value (64-bit value in 64-bit mode), specifying the linear start address of the
21911:
Later x87 FPUs, from 80287 onwards, changed the FPU exception mechanism to instead produce a CPU exception on the next x87 instruction. This made the Interrupt Mask bit unnecessary, so it was removed. In later Intel x87 FPUs, the
7428:
with 16-bit registers is not disallowed per se (it will execute without producing an #UD or other exceptions) but is documented to produce undefined results – it is reported to produce various different results on 486, 586, and
14109:
instruction are allowed to start executing only after all instructions before it have retired (which will ensure that all preceding loads but not necessarily stores have completed). The effect of dispatch-serialization is that
22362:
used for argument reduction will have been rounded to a multiple of 8 (or larger power-of-2), so that the bottom 3 bits of the quotient can still be correctly retrieved in a later pass that does complete the remainder
21498: 21217: 24843: 15692:
Request that the processor reset selected components of hardware-maintained prediction history. A bitmap of which components of the CPU's prediction history to reset is given in EAX (the imm8 argument is ignored).
21853:
exist in 16-bit and 32-bit variants. The 16-bit variants will load/store a 14-byte floating-point environment data structure to/from memory – the 32-bit variants will load/store a 28-byte data structure instead.
21307: 5202:) will repeat the instruction the number of times specified in rCX (CX or ECX, decided by AddressSize), decrementing rCX for each iteration (with rCX=0 resulting in no-op and proceeding to the next instruction). 21411: 14348:
instruction was introduced together with SSE2, it has its own CPUID flag and may be present on processors not otherwise implementing SSE2 and/or absent from processors that otherwise implement SSE2. (E.g. AMD
11732:) in a manner that can be extended to cover new instruction set extensions without the OS context-switching code needing to understand the specifics of the new extensions. This is done by defining a series of 4478:
instructions always use an operand size of 16 bits when used with a memory argument. With a register argument on 80386 or later processors, wider destination operand sizes are available and behave as follows:
20886: 24313: 21862:
will additionally load/store an additional 80 bytes of FPU data register content after the FPU environment, for a total of 94 or 108 bytes). The choice between the 16-bit and 32-bit variants is based on the
11743:
leaf is used to provide information about which state-components the CPU supports and what their sizes/offsets are, so that the OS can reserve the proper amount of space and set the associated enable-bits.
9221:
with a memory source operand, the CPU will always read the operand from memory – potentially causing memory exceptions and cache line-fills – even if the condition for the move is not satisfied. (The Intel
21061: 17894:
instruction is intended for recovery from otherwise-fatal Machine Check errors. It is non-cacheable, cannot be used to allocate a cache line without a memory access, and should not be used for fast memory
8755:
instructions are not ordered with respect to other instructions, and may sample their respective counters before earlier instructions are executed or after later instructions have executed. Invocations of
12267:
Prefetch data under the assumption that the data will be used only once, and attempt to minimize cache pollution from said data. The methods used to minimize cache pollution are implementation-dependent.
5321:
for its comparison (and consequently which mnemonic to use) is based on the AddressSize, not OperandSize. (OperandSize instead controls whether the jump destination should be truncated to 16 bits or not).
21820:
These pseudo-instructions are commonly recognized by x86 assemblers and disassemblers and treated as single instructions, even though all x86 CPUs with x87 coprocessors execute them as a sequence of two
9698:
differs slightly between AMD and Intel processors: non-canonical return addresses cause a #GP exception to be thrown in Ring 3 on AMD CPUs but Ring 0 on Intel CPUs. This has been known to cause security
25790: 5157:
For the operands where the DS segment is indicated, the DS segment can be overridden by a segment-override prefix – where the ES segment is indicated, the segment is always ES and cannot be overridden.
23220: 23134: 20973: 80: 22000:
and the load-constant instructions always use the round-to-nearest rounding mode. On the 80387 and later x87 FPUs, these instructions will use the rounding mode specified in the x87 RC register.
21123: 17761:
Invalidate TLB Entries for a range of pages, with broadcast. The invalidation is performed on the processor executing the instruction, and also broadcast to all other processors in the system.
15449:
Perform a platform feature configuration function. The function to perform is specified in EAX - depending on function, the instruction may take additional input operands in RBX, RCX and RDX.
23767: 20739: 24964: 22577:
If both st(0) and st(1) are ±∞, then the arctangent is computed as if each of st(0) and st(1) had been replaced with ±1 of the same sign. This produces a result that is an odd multiple of
20369: 15580:. In the absence of a memory write, the wait will end when either the TSC reaches the value specified by EDX:EAX or the wait has been going on for an OS-controlled maximum amount of time. 23058: 24143: 22981: 22921: 22448: 20676: 17852:
Like other variants of MOV to/from the CRx registers, the AltMovCr8 encodings ignore the top 2 bits of the instruction's ModR/M byte, and always execute as if these two bits are set to
20134: 6516:
with 16-bit arguments and a shift-amount greater than 16 produce undefined results. (Actual results differ between different Intel CPUs, with at least three different behaviors known.)
18675: 18563: 25841: 23693:
instructions, x86 assemblers/disassemblers may recognize variants of the instructions with no arguments. Such variants are equivalent to variants using st(1) as their first argument.
22062:
instructions, x86 assemblers/disassemblers may recognize variants of the instructions with no arguments. Such variants are equivalent to variants using st(1) as their first argument.
18619: 22572: 17763:
rAX takes the virtual address to invalidate and some additional flags, ECX takes the number of pages to invalidate, and EDX specifies ASID and PCID to perform TLB invalidation for.
20174: 14475:
may be ended by system events other than a memory write (e.g. cacheline evictions, interrupts) – the exact set of events that can cause the wait to end is implementation-specific.
7183:, the r/m argument represents the data to extract/insert a bitfield from/to, the reg argument the bitfield to be inserted/extracted, AX/EAX a bit-offset and CL a bitfield length. 4324:– documented to write a descriptor to memory with the last byte being set to 0. However, observed behavior is that bits 31:24 of the descriptor table address are written instead. 24255: 20787: 18724: 15356:
Perform an SGX Virtualization function. The function to perform is given in EAX - depending on function, the instruction may take additional input operands in RBX, RCX and RDX.
26021: 25992: 22602: 20439: 24084:
x86 also includes discontinued instruction sets which are no longer supported by Intel and AMD, and undocumented instructions which execute but are not officially documented.
8585:
with a leaf index (EAX) greater than 0 may leave EBX and ECX unmodified, keeping their old values. For this reason, it is recommended to zero out EBX and ECX before executing
24839: 3327:
Modifies stack for entry to procedure for high level language. Takes two operands: the amount of storage to be allocated on the stack and the nesting level of the procedure.
25066: 15259:
Perform an SGX Supervisor function. The function to perform is given in EAX - depending on function, the instruction may take additional input operands in RBX, RCX and RDX.
20086: 16274:) - when used with other opcodes, they may take other meanings (e.g. for instructions with memory operands outside 64-bit mode, they will work as segment-override prefixes 11229:
prefix may have other meanings). When used with such instructions during hardware lock elision, will end the associated transaction instead of performing the store/atomic.
6456:
If the source argument was all-0s, then the destination register is documented as being left unchanged on AMD processors, but set to an undefined value on Intel processors.
4622:
The 80386 added support for 32-bit operation to the x86 instruction set. This was done by widening the general-purpose registers to 32 bits and introducing the concepts of
24727: 23671: 17597:
instruction mainly in that it runs in user mode and that it can accept an optional timeout argument (given in TSC time units) in EBX (enabled by setting bit of ECX to 1.)
22671:
is a no-op in the sense that will leave the x87 FPU register stack unmodified, it may still modify FIP and CC, and it may fault if a pending x87 FPU exception is present.
16299:(Pentium 4 family) processors - but not supported on any other known processor prior to their re-introduction in "Redwood Cove" CPUs, starting with "Meteor Lake" in 2023. 13179:
Invalidate entries in TLB and paging-structure caches based on invalidation type in register and descriptor in m128. The descriptor contains a memory address and a PCID.
10183: 25727: 10241:
instructions defined by BMI1 and BMI2, the operand size may be 32 or 64 bits, controlled by the VEX.W bit – none of these instructions are available in 16-bit variants.
7787:
CPU Identification and feature information. Takes as input a CPUID leaf index in EAX and, depending on leaf, a sub-index in ECX. Result is returned in EAX,EBX,ECX,EDX.
22654: 22628: 15333:
Perform an SGX User function. The function to perform is given in EAX - depending on function, the instruction may take additional input operands in RBX, RCX and RDX.
26111: 22332: 5159:
The choice of whether to use the 16-bit SI/DI registers or the 32-bit ESI/EDI registers as the address registers to use is made by AddressSize, overridable with the
25032: 14477:
Regardless of whether the wait was ended by a memory write or some other event, monitoring will have ended and it will be necessary to set up monitoring again with
3776:
Note that since the lower half is the same for unsigned and signed multiplication, this version of the instruction can be used for unsigned multiplication as well.
22607:
If both st(0) and st(1) are ±0, then the arctangent is computed as if st(0) but not st(1) had been replaced with ±1 of the same sign, producing a result of ±0 or
21506: 7585:
Integer/system instructions that were not present in the basic 80486 instruction set, but were added in various x86 processors prior to the introduction of SSE. (
21135: 12186:
bitwise-ANDed with the current value of the "XINUSE" state-component bitmap (a bitmap of XSAVE state-components that are not known to be in their initial state).
24242: 5449:
instruction will only restore the low 16 bits of the stack pointer (ESP/RSP), with the remaining bits keeping whatever value they had in kernel code before the
5125:
change) off the stack as 32-bit items instead of 16-bit items. Should be used to return from interrupts when the interrupt handler was entered through a 32-bit
8205:
These instructions are provided for software testing to explicitly generate invalid opcodes. The opcodes for these instructions are reserved for this purpose.
26201: 25329: 14838:
instruction was introduced at the same time as SSE4.2, it is not considered to be a part of SSE4.2, but instead a separate extension with its own CPUID flag.
22474:
The x87 transcendental instructions do not obey PC or RC, but instead compute full 80-bit results. These results are not necessarily correctly rounded (see
9683:
were made an integral part of x86-64 – as a result, the instructions are available in 64-bit mode on all x86-64 processors from AMD, Intel, VIA and Zhaoxin.
7410:
Write Back and Invalidate Cache. Writes back all modified cache lines in the processor's internal cache to main memory and invalidates the internal caches.
24370: 24434: 24353: 21319: 14374:
instructions were introduced at the same time as SSE3, they have their own CPUID flag that needs to be checked separately from the SSE3 CPUID flag (e.g.
14175:
dispatch-serializing, and therefore cannot be used to enforce ordering on accesses to non-memory resources such as performance counters and x2apic MSRs.
25480: 11949:
may abstain from writing processor state items to memory when the CPU can determine that they haven't been modified since the most recent corresponding
7151:
They have been used by software mainly for detection of the buggy B0 stepping of the 80386. Microsoft Windows (v2.01 and later) will attempt to run the
4645:
makes both 32-bit. Additionally, they can be overridden on a per-instruction basis with two new instruction prefixes that were introduced in the 80386:
21984:
They are present on all known Intel x87 FPUs but unavailable on some older non-Intel FPUs, such as AMD Geode GX/LX, DM&P Vortex86 and NexGen 586PF.
20800: 17025:, these instructions perform additional functions, causing side-effects and reduced performance when stand-alone instruction serialization is needed. ( 10546:
Generate a bitmask of all-1s bits up to the lowest bit position with a 1 in the source argument. Returns all-1s if source argument is 0. Equivalent to
87: 25433: 24860: 6870:, the size of the offset part of the far pointer is given by operand size – the size of the segment part is always 16 bits. In 64-bit mode, using the 25184: 14789:
will delay the TSC read until all previous instructions have retired, guaranteeing ordering with respect to preceding memory loads (but not stores).
11736:, each with a size and offset within a given save area, and each corresponding to a subset of the state needed for one CPU extension or another. The 11359:
The shadow stack is additionally required to be stored in specially marked memory pages which cannot be modified by normal memory store instructions.
7238:
Byte Order Swap. Usually used to convert between big-endian and little-endian data representations. For 32-bit registers, the operation performed is:
21877:
under x86-64 will cause the 32-bit variants to be used. Since these can only load/store the bottom 32 bits of FIP and FDP, it is recommended to use
7529:
instructions will invalidate all cache lines in the CPU's L1 caches. It is implementation-defined whether they will invalidate L2/L3 caches as well.
14066:
sequence is not sufficient to prevent a load from being reordered past a previous store. To prevent such reordering, it is necessary to execute an
15862:
accepted the command, or ZF=1 to indicate that command was not accepted (e.g. queue full or the memory location was not an Enqueue Store device.)
13518:
instruction in that it has more relaxed ordering rules with respect to memory stores and other cache line flushes, enabling improved performance.
152:
instruction set of Intel (81 instructions total). These instructions are also available in 32-bit mode, they operate instead on 32-bit registers (
25545: 24960: 22506:
instructions, the maximum error bound of ±1 ulp only holds for st(1)=1.0 – for other values of st(1), the error bound is increased to ±1.35 ulps.
21430: 14027:. This imposes ordering on stores that can otherwise be reordered, such as non-temporal stores and stores to WC (Write-Combining) memory regions. 23153: 23067: 4732:
can be inferred to have a 32-bit OperandSize due to its use of EAX as an argument), new instruction mnemonics are not needed and not provided.
16093:
temp1 := EFLAGS := CMP temp1, reg1 // sets EFLAGS like regular compare reg1 := temp1 if( condition )  := temp1 + reg2
11191:
prefix may have other meanings). When used with such instructions, may start a transaction instead of performing the memory atomic operation.
1137:
JA, JAE, JB, JBE, JC, JE, JG, JGE, JL, JLE, JNA, JNAE, JNB, JNBE, JNC, JNE, JNG, JNGE, JNL, JNLE, JNO, JNP, JNS, JNZ, JO, JP, JPE, JPO, JS, JZ
26389: 25570: 25197: 24404: 24259: 24826: 20917: 17630:
Write zeroes to all bytes in a memory region that has the size and alignment of a CPU cache line and contains the byte addressed by DS:rAX.
6007:
Offset part is stored in destination register argument, segment part in FS/GS/SS segment register as indicated by the instruction mnemonic.
26018: 25837: 24556: 17029:
additionally has the issue that it causes a mandatory #VMEXIT when executed under virtualization, which causes a very large overhead.) The
14744:, most leaf functions are restricted to Ring 0, but the CAPABILITIES (EAX=0) and PARAMETERS (EAX=6) leaf functions are available in Ring 3. 25109: 24911: 24775: 21236: 11225:
Instruction prefix to indicate end of hardware lock elision, used with memory atomic/store instructions only (for other instructions, the
24208: 16760:, the write to the Processor Trace Packet will only happen if a set of enable-bits (the "TriggerEn", "ContextEn", "FilterEn" bits of the 14639:
prefix enables 64-bit addresses for the EXITAC leaf function only - REX prefixes are otherwise permitted but ignored for the instruction.
11294: 25824: 25752: 24188: 16655:
The EENTER and ERESUME functions cannot be executed inside an SGX enclave – the other functions can only be executed inside an enclave.
14006:
instructions, the bottom 3 bits of the ModR/M byte are ignored, and any value of x in the range 0..7 will result in a valid instruction.
26336: 23943:
instructions will save/restore SSE state only on processors that support SSE. Otherwise, they will only save/restore x87 and MMX state.
16202:
If the instruction fails, it will set EFLAGS.ZF=1 and return an error code in EAX. If it is successful, it sets EFLAGS.ZF=0 and EAX=0.
15451:
If the instruction fails, it will set EFLAGS.ZF=1 and return an error code in EAX. If it is successful, it sets EFLAGS.ZF=0 and EAX=0.
14127: 6977:
would not serialize the instruction stream – in part for this reason, it is usually required to perform a far jump immediately after a
25807: 25803: 11187:
Instruction prefix to indicate start of hardware lock elision, used with memory atomic instructions only (for other instructions, the
26265: 25988: 25777: 20436:
Floating-point power-of-2 scaling. Rounds the value of st(1) to integer with round-to-zero, then uses it as a scale factor for st(0):
14917:
will cause a #GP exception if the provided memory address is non-canonical. This discrepancy has been known to cause security issues.
10182:
instruction was absent from a few of the earliest Intel/AMD x86-64 processors. On Intel processors, the instruction was missing from
25919: 25151: 24981: 24787:
Ellis, Simson C., "The 386 SL Microprocessor in Notebook PCs", Intel Corporation, Microcomputer Solutions, March/April 1991, page 20
24475: 21005: 15024:
only) – third party testing indicates that some or all of these opcodes may be performing prefetch on at least some Intel Core CPUs.
10963:, the start position and length are not masked and can take values from 0 to 255. If the selected bits extend beyond the end of the 24569: 22338:
instruction will need to be run again in order to complete the remainder calculation. This is indicated by the instruction setting
20300: 10998: 9729:
prefix are used to return to 32-bit user-mode code. (Neither of these instructions can be used to return to 16-bit user-mode code.)
6312:
Load all CPU registers from a 296-byte data structure starting at ES:EDI, including "hidden" part of segment descriptor registers.
25062: 16774:
instruction is indicated in the SDM to cause an #UD exception if the 66h instruction prefix is used, regardless of other prefixes.
2384:
Not a real instruction. The assembler will translate these to a RETN or a RETF depending on the memory model of the target system.
25463: 25300: 24333: 24068: 20618: 15893:
in that it can place an arbitrary PASID (process address-space identifier) and a privilege-bit in the "command data" to enqueue.
15242:
Set up an encrypted enclave in which a guest can execute code that a compromised or malicious host cannot inspect or tamper with.
8640:
is also available on some Intel and AMD 486 processor variants that were released after the initial release of the Intel Pentium.
308:
and V30 (and possibly other NEC V-series CPUs) always use base 10, and ignore the argument, causing a number of incompatibilities
48: 24723: 14136:
is not necessarily dispatch-serializing by default – however, on all AMD CPUs that support any form of non-dispatch-serializing
8572:
instruction were made available on non-SL variants of the Intel 486 only after the initial release of the Intel Pentium in 1993.
6435:
is defined to return operand size if the source operand is zero – for other source operand values, they produce the same result.
5151:
For the 32-bit string instructions, the ±± notation is used to indicate that the indicated register is post-decremented by 4 if
24057: 21901:
some indeterminate time after the instruction was issued. This may not always be possible to handle, and so the FPU offers the
4383:
instruction can only modify the bottom 4 bits of this register and cannot clear bit 0. The inability to clear bit 0 means that
54: 25723: 17792:
instruction on the same logical processor have been responded to by all processors in the system. Instruction is serializing.
25976:
Intel® Software Guard Extensions (Intel® SGX) Architecture for Oversubscription of Secure Memory in a Virtualized Environment
25710: 25684: 24998: 24123: 24079: 15164: 11300:
Intel CET (Control-Flow Enforcement Technology) adds two distinct features to help protect against security exploits such as
7586: 60: 24587: 22450:. Also, its absolute value must be either 0 or at least 1. If these requirements are not satisfied, the result is undefined. 21756:, there exists a pseudo-instruction that has the same mnemonic except without the N. These pseudo-instructions consist of a 7240:
r = (r << 24) | ((r << 8) & 0x00FF0000) | ((r >> 8) & 0x0000FF00) | (r >> 24);
24693: 24113: 10232: 7328:. Exchanges the first operand with the second operand, then stores the sum of the two values into the destination operand. 5453:. This has necessitated complex workarounds on both Linux ("ESPFIX") and Windows. This issue also affects the later 64-bit 4127:
if (dst & 3) < (src & 3) then dst = (dst & 0xFFFC) | (src & 3) eflags.zf = 1 else eflags.zf = 0
26353:
Instruction tables: Lists of instruction latencies, throughputs and micro-operation breakdowns for Intel, AMD and VIA CPUs
26137:
Application note AP-578: Software and Hardware Considerations for FPU Exception Handlers for Intel Architecture Processors
26107: 25854: 24890: 24454: 14118:
barrier and a reordering barrier for accesses to non-memory resources such as performance counters (accessed through e.g.
13945:
processors prior to the Athlon XP did not support full SSE, but did introduce the non-SIMD instructions of SSE as part of
7878:
8 bytes. Compares EDX:EAX with m64. If equal, set ZF and store ECX:EBX into m64. Else, clear ZF and load m64 into EDX:EAX.
5881:
Differs from older variants of conditional jumps in that they accept a 16/32-bit offset rather than just an 8-bit offset.
26306:"Intel 64 and IA-32 Architectures Software Developer's Manual, Combined Volumes: 1, 2A, 2B, 2C, 2D, 3A, 3B, 3C, 3D and 4" 25585:"Saving Private Ryzen: PEXT/PDEP 32/64b replacement functions for #AMD CPUs (BR/#Zen/Zen+/#Zen2) based on @zwegner's zp7" 25028: 21067: 6507:, the shift-amount is masked – the bottom 5 bits are used for 16/32-bit operand size and 6 bits for 64-bit operand size. 5389:, the stack item corresponding to SP/ESP is popped off the stack (performing a memory read), but not placed into SP/ESP. 25506: 19366:
Same operation as subtract, except that it updates the x87 CC status register instead of any of the FPU stack registers
16282:, respectively). On processors that don't support branch hints, these prefixes are accepted but ignored when used with 15544:
Start monitoring a memory location for memory writes. The memory address to monitor is given by the register argument.
14410:), while newer documentation omits these operands. Assemblers/disassemblers may support one or both of these variants. 9412:
in future processors, and have indeed assigned some of these opcodes to other instructions in at least some processors.
4181:
Load segment limit from the specified segment descriptor. Sets ZF=1 if the descriptor could be loaded, ZF=0 otherwise.
25906: 25557: 25079: 15434:
Platform Configuration, including TME-MK ("Total Memory Encryption – Multi-Key") and TSE ("Total Storage Encryption").
12079:
Save processor extended state components specified by EDX:EAX to memory with compaction and optimization if possible.
7393:
Invalidate Internal Caches. Modified data in the cache are not written back to memory, potentially causing data loss.
26616: 26382: 24948: 24710: 24275: 24238: 24030:
will not initialize the FPU after saving its state to memory, but instead leave the x87 coprocessor state unmodified.
23919:
instructions were added in the "Deschutes" revision of Pentium II, and are not present in earlier "Klamath" revision.
21941:
with an 80-bit destination (m80 or st(i)) and an sNaN source value will produce exceptions on AMD but not Intel FPUs.
17128:
will set UIF to the value of bit 1 of the value popped off the stack for RFLAGS - this functionality is indicated by
13409: 73: 20693: 15087:
The 64-byte memory source argument does not need to be 64-byte aligned, and is not guaranteed to be read atomically.
13860:
Move 64 bytes of data from m512 to address given by ES:reg. The 64-byte write is done atomically with Direct Store.
8735:
instruction is always supported, however its CPUID bit may be missing. This is a workaround for a bug in Windows NT.
26175: 17427:
instructions will perform code prefetch only when using the RIP-relative addressing mode and act as NOPs otherwise.
17113: 15869: 15740: 15510: 11728:
The XSAVE instruction set extensions are designed to save/restore CPU extended state (typically for the purpose of
11266: 11094: 9215:
with a 32-bit operand size will clear the upper 32 bits of the destination register even if the condition is false.
6845:
byte should be 000 – modern x86 processors (Pentium and later) ignore bits 5:3 and will execute the instruction as
4588: 26455: 25321: 23008: 14990:
instruction, present on all processors with 3DNow! but not necessarily on processors with the PREFETCHW extension.
24387: 22926: 22866: 22392: 14938:
instruction set extension, but are also available as a standalone extension on systems that do not support 3DNow!
13086: 12945: 11966: 9362:
For cases where there is a need to use more than 9 bytes of NOP padding, it is recommended to use multiple NOPs.
8706: 5428:
instructions will cause a #GP exception if executed in Virtual-8086 mode if IOPL is not 3 and VME is not enabled.
496: 24796: 23748:
Due to the x87 FPU performing argument reduction for sin/cos with only about 68 bits of precision, the value of
16240:
documentation only - later Intel documentation lists the branch hint prefixes without assigning them a mnemonic.
15931:
Write Model-specific register. The MSR to write is specified in ECX, and the data to write is given in EDX:EAX.
4587:
instruction also flushes microarchitectural data buffers. This enables it to be used as part of workarounds for
26430: 25947:, order no. 325462-083, March 2024 - volume 1, chapter 11.4.5, page 281 and volume 2A, chapter 2.1.1, page 525. 25560:, apr 2022, vol 2B, p.4-130 "MOVSX/MOVSXD-Move with Sign-Extension" lists MOVSXD without REX.W as "discouraged" 24366: 24239:
Oracle® VM VirtualBox Administrator's Guide for Release 6.0, section 3.5: Details About Software Virtualization
20099: 12940: 12557:
Start monitoring a memory location for memory writes. The memory address to monitor is given by DS:AX/EAX/RAX.
10429: 9268:
Intel's recommended byte encodings for multi-byte NOPs of lengths 2 to 9 bytes in 32/64-bit mode are (in hex):
8608: 8017: 4405:– on 80386 and later, it is possible to leave Protected Mode, but this requires the use of the 80386-and-later 24430: 24349: 24225: 22358:
On 80387 and later, if the instruction didn't complete the remainder calculation, then the computed remainder
18639: 18527: 14428:
The memory location to monitor should have memory type WB (write-back cacheable), or else monitoring may fail.
25476: 24046: 23734:, it may also perform a partial computation if the quotient is too large, in which case it must be run again. 18939:
Store top-of-stack value to memory, with conversion to 18-digit Binary-Coded-Decimal integer, then pop stack
18583: 17567: 13629: 13443: 13360: 13345: 13262: 13203: 12858: 11819: 11206: 10638: 10627: 10444: 10327: 5228:) prefixes are available, which will repeat the instruction but only as long as the flag condition (ZF=1 for 834: 42: 24809: 22522: 16730:
instruction is only present on systems that support the EPC Oversubscription Extensions to SGX ("OVERSUB").
9573:
opcode was officially reserved as an invalid opcode from Pentium onwards, it only got assigned its mnemonic
9436:
opcode was officially reserved as an invalid opcode from Pentium onwards, it only got assigned the mnemonic
7531:
These instructions are serializing – on some processors, they may block interrupts until completion as well.
5268: 5172:
The 32-bit string instructions accept repeat-prefixes in the same way as older 8/16-bit string instructions.
4570:
Bits 19:16 of this mask are documented as "undefined" on Intel CPUs. On AMD CPUs, the mask is documented as
26375: 25425: 24856: 24656: 24633: 24536: 24103: 21909:
instructions to set/clear the Interrupt Mask bit (bit 7) of the x87 Control Word, to control the interrupt.
18918:
Load 18-digit Binary-Coded-Decimal integer value onto stack from memory, with conversion to floating-point
13157: 12635: 8838: 7632:. The MSR to read is specified in ECX. The value of the MSR is then returned as a 64-bit value in EDX:EAX. 7540:
If the PRM (Processor Reserved Memory) has been set up by using the PRMRRs (PRM range registers), then the
7369: 25164: 24596:
The instruction brings down the upper word of the doubleword register without affecting its upper 16 bits.
22519:, the following adjustments are done as compared to just computing a one-argument arctangent of the ratio 13809:
Store to memory using Direct Store (memory store that is not cached or write-combined with other stores).
11740: 25049: 23834:{\displaystyle k{=}{\frac {2^{66}*\pi }{\lfloor 2^{66}*\pi \rfloor }}\approx 1.0000000000000000000012874} 23718:
is rounded to integer with round-to-nearest-even rounding rather than the round-to-zero rounding used by
15550: 15498: 15312: 15275: 14539: 14161:
instruction are made globally observable after all memory loads, stores and cacheline-flushes before the
13871: 13820: 13710: 13695: 13619: 13524: 13188: 13076: 13071: 12853: 12790: 12729: 12679: 12575: 12163: 12085: 12028: 11301: 11194: 11073: 10885: 10621: 10424: 10317: 9790:
Third party testing indicates that the opcodes are present on the Pentium Pro but too buggy to be usable.
8834: 8804: 5441:
is used to return from kernel mode to user mode (which will entail a CPL change) and the user-mode stack
25493: 20745: 18695: 16880:, the operand size of the address argument is given by the address size, which may be overridden by the 15081:
The operand size for the register argument is given by the address size, which may be overridden by the
14869:
Invalidate TLB entries matching PCID and virtual memory address in descriptor, excluding global entries
14840:
On AMD processors, it is considered to be a part of the ABM extension, but still has its own CPUID flag.
14772:). Whether this value actually corresponds to a processor ID is a matter of operating system convention. 26149: 22580: 21920:
instructions were kept for backwards compatibility, executing as NOPs that do not modify any x87 state.
17875:
Support for AltMovCR8 was added in stepping F of the AMD K8, and is not available on earlier steppings.
13161: 13081: 11824: 11814: 10434: 10312: 6932:
byte is ignored – these opcodes are decoded and executed as if the top two bits of the ModR/M byte are
5126: 3926: 2168: 23923:
They are also considered an integral part of SSE and are therefore present in all processors with SSE.
17092:
is an index to pick an entry from the UITT (User-Interrupt Target Table, a table specified by the new
14183:, so if a memory barrier with dispatch serialization is needed, then it can be obtained by issuing an 13567:
Prefetch data with T1 locality hint (fetch into L2 cache, but not L1 cache) and intent-to-write hint.
26611: 26486: 26188: 25048:, sep 24, 2022 – provides a lengthy account of the history of the long NOP and the issues around it. 23498: 16867:
As of April 2023, the CPUID feature bit for CLDEMOTE has been observed to be set for Sapphire Rapids.
15458: 15307: 15297: 15237: 15006:
On Intel processors with PREFETCHW, these opcodes are documented as performing reserved-NOPs (except
13920: 13761: 12244: 11090: 11078: 10864:. On Intel CPUs, however, the CPUID bit for "ABM" is only documented to indicate the presence of the 10273: 9788:
are set on the Pentium Pro, even though the processor does not officially support these instructions.
7504:
executes as no-operation if the m8 argument is invalid (e.g. unmapped page or non-canonical address).
5121:
instruction in that it will pop interrupt return items (EIP,CS,EFLAGS; also ESP and SS if there is a
1130: 26162: 25957: 25214: 12510:
levels and/or multiple processors each with their own caches, the line is flushed from all of them.
10209:
without REX.W prefix are permitted but discouraged – such encodings behave identically to 16/32-bit
6218:
User Move – perform data moves that can access user memory while in In-circuit emulation HALT mode.
4728:
For instruction forms where the operand size can be inferred from the instruction's arguments (e.g.
26415: 26124: 22475: 21897:
In the case of an x87 instruction producing an unmasked FPU exception, the 8087 FPU will signal an
20040: 11971: 11576: 11309: 10913:
computes the index of the highest set bit in the source operand, producing a different result from
9828:
instructions are only available with version 4.2 or higher of the Transmeta Code Morphing software.
9667:
instructions were available on Model 7 (250nm "Little Foot") and later, not on the earlier Model 6.
25975: 25659: 25201: 24518: 24400: 13418:(alignment check) flag to a flag that prevents access to user-mode memory while in ring 0, 1 or 2. 9605:
opcodes, different x86 implementations are known to differ regarding whether the opcodes accept a
9581:
in its opcode maps from rev 3.17 onwards, while Intel SDM started listing it from rev 061 onwards.
7544:
instruction is not permitted and will cause a #GP(0) exception. (The PRM is needed for Intel SGX.)
4312:
with a 16-bit operand size, the address is ANDed with 00FFFFFFh. On Intel (but not AMD) CPUs, the
26580: 24822: 17670: 17100: 15965: 15913: 12843: 12664: 8438: 7693: 7629: 6396:) prefix when used with a memory argument – this results in the instruction executing atomically. 5442: 5264: 4633:
The default OperandSize and AddressSize to use for each instruction is given by the D bit of the
4122: 3897: 24548: 24300: 15491:
Move cache line containing m8 from CPU L1 cache to a more distant level of the cache hierarchy.
11687:
instructions act as NOPs on processors where shadow stacks are disabled or CET is not supported.
25242: 25122: 25105: 25092: 24907: 24873: 24505: 22479: 17636: 13534: 13453: 13350: 12668: 12657:
Depending on leaf function, the instruction may take additional arguments in RBX, ECX and EDX.
12634:
Load, authenticate and execute a digitally signed "Authenticated Code Module" as part of Intel
12570: 12171: 12095: 12038: 11581:
When IBT is enabled, an indirect branch (jump, call, return) to any instruction that is not an
10190:
family processors, it was added in stepping F, at the same time as DDR2 support was introduced.
9392:
as long-NOP was introduced in the Pentium Pro, but remained undocumented until 2006. The whole
9223: 8800: 8565: 7715: 7578: 3054: 2112: 1249: 25011: 24771: 24204: 22636: 22610: 15842: 10967:
argument (which has the usual 32/64-bit operand size), then the excess bits are read out as 0.
5501:
Second operand specifies which bit of the first operand to test. The bit to test is copied to
26504: 26445: 25820: 25740: 25446: 25200:, order no. 248966-007, see "Assembly/Compiler Coding Rule 13" on page 74. Archived from the 25106:-686 build uses long noops, that are unsupported by Transmeta Crusoe, immediate crash on boot 24184: 24093: 20291:{\displaystyle Q\leftarrow {\mathtt {IntegerRoundToZero}}\left({\frac {st(0)}{st(1)}}\right)} 15335:
Depending on function, the instruction may return data/status information in EAX and/or RCX.
15038:
The SMAP, PKU and RDPID instruction set extensions are supported on stepping 2 and later of
14617:
The C-states are processor-specific power states, which do not necessarily correspond 1:1 to
14115: 13909:
Write back all dirty cache lines to memory without invalidation. Instruction is serializing.
7089:
will check CPL against the interrupt descriptor's DPL field as an access-rights check, while
6841:, while the opcode is commonly specified as /0 – implying that bits 5:3 of the instruction's 3340:
Input from port to string. May be used with a REP prefix to repeat the instruction CX times.
2794: 1180: 1066: 894: 600: 139: 22310: 21585:{\displaystyle \left({\sqrt {\frac {1}{2}}}-1\right)<st(0)<\left({\sqrt {2}}-1\right)} 14402:
instructions, older Intel documentation lists instruction mnemonics with explicit operands (
9558:
processors), but did not get explicitly reserved for this purpose until P5-class processors.
26136: 26082: 26052: 25821:(M)WAIT for It: Bridging the Gap between Microarchitectural and Architectural Side Channels 25588: 24488: 22106:. This also affected instructions that perform divide as part of their operations, such as 15261:
Depending on function, the instruction may return data in RBX and/or an error code in EAX.
11035: 10527:
Extract lowest set bit in source argument. Returns 0 if source argument is 0. Equivalent to
8028: 6194: 4705:
Pre-existing opcodes that needed new mnemonics for their 32-bit OperandSize variants (e.g.
768: 274: 127: 25765: 25671: 24679: 20572:{\displaystyle st(0)\leftarrow st(0)*2^{{\mathtt {IntegerRoundToZero}}\left(st(1)\right)}} 8: 26480: 25931: 25532: 25519: 25393: 25135: 24977: 24467: 12022:
Save processor extended state components specified by EDX:EAX to memory with compaction.
10874:
However, all known processors that implement the "ABM"/"LZCNT" extensions also implement
4701:
The new instructions introduced in the 80386 can broadly be subdivided into two classes:
3414:
Output string to port. May be used with a REP prefix to repeat the instruction CX times.
3109: 2008: 1965: 1885: 875: 448: 26352: 26276: 26214: 25944: 25697: 25646: 25412: 25376: 25353: 25266: 24927: 24573: 17806:
The standard way to access the CR8 register is to use an encoding that makes use of the
11070:
Start transaction. If transaction fails, perform a branch to the given relative offset.
8151:
Other than AMD K7/K8, broadly unsupported in non-Intel processors released before 2005.
5292:
would sign-extend the 16-bit value in AX into a 32-bit value in the DX:AX register pair.
4850:
temp1 := DS: temp2 := ES: CMP temp1, temp2 /* 32-bit compare and set EFLAGS */
4321: 168:, etc.) counterparts. The updated instruction set is grouped according to architecture ( 26575: 25894:
Undocumented CPU Behaviour on x86 and RISC-V Microarchitectures: A Security Perspective
25880: 25634: 24740: 24290:, "Method of transferring control in a multitasking computer system" mentions 63h/ARPL. 22483: 22334:, then the remainder calculation may have been done only partially – in this case, the 22099: 17964: 16950: 16884:
prefix. The default segment used is DS:, which can be overridden with a segment prefix.
15603: 15061: 14807: 14535: 12698: 12409: 12298: 12153:
XSAVE was added in steppings E0/R0 of Penryn and is not available in earlier steppings.
10740:, then compacts the selected bits into a contiguous bit-vector. Operation performed is: 8890: 8865: 8710: 8219: 7959: 7945: 7891: 7812: 7738: 7645: 7574: 7565:
on processors that support the WBNOINVD extension – this will not invalidate the cache.
6970: 6136:
On Pentium and later processors, moves to the DR0-DR7 debug registers are serializing.
6116: 4691: 4634: 4486: 4424: 4376: 4363: 4150: 4006: 3991: 304:), but any other base will work. Later Intel's documentation has the generic form too. 185: 26330: 26078: 26048: 25584: 25459: 25292: 24330: 18873:
Store top-of-stack value to memory, with conversion to signed integer, then pop stack
26492: 26410: 26361: 26227: 25893: 24706: 24271: 21898: 14350: 13950: 13043: 12518: 12287: 10742:
ra=0; k=0; mask=r/m for i=0 to opsize-1 do if (mask == 1) then ra=rb; k=k+1
10712:
ra=0; k=0; mask=r/m for i=0 to opsize-1 do if (mask == 1) then ra=rb; k=k+1
9764: 9632:
menmonic (without arguments) was introduced by AMD and Intel at the same time as the
8653:
is not enabled by default and must be enabled through a Cyrix configuration register.
8388: 7492:
instruction that uses the accumulator (AL/AX/EAX/RAX) as its first argument would do.
7275:
is set to 1 and the first operand is overwritten with the second operand. Otherwise,
5407: 4554: 782: 758: 264: 18795:
Load signed integer value onto stack from memory, with conversion to floating-point
14538:
reaches or exceeds the value in EDX:EBX. (Undocumented, reportedly present in Intel
8441:. This is done by writing the virtual address of the new microcode to upload to MSR 5355:, these instructions have not been given new mnemonics for their ECX-using variants. 4561:
opcode as a one-byte breakpoint to transition from Virtual 8086 Mode to kernel mode.
26305: 26253: 26034: 26005: 23961:
instructions, enabling faster save/restore by avoiding misaligned loads and stores.
22241: 22103: 17481: 14454:
x200 and AMD K10 and later, there exist documented MSRs that can be used to enable
13574: 8714: 8381: 8111: 8080:
Conditional move to register. The source operand may be either register or memory.
7989: 7921: 7875: 7836: 7762: 7696:. The MSR to write is specified in ECX, and the data to write is given in EDX:EAX. 7675: 7268: 6960:
registers, the operand size is always 64 bits in 64-bit mode and 32 bits otherwise.
6064: 4687: 4235:
Load all CPU registers from a 102-byte data structure starting at physical address
4213:
Verify a segment for writing. Sets ZF=1 if segment can be written, ZF=0 otherwise.
3161: 2513: 24994: 24431:
Speculating the entire x86-64 Instruction Set In Seconds with This One Weird Trick
24163: 23652:
instructions has different formats in Real Mode and Protected Mode. On 80287, the
22465:, rounding is only applied in the case of overflow, underflow or subnormal result. 21953:
is a commonly used idiom for popping a single register off the x87 register stack.
17673:(mainly performance counters) in user mode. ECX specifies which register to read. 17399:
instructions perform a locked memory operation, they do not require or accept the
16850:, the cache level that it will demote a cache line to is implementation-dependent. 14157:
instruction ensures that all memory loads, stores and cacheline-flushes after the
10659:
Widening unsigned integer multiply without setting flags. Multiplies EDX/RDX with
10565:
Copy all bits of the source argument, then clear the lowest set bit. Equivalent to
9865:
These instructions can only be encoded in 64 bit mode. They fall in four groups:
8791:
TSC running at a fixed rate as long as the processor core is not in a deep-sleep (
4260:
Store all CPU registers to a 102-byte data structure starting at physical address
4009:) specified by the 16-bit argument is marked busy, but a task switch is not done. 26570: 26498: 26425: 24591: 24337: 22264:
C1 is set to the sign-bit of st(0), regardless of whether st(0) is Empty or not.
17459: 15760: 15146: 14825:
was added in stepping F of the AMD K8, and is not available on earlier steppings.
14033:
also acts as a reordering barrier on cache flushes/writebacks performed with the
12507: 12227: 11764: 11330: 10878:
and set the CPUID feature bit for POPCNT, so the distinction is theoretical only.
9922: 8823:
TSC running at a fixed rate, and remaining synchronized between CPU cores in all
7789:
Instruction is serializing, and causes a mandatory #VMEXIT under virtualization.
7604: 7219: 5479: 5122: 4756: 4557:– Windows 95 and OS/2 2.x are known to make extensive use of this #UD to use the 3875: 104: 24934:
instruction on p.1739 describes the instruction sequences required to order the
24287: 16991:
0 = C0.2 (slower wakeup, improves performance of other SMT threads on same core)
16237: 16183:
Part of Intel TSE (Total Storage Encryption), and available in 64-bit mode only.
15616:
instructions specifies extra flags to control the operation of the instruction.
15576:
Timed wait for a write to a monitored memory location previously specified with
13251: 10950:
produces undefined behavior (leaves destination unmodified on most modern CPUs).
10804:
is masked to 5 bits for 32-bit operand size and 6 bits for 64-bit operand size.
9894:
existing instructions extended to a 64 bit operand size (remaining instructions)
8020:. The counter to read is specified by ECX and its value is returned in EDX:EAX. 6199:
Performs software interrupt #1 if executed when not using in-circuit emulation.
5368:, the value of SP/ESP pushed onto the stack is the value it had just before the 4198:
Verify a segment for reading. Sets ZF=1 if segment can be read, ZF=0 otherwise.
4159:, then stores the bottom 16/32 bits of the result in destination register. Sets 26560: 26543: 26538: 26528: 26463: 26440: 26347: 25791:
Intel® Xeon Phi™ Product Family x200 (KNL) User mode (ring 3) MONITOR and MWAIT
24894: 24450: 24384:(PATCH) x86-64, espfix: Don't leak bits 31:16 of %esp returning to 16-bit stack 23633: 23406: 23260: 22720: 17173: 16147: 15790: 15768: 15764: 14515: 14029:
On Intel CPUs, as well as AMD CPUs from Zen1 onwards (but not older AMD CPUs),
12757: 11729: 11151: 10301: 8948: 8688: 8666:
is only supported with some system BIOSes. On some NexGen CPUs that do support
8621:
to ring 0 also exists on AMD processors supporting the "CpuidUserDis" feature (
8200: 7797: 7750: 6990: 6574: 5812: 5675: 5652: 5502: 5071: 4950: 4402: 4388: 4160: 3930: 3850: 3506:; no POP SP here, all it does is ADD SP, 2 (since AX will be overwritten later) 582: 112: 21871:
instruction prefix. On 8087 and 80287, only the 16-bit variants are available.
18382:
Store top-of-stack floating-point value to memory or stack register, then pop
14335:
executions and interval length that can trigger #VMEXIT are platform-specific.
12612:
ECX and EAX are used to provide extra extension and hint flags, respectively.
12565: 12293: 11706:
act as NOPs on processors that don't support CET_IBT or where IBT is disabled.
8876:
cannot be run in Virtual-8086 mode. Later processors removed this restriction.
8796: 8591:
Processors noted to exhibit this behavior include Cyrix MII and IDT WinChip 2.
8395: 8117: 7108:
In virtual-8086 mode with VME enabled, interrupt redirection is supported for
6454:
set the EFLAGS.ZF flag to 1 if the source argument was all-0s and 0 otherwise.
26605: 26548: 26474: 23672:
discontinued instructions specific to particular 80387-compatible FPU models.
23404:
floating-point compare instruction in that it puts its result in the integer
17858:
The AltMovCr8 encodings are available in 64-bit mode. However, combining the
17121: 16165:
Prefetch code to all levels of the cache hierarchy except first-level cache.
16101: 16032: 15993: 15945: 15415: 15291: 15280: 14877:
Invalidate TLB entries matching PCID in descriptor, excluding global entries
13750: 13656:
Write data from EAX into User Page Key Register, and perform a Memory Fence.
8795:
or deeper) mode, but not synchronized between CPU cores. Introduced in Intel
8764:) may be reordered relative to each other even for reads of the same counter. 7854: 7731: 7325: 7075:) opcode differs from the operation of the regular software interrupt opcode 6994: 6153: 4695: 2697: 607: 120: 25093:
AMD 64-bit Technology – AMD x86-64 Architecture Programmer’s Manual Volume 3
22127:
instruction will set C0, C2 and C3 based on value type in st(0) as follows:
16855:
On systems that do not support the CLDEMOTE extension, it executes as a NOP.
14618: 14600: 14023:
instruction are made globally observable after all memory stores before the
12345:
Prefetch data to all levels of the cache hierarchy except L1 and L2 caches.
5615:
Second operand specifies which bit of the first operand to test and toggle.
3982:
Load LDTR (Local Descriptor Table Register) from 16-bit register or memory.
3401:
Releases the local stack storage created by the previous ENTER instruction.
26435: 26420: 26019:
Which Platforms Support Intel® Software Guard Extensions (Intel® SGX) SGX2?
24401:
Getting MS-DOS games to run on Windows 95: Working around the iretd problem
21493:{\displaystyle \left|st(0)\right|<\left(1-{\sqrt {\frac {1}{2}}}\right)} 21212:{\displaystyle st(1)\leftarrow \arctan \left({\frac {st(1)}{st(0)}}\right)} 17828:
The AltMovCr8 extension adds an additional method to access CR8, using the
17788:
Wait until all TLB invalidations signalled by preceding invocations of the
14375: 14091:
instruction are made globally observable after all memory loads before the
13946: 12559:
ECX and EDX are reserved for extra extension and hint flags, respectively.
11960: 11351: 11305: 9869:
original instructions that reuse existing opcodes for a different purpose (
9685:
Outside 64-bit mode, the instructions are available on AMD processors only.
9456: 9259:
instructions have been reported to be present as undocumented instructions.
5582:
Second operand specifies which bit of the first operand to test and clear.
5544: 3216: 294:
8086/8088 datasheet documents only base 10 version of the AAD instruction (
126:
The x86 instruction set has been extended several times, introducing wider
25217:, 1995. order no. 241430-004, appendix A, page 943 – reserves the opcodes 22286:
is set to 0 on 8087/80287 but -∞ on 80387 and later. If st(0) is ±∞, then
17584:
Wait for a write to a monitored memory location previously specified with
17017:
While serialization can be performed with older instructions such as e.g.
12606:
Wait for a write to a monitored memory location previously specified with
8670:, EFLAGS.ID is not supported but EFLAGS.AC is, complicating CPU detection. 8615:
to ring 0. Such MSRs are documented for at least Ivy Bridge and Denverton.
4393:
On 80286, it is not possible to leave Protected Mode at all (neither with
24417: 23243: 21764:) followed by the corresponding non-waiting x87 instruction. For example: 20392: 16520: 15202: 13689:
Write one cache line back to memory without invalidating the cache line.
12274: 11200: 9551: 9441: 9373: 9227: 8359: 8304: 8271: 8213: 8159: 8087: 8035: 6875: 6002: 5549:
Second operand specifies which bit of the first operand to test and set.
4666:: AddressSize override. Will change AddressSize from 16-bit to 32-bit if 4652:: OperandSize override. Will change OperandSize from 16-bit to 32-bit if 4500: 3271: 3267: 173: 169: 26357: 26150:
Application Note AP-113: Getting Started With The Numeric Data Processor
25958:
Intel 64 and IA-32 Architectures Optimization Reference Manual: Volume 1
25546:
How prevalent are old x64 processors lacking the cmpxchg16b instruction?
25029:
Intel 64 and IA-32 Architectures Optimization Reference Manual: Volume 1
8824: 8792: 26590: 26533: 26523: 25700:, order no. 325426-077, Nov 2022, Volume 1, section 11.4.4.3, page 276. 23953:
has a completely different layout than the data structure of the older
23490: 22344:
If the instruction did complete the remainder calculation, it will set
17557:
Start monitoring a memory location for memory writes. Similar to older
16524: 16209: 16107: 15699: 15654: 15555: 15504: 15055:
instruction which can also be used to read the processor ID, user-mode
14899:
Any unsupported value in the register argument causes a #GP exception.
14331:
many times in a short time interval may cause a #VMEXIT. The number of
13866: 13815: 13705: 13624: 13257: 12734: 11606: 11381: 11082: 10679:
specify the same register, only the high half of the result is stored.
10238: 8369: 8276: 8146: 8100: 8047: 7972: 7904: 7824: 7658: 7639: 7271:. If accumulator (AL/AX/EAX/RAX) compares equal to first operand, then 5749:
arg1 := (arg1>>shamt) | (arg2<<(operand_size - shamt))
5705:
arg1 := (arg1<<shamt) | (arg2>>(operand_size - shamt))
5506: 1937: 559: 363: 116: 26367: 25868:
x86: DoS from attempting to use INVPCID with a non-canonical addresses
25804:
BIOS and Kernel Developer’s Guide (BKDG) For AMD Family 10h Processors
25396:, Nov 1996, order no. 18524C/0, section 3.3.7, page 90 – reserves the 25198:
Intel Pentium 4 and Intel Xeon Processor Optimization Reference Manual
24609: 24383: 23985:
are considered to be x87 instructions and will accordingly produce an
20615:
Base-2 exponential minus 1, with extra precision for st(0) close to 0:
18840:
Store top-of-stack value to memory, with conversion to signed integer
14603:
during wait, minus 1. (E.g. 0000b for C1, 0001b for C2, 1111b for C0)
12655:
Perform an SMX function. The leaf function to perform is given in EAX.
11658:) to indicate that the branch target is not required to start with an 10304:. Counts the number of bits that are set to 1 in its source argument. 9642:. Later Intel (but not AMD) documentation modified its description of 7006:
is architecturally listed as serializing, but has been reported to be
4736:
80386: new instruction mnemonics for 32-bit variants of older opcodes
326:
Only base 10 version (Operand is 0xA) is documented, see notes for AAD
26553: 26279:
and later, describes the exact argument reduction procedure used for
25356:, 1996, order no. 94175-01, table 6-20, page 209 – uses the mnemonic 23629: 20794: 16519:
SGX is deprecated on desktop/laptop processors from 11th generation (
15409: 15197: 14960: 14441:
instruction. As such, the instruction requires ECX=0 and ignores EDX.
13298: 12399: 9808: 9756: 8808: 8528:(non-serializing only if the FAST_IA32_­HWP_REQUEST bit it set) 5781:
Move from 8/16-bit source to 16/32-bit register with zero-extension.
4550: 4521: 4490: 3934: 3854: 1073: 25082:(order no 253669-076us, December 2021), section 22.15 "Reserved NOP" 22389:
instruction on 8087 and 80287, st(1) is required to be in the range
21302:{\displaystyle \left|st(1)\right|\leq \left|st(0)\right|<\infty } 18331:
Store top-of-stack floating-point value to memory or stack register
17033:
instruction performs serialization only, avoiding these added costs.
13393:
serving as carry input and output, with other flags left unchanged.
12330:
Prefetch data to all levels of the cache hierarchy except L1 cache.
4873:
temp1 := ES: CMP EAX, temp1 /* 32-bit compare and set EFLAGS */
26079:"20-Core Intel Xeon w7-2475X (SapphireRapids-64L) 806F8 CPUID dump" 24221: 22843: 22792: 21406:{\displaystyle st(1)\leftarrow st(1)*\log _{2}\left(st(0)+1\right)} 21316:
Base-2 Logarithm plus 1, with extra precision for st(0) close to 0:
20168: 16296: 15020: 14519: 14451: 14437:
As of April 2024, no extensions or hints have been defined for the
13529: 13448: 13244: 12950: 12795: 12779:
Count the number of bits that are set to 1 in its source argument.
12739: 12585: 12167: 12090: 12033: 11976: 11829: 10889: 10493:
Bitfield extract. Bitfield start position is specified in bits of
10271: 8812: 8059: 7818: 7744: 7058:
For AMD processors, the instruction has been documented since 2002.
5496: 3165: 3157: 26241: 26006:
11th Generation Intel® Core™ Processor Desktop Datasheet, Volume 1
25922:, order no. 245355-001, feb 2000, section 3.5.3, page 294 - lists 25867: 24961:
Can constant non-invariant tsc change frequency across cpu states?
15079:, the destination address given by ES:reg must be 64-byte aligned. 14591:
Sub-state within a C-state (see bits 7:4) (Intel processors only)
12821: 12056:
Processor Extended State save/restore, including supervisor state.
7509:
can be used to invalidate TLB entries for individual global pages.
7101:
will also check CPL against IOPL as an access-rights check, while
26093: 26063: 25614: 25599: 25447:
AP-485: Intel® Processor Identification and the CPUID Instruction
25031:, order no. 248966-050US, April 2024, section 3.5.1.9, page 119. 24108: 20881:{\displaystyle st(1)\leftarrow st(1)*\log _{2}\left(st(0)\right)} 16503:
Update SVN (Security Version Number) after live microcode update
16260:
prefixes are interpreted as branch hints only when used with the
15039: 13766: 13639: 13580: 13458: 13355: 13267: 13215: 13193: 13091: 12955: 12863: 12785: 12674: 12580: 11981: 11834: 11156:
to 0 if executed inside a transaction (RTM or HLE), 1 otherwise.
10633: 10439: 10322: 10307: 9898:
Most instructions with a 64 bit operand size encode this using a
9555: 8842: 8830: 8705:
with a register operand (which is an invalid encoding) can cause
8104: 8053: 7983: 7976: 7915: 7908: 7830: 7756: 7669: 7662: 6298: 4375:
On 80386 and later, the "Machine Status Word" is the same as the
4224: 305: 25479:, publication no. 22007, rev K, feb 2002, appendix F, page 284. 24705:
Frank van Gilluwe, "The Undocumented PC, second edition", 1997,
21752:
For each non-waiting x87 instruction whose mnemonic begins with
21692:
Floating-point store and pop, without stack underflow exception
11808:
Save state components specified by bitmap in EDX:EAX to memory.
10880:(The converse is not true – there exist processors that support 9234:
that will suppress memory exceptions if the condition is false.)
8766:
In order to impose ordering with respect to other instructions,
8412:
Fast Return from System Call. Designed to be used together with
8336:
Fast Return from System Call. Designed to be used together with
4583:
On some Intel CPU/microcode combinations from 2019 onwards, the
3665:
Signed and unsigned multiplication of immediate byte/word value
26565: 25989:
Runtime Microcode Updates with Intel® Software Guard Extensions
25960:, order no. 248966-050US, April 2024, chapter 2.1.1.1, page 46. 25619: 25274: 25245:, publication no. 24594, rev 3.17, dec 2011 – see page 416 for 24840:
Intel® Virtualization Technology FlexMigration Application Note
24098: 23494: 17505: 15403:
Read data from register or memory to encode into a PTW packet.
15301: 15104:
if run on a system that doesn't support the WBNOINVD extension.
14987: 14935: 14793:
is not ordered with respect to subsequent instructions, though.
14379: 13942: 12724: 12530: 12414: 12404: 12280: 11662:
instruction. Prefix only honored when NO_TRACK_EN flag is set.
10187: 9859: 9647: 9606: 9494: 8908:
instruction is not present in VIA processors prior to the Nano.
8375: 8319: 8314: 8281: 8177: 8170: 8166: 8093: 8041: 7965: 7897: 7848: 7651: 7279:
is set to 0, and first operand is copied into the accumulator.
7129:
The UMOV instruction is present on 386 and 486 processors only.
6929: 6915: 6842: 3952:
Load MSW (Machine Status Word) from 16-bit register or memory.
295: 197: 25045: 24144:"Re: Intel Processor Identification and the CPUID Instruction" 23730:
always computes an exact result with no roundoff errors. Like
21979:
Intel x87 alias opcode. Use of this opcode is not recommended.
21056:{\displaystyle 0\leq \left|st(0)\right|\leq {\frac {\pi }{4}}} 19647:
x87 Basic Arithmetic Instructions with Integer Source Argument
16805:
Program key and encryption mode to use with an TME-MK Key ID.
14140:, it can be made dispatch-serializing by setting bit 1 of MSR 12751: 9723:
prefix for variants that will return to 64-bit user-mode code.
8731:
On IDT WinChip, Transmeta Crusoe and Rise mP6 processors, the
7247:
with a 16-bit register argument produces an undefined result.
25881:
Intel® 64 and IA-32 Architectures Software Developer’s Manual
25838:
Architecture Instruction Set Extensions Programming Reference
25724:
Software techniques for managing speculation on AMD processor
24118: 23997:
ESC opcode space that exhibit this behavior. (All opcodes in
23266: 22769: 22707: 22678: 21129: 17769: 17728: 17682: 17042:
A bitmap of CPU history components that can be reset through
15124: 13915: 13876: 13825: 13756: 13700: 13634: 13198: 12909:
Read/write base address of FS and GS segments from user-mode.
12481: 12194: 11387: 9550:- will cause an #UD exception on all x86 processors from the 9377: 8622: 7776: 7430: 7201: 7149:
instructions were discontinued with the B1 stepping of 80386.
6922:
register and r/m part the general-register. Uniquely for the
4616: 3843: 212:
This is the original instruction set. In the 'Notes' column,
201: 25883:
volume 3, order no. 325384-078, december 2022, chapter 23.15
25743:, order no. 252490-003, june 2003, pages 3-26 and 3-38 list 20006:
The classification result is stored in the x87 CC register.
17938:
MPERF (MSR 0E7h: Maximum Performance Frequency Clock Count)
10909:
on systems that do not support the LZCNT or ABM extensions.
4976:
Sign-extend 32-bit value in EAX to 64-bit value in EDX:EAX.
4155:
Reads bytes 4-7 of segment descriptor, bitwise-ANDs it with
3923:
Load IDTR (Interrupt Descriptor Table Register) from memory.
26468: 26108:
Intel Data Streaming Accelerator Architecture Specification
24938:
instruction with respect to earlier and later instructions.
24724:
Revision Guide for AMD Athlon 64 and AMD Opteron Processors
24038: 23571: 23538:
Restore x87, MMX and SSE state from 512-byte data structure
22633:
If st(0) is negative (has sign bit set), then an addend of
21873:
64-bit variants of these instructions do not exist – using
17995: 17946:
APERF (MSR 0E8h: Actual Performance Frequency Clock Count)
17437: 17120:
instruction always sets UIF (User Interrupt Flag) to 1. On
16528: 12718:
The TSC value is placed in EDX:EAX and the core ID in ECX.
12372: 12242: 12205: 12122:
Restore state components specified by EDX:EAX from memory.
11861:
Restore state components specified by EDX:EAX from memory.
11086: 10663:, then stores the low half of the multiplication result in 7434: 5916:
Segment-override prefixes for FS and GS segment registers.
4607:
with a different opcode and memory layout exists on 80386.)
4239:, including "hidden" part of segment descriptor registers. 189: 181: 177: 149: 145: 25930:
mnemonics for the branch hint prefixes. Archived from the
25449:, order no. 241618-039, may 2012, section 5.1.2.5, page 32 24859:
order no. 337018-002, Feb 2018, pages 133, 3808 and 3814.
24842:
order no. 323850-004, oct 2012, section 2.3.2 on page 12.
22791:, except will not produce an exception in response to any 22787:
Similar to the regular floating-point compare instruction
14423:, the DS: segment can be overridden with a segment prefix. 14101:
instruction provides a stronger ordering guarantee: it is
13949:. These extensions (without full SSE) are also present on 10511:
mask = (1 << rb) - 1 ra = (r/m >> rb) AND mask
10421:
will return operand size in bits (16/32/64) and set CF=1.
10366:
will return operand size in bits (16/32/64) and set CF=1.
9408:, Intel does not guarantee that these opcodes will remain 8598:
will set the top 32 bits of RAX, RBX, RCX and RDX to zero.
7372:
entries that would be used for the 1-byte memory operand.
26342: 25415:, order no. 20695H/0, March 1998, section 24.2, page 283. 25171:, 23 nov 2017 – Binutils patch that added ModR/M byte to 24696:, order no. 329298-002, oct 2014, sections 3.5 and 3.6.5. 23744: 23742: 23740: 23215:{\displaystyle st(0)\leftarrow \cos \left(k*st(0)\right)} 23129:{\displaystyle st(0)\leftarrow \sin \left(k*st(0)\right)} 22828:
Floating-point unordered compare to st(1), then pop twice
22486:
or later, or up to ±1.5 ulps on earlier x87 coprocessors.
22169: 18741:
Exchange top-of-stack register with other stack register
17986: 16743:
is only available if Intel VMX operation is enabled with
16490:
Load EPC page as unblocked with enhanced error reporting
11077:(Deprecated on desktop/laptop CPUs from 10th generation ( 10196:
has its own CPUID flag, separate from the rest of x86-64.
9887:
existing instructions extended to a 64 bit address size (
7995: 7927: 7842: 7768: 6874:
prefix with these instructions will cause them to load a
4163:.ZF=1 if the descriptor could be loaded, ZF=0 otherwise. 3799:
Rotate/shift bits with an immediate value greater than 1
193: 108: 101: 25123:
Intel Architecture Software Developer’s Manual, Volume 2
24978:
CPUID for Zhaoxin KaiXian KX-5000 KX-5650 (by timw4mail)
24680:"Intel 486 & 486 POD CPUID, S-spec, & Steppings" 23580:
Floating-point store integer and pop, with round-to-zero
21833: 21831: 21829: 21827: 17866:
prefix is not permitted and will cause an #UD exception.
17407:) prefix - attempting to use this prefix results in #UD. 16836:
Any unsupported value in EAX causes a #GP(0) exception.
11895:
Write the value in EDX:EAX to the XCR specified by ECX.
11198:(Discontinued – the last processors to support HLE were 5811:
Move from 8/16-bit source to 16/32/64-bit register with
5678:
reverse. Returns bit index of highest set bit in input.
4678:
The 80386 also introduced the two new segment registers
4003:
Load TR (Task Register) from 16-bit register or memory.
3925:
The IDTR controls not just the address/size of the IDT (
3853:. Some but not all of the instructions are available in 3849:
The new instructions added in 80286 add support for x86
24743:, order no. 253668-078, Dec 2022, section 9.3, page 299 23636:
because the floating-point environment accessed by the
18498: 16482:
Load EPC page as blocked with enhanced error reporting
14390: 14388: 13552:
Cache-line prefetch into L2 cache with intent to write.
11431:
Read shadow stack pointer into register (full 64 bits)
9243:
On pre-Nehemiah VIA C3 variants ("Samuel"/"Ezra"), the
8743: 8741: 5655:
forward. Returns bit index of lowest set bit in input.
5406:
instructions will cause a #GP exception if executed in
5117:
32-bit interrupt return. Differs from the older 16-bit
509:; eip points to the instruction directly after the call 26228:"GCC Bugzilla – 37179 – GCC emits bad opcode 'ffreep'" 26008:, may 2022, order no. 634648-004, section 3.5, page 65 25095:, publication no. 24594, rev 3.02, aug 2002, page 379. 24301:
Pentium® Processor Family Developer’s Manual, Volume 3
23737: 23514:
Save x87, MMX and SSE state to 512-byte data structure
20968:{\displaystyle \tan \left(st(0)\right)={\frac {Y}{X}}} 20906:
Partial Tangent: Computes from st(0) a pair of values
17848: 17846: 16908:
MSR to limit the maximum amount of time that a single
14967:
gaining prefetch functionality from Broadwell onwards.
14959:) execute as NOPs on Intel CPUs from Cedar Mill (65nm 14730:
Any unsupported value in EAX causes an #UD exception.
13990: 13988: 13986: 13181:
Instruction is serializing on AMD but not Intel CPUs.
11999:
Processor Extended State save/restore with compaction.
11416:
Read shadow stack pointer into register (low 32 bits)
11115:
Abort transaction with 8-bit immediate as error code.
9852: 9719:
instructions under x86-64, it is necessary to add the
5844:
Set byte to 1 if condition is satisfied, 0 otherwise.
4503:
and later processors, undefined on earlier processors.
25215:
Pentium® Processor Family Developer's Manual Volume 3
23770: 23661:
executes as a NOP that does not modify any FPU state.
23628:
The x87 FPU needs to know whether it is operating in
23156: 23070: 23011: 22929: 22869: 22639: 22613: 22583: 22525: 22395: 22313: 22102:
processors, floating-point divide was subject to the
21824: 21672:
Check and handle pending unmasked x87 FPU exceptions
21509: 21433: 21322: 21239: 21138: 21070: 21008: 20920: 20803: 20748: 20696: 20621: 20442: 20303: 20177: 20102: 20096:
is a number whose absolute value is within the range
20043: 18698: 18642: 18586: 18530: 16972:
instructions, the following flag bits are supported:
16509:
Any unsupported value in EAX causes a #GP exception.
15174:
instructions to provide branch taken/not-taken hints.
14893:
Invalidate all TLB entries, excluding global entries
14885:
Invalidate all TLB entries, including global entries
14019:
instruction ensures that all memory stores after the
11939:
Save state components specified by EDX:EAX to memory.
10942:
for all input operand values except zero – for which
8845:
WuDaoKou and later. Indicated with a CPUID bit (leaf
6878:
with a 64-bit offset on Intel but not AMD processors.
6479:
on systems that support the ABM or LZCNT extensions.
26266:
Intel Underestimates Error Bounds by 1.3 quintillion
26242:
FFREEP – the assembly instruction that never existed
25741:
Prescott New Instructions Software Developer’s Guide
24930:, order no. 325426-077, Nov 2022 – the entry on the 24876:
pub.no. 24594, rev 3.34, oct 2022, p. 165 (entry on
23841:
This argument reduction inaccuracy also affects the
22376:
instruction is always exact with no roundoff errors.
21992: 21990: 16724:
Any unsupported value in EAX causes a #GP exception.
16653:
Any unsupported value in EAX causes a #GP exception.
16140:
Prefetch code to all levels of the cache hierarchy.
14724:
Wake up sleeping processors in measured environment
14514:
Treat interrupts as break events, even when masked (
14385: 14087:
instruction ensures that all memory loads after the
13126:
Store to memory from register with byte-order swap.
12315:
Prefetch data to all levels of the cache hierarchy.
12144:
instructions cannot be encoded with the REX2 prefix.
10698:
Parallel Bit Deposit. Scatters contiguous bits from
9739: 9737: 9735: 8738: 7035:
instructions were discontinued from Pentium onwards.
4716:
New opcodes that introduced new functionality (e.g.
4281: 4279: 4277: 4275: 1710:
Move word from string to string. May be used with a
1563:
Move byte from string to string. May be used with a
26337:
AMD64 Architecture Programmer's Manual, Volumes 1-5
26165:, oct 1989, order no. 285385-007, page 3-100, fig 9 26110:, order no. 341204-004, Sep 2022, pages 13 and 23. 22656:
with the same sign as st(1) is added to the result.
22494: 22492: 17843: 13983: 13065:Load from memory to register with byte-order swap. 10934:on systems that do not support the BMI1 extension. 10767:Rotate right by immediate without affecting flags. 8727: 8725: 8723: 8633: 8631: 7698:Instruction is, with some exceptions, serializing. 4532:opcode has been reassigned to the 64-bit-mode-only 4320:instructions with a 16-bit operand size is – as of 25855:VIA Zhaoxin x86 4 and 8-core SoC processors launch 24922: 24920: 24659:(November 1989, order no. 240440-002) p.135 lists 24519:"Intel 80386 CPU Information | PCjs Machines" 24489:AP-526: Optimization For Intel's 32-bit Processors 24303:, 1995, order no. 241430-004, section 12.7, p. 323 23833: 23259:Floating-point conditional move to st(0) based on 23214: 23128: 23052: 22975: 22915: 22648: 22622: 22596: 22566: 22442: 22326: 21893: 21891: 21584: 21492: 21405: 21301: 21211: 21118:{\displaystyle 0\leq \left|st(0)\right|<2^{63}} 21117: 21055: 20967: 20880: 20781: 20733: 20670: 20571: 20363: 20290: 20128: 20080: 18718: 18669: 18613: 18557: 17980: 17840:– this provides access to CR8 outside 64-bit mode. 17542:Monitor a memory location for writes in user mode. 17415: 17413: 15191:Instruction prefix: branch hint weakly not taken. 15034: 15032: 15030: 12616:hints are commonly used for CPU power management. 8458:Writes to the following MSRs are not serializing: 7572: 6134:Move from general register to x86 debug register. 5313:), the choice of whether the instruction will use 5050:Pop all 32-bit general-purpose registers off stack 4603:Undocumented, 80286 only. (A different variant of 207: 26303: 25672:Extensions to the 3DNow! and MMX Instruction Sets 25635:Control-flow Enforcement Technology Specification 25261: 25259: 24445: 24443: 24331:Microarchitectural Data Sampling (MDS) mitigation 21987: 19893:Floating-point compare to integer, and stack pop 17051:As of July 2023, the following bits are defined: 13971: 13969: 13967: 13965: 13963: 13961: 13959: 9732: 8611:, there exists MSRs that can be used to restrict 7471:encodings are used on 80486 stepping B and later. 6224:if executed when not doing in-circuit emulation. 6171:Move from general register to x86 test register. 4978:Mainly used to prepare a dividend for the 32-bit 4272: 3621:Push an immediate byte/word value onto the stack 115:support. The instructions are usually part of an 26603: 25840:, order no. 319433-052, March 2024, chapter 17. 25125:, 1997, order no. 243191-001, pages 3-9 and A-7. 24601: 24506:AMD 64-bit Technology, vol 2: System Programming 24199: 24197: 24009:, even for undefined opcodes that would produce 23969: 23967: 22489: 21930: 21928: 21926: 20979:value replaces the top-of-stack value, and then 20035:representing the exponent and mantissa of st(0). 19626:Floating-point compare to st(1), then pop twice 19422:x87 Basic Arithmetic Instructions with Stack Pop 16668:can only be executed in ring 3, not rings 0/1/2. 16634:Verify a cryptographic report of a trust domain 15221:Instruction prefix: branch hint strongly taken. 15117:will invalidate all cache lines after writeback. 14752: 14750: 14308:The actual length of the pause performed by the 9707: 9705: 9452: 9450: 8720: 8628: 6332: 6330: 6328: 6326: 6085:Move from general register to control register. 4462: 4460: 4458: 4338: 4336: 4334: 4332: 4330: 4125:) field of selector. The operation performed is: 25970: 25968: 25966: 25920:Willamette Processor Software Developer’s Guide 25293:"Fingerprinting x86 CPUs using Illegal Opcodes" 25243:AMD64 Architecture Programmer’s Manual Volume 3 25237: 25235: 25108:, see messages 148 and 158 for NOPL on VIA C7. 24917: 24874:AMD64 Architecture Programmer’s Manual Volume 3 24694:Software Guard Extensions Programming Reference 24636:(April 1989, order no. 240440-001) p.142 lists 24508:, order no. 24593, rev 3.06, aug 2002, page 248 23945:The x87 section of the state saved/restored by 23886:register. On Intel but not AMD processors, the 21888: 20985:On 80387 and later x87, but not original 8087, 19983:Floating-point compare top-of-stack value to 0 18259:x87 Floating-point Load/Store/Move Instructions 17410: 16935: 16904:instructions, the operating system can use the 16892: 16890: 15358:Instruction returns status information in EAX. 15170:Instruction prefixes that can be used with the 15027: 13335:instruction in that it leaves flags other than 12178:with ECX=1 is permitted – this will not return 11914:Processor Extended State Save/Restore Optimized 10856:On AMD CPUs, the "ABM" extension provides both 7445: 7443: 6443: 6441: 5249:instructions, the memory access rights for the 3260: 2553:Shift Arithmetically right (signed shift right) 25685:The Significance of the x86 SFENCE instruction 25256: 24908:CMPXCHG8B Support in the 32-Bit Windows Kernel 24440: 24260:Virtual Machine Detection (non permanent link) 24062: 23973:When floating-point emulation is enabled with 23931: 23929: 23681: 23679: 22706:x87 Non-Waiting Control Instructions added in 22022: 22020: 22018: 22016: 22014: 22012: 22010: 22008: 22006: 20734:{\displaystyle 0\leq st(0)\leq {\frac {1}{2}}} 16248: 16246: 14444: 14327:Under VT-x or AMD-V virtualization, executing 13956: 12716:Read Time Stamp Counter and processor core ID. 10786:Arithmetic shift right without updating flags. 10237:Bit manipulation instructions. For all of the 10226: 9589: 9587: 7137: 7135: 6948: 6946: 6944: 6942: 6894: 6892: 6890: 6888: 6886: 6884: 6524: 6522: 6087:On Pentium and later processors, moves to the 5445:indicated by SS is a 16-bit segment, then the 2600: 1537:copies data from one location to another, (1) 26383: 26176:80287 80-bit HMOS Numeric Processor Extension 25886: 25348: 25346: 24857:Atom Processor C3000 Product Family Datasheet 24726:pub.no. 25759, rev 3.79, July 2009, page 34. 24579: 24491:, order no. 242816-001, october 1995 – lists 24194: 24051: 23989:(device-not-available) exception. Other than 23964: 22452:These restrictions were removed in the 80387. 22092: 21975: 21973: 21971: 21969: 21967: 21965: 21963: 21961: 21959: 21923: 20364:{\displaystyle st(0)\leftarrow st(0)-st(1)*Q} 17993: 17675:The value of the MSR is returned in EDX:EAX. 16958: 15004:are all documented to be performing prefetch. 14747: 14676:Enter execution of authenticated code module 13937: 13935: 13933: 12182:(no such register exists) but instead return 11695: 11693: 11675: 11673: 9702: 9447: 8783:Fixed-rate TSC was introduced in two stages: 7561:opcode, then the instruction will execute as 7517: 7515: 7027: 7025: 6495: 6493: 6475:opcode, then the instruction will execute as 6415:opcode, then the instruction will execute as 6323: 5271:bits for the port to access are all set to 0. 4599: 4597: 4455: 4327: 3546:Push all general purpose registers onto stack 3108:Waits until BUSY# pin is inactive (used with 81: 26202:80286 and 80287 Programmers Reference Manual 25963: 25522:– Nocona stepping D CPUID without CMPXCHG16B 25477:Athlon Processor x86 Code Optimization Guide 25232: 25055: 24270:Andrew Schulman, "Unauthorized Windows 95" ( 23819: 23800: 23053:{\displaystyle \left|st(0)\right|<2^{63}} 19908: 19875: 19578: 19383: 18810: 18756: 18476: 18427: 18289: 18173:Save x87 FPU State, then initialize x87 FPU 17135: 16887: 16527:) onwards, but continues to be available on 16352:Remove a page from EPC (Enclave Page Cache) 16224: 16222: 14684:Exit execution of authenticated code module 12536:Monitor a memory location for memory writes. 11878:Reads an XCR specified by ECX into EDX:EAX. 11085:) onwards, but continues to be available on 10868:instruction and is listed as "LZCNT", while 10823:Logical shift right without updating flags. 10606:starting from the bit position specified in 9725:Encodings of these instructions without the 9628:mnemonic was introduced by Cyrix, while the 7440: 7186: 7155:instruction as part of its CPU detection if 7019:(introduced with x86-64) is not serializing. 6438: 6419:on systems that support the BMI1 extension. 6372: 6370: 6368: 3475:Pop all general purpose registers from stack 3454:; adjust SI according to operand size and DF 3377:; adjust DI according to operand size and DF 687:Compare bytes in memory. May be used with a 160:, etc.) and values instead of their 16-bit ( 130:and datatypes as well as new functionality. 25394:AMD-K5 Processor Technical Reference Manual 23926: 23676: 22976:{\displaystyle C=\cos \left(k*st(0)\right)} 22916:{\displaystyle S=\sin \left(k*st(0)\right)} 22846:compliant floating-point partial remainder. 22443:{\displaystyle -2^{15}\leq st(1)<2^{15}} 22003: 20671:{\displaystyle st(0)\leftarrow 2^{st(0)}-1} 20004:Classify top-of-stack st(0) register value. 19761:Floating-point reverse-subtract by integer 16243: 15937:instruction in that it is not serializing. 15648:Serialize instruction fetch and execution. 9845:are available only on stepping 8 and later. 9584: 8581:On some older 32-bit processors, executing 7159:is not present, and will refuse to boot if 7132: 6939: 6881: 6519: 5897:Two-operand non-widening integer multiply. 5323:This also applies to the loop instructions 4149:Load access rights byte from the specified 133: 26390: 26376: 26076: 26046: 26027: 25711:The Significance of the LFENCE instruction 25582: 25343: 24549:Obsolete 80386 Instructions: IBTS and XBTS 24314:How Microarchitectural Data Sampling works 24256:Virtual Machine Detection (permanent link) 23902:are also zeroed out by these instructions. 23764:is not precisely 1.0, but instead given by 22679:x87 instructions added in later processors 21956: 17722:to 0 if any errors occurred, 1 otherwise. 15125:Added with other Intel-specific extensions 13930: 13238:Prefetch cache line with intent to write. 12469:Pauses CPU thread for a short time period. 11690: 11670: 10505:value with zero-extension, then stored in 10501:. The bitfield is then extracted from the 9528: 9526: 8199:Undefined Instructions – will generate an 7800:(EFLAGS.ID) – if this bit can be toggled, 7512: 7171: 7169: 7022: 7010:on at least some Intel Core-i7 processors. 6490: 4594: 3933:, but the IVT (Interrupt Vector Table) in 3583:; The value stored is the initial SP value 3308:raises software interrupt 5 if test fails 2676:prefix to test and repeat the instruction 2647:prefix to test and repeat the instruction 2124:) works only on 8086/8088. Later CPUs use 724:prefix to test and repeat the instruction 695:prefix to test and repeat the instruction 88: 74: 26178:, feb 1983, order no. 201920-001, page 14 26035:Trust Domain CPU Architectural Extensions 25535:– Nocona stepping E CPUID with CMPXCHG16B 25379:, order no. 253667-064, oct 2017 – lists 25290: 25269:, order no. 253667-061, dec 2016 – lists 24790: 23993:, these are the only opcodes outside the 23462:Floating-point unordered compare and set 23444:Floating-point unordered compare and set 23410:register rather than the x87 CC register. 22352:to the bottom three bits of the quotient 22282:is set equal to st(0). If st(0) is zero, 22089:instruction on non-BCD data is undefined. 21640:Increment x87 FPU Register Stack Pointer 21625:Decrement x87 FPU Register Stack Pointer 20129:{\displaystyle 1\leq \left|M\right|<2} 19827:Floating-point reverse-divide by integer 16264:conditional branch instructions (opcodes 16219: 16181:Platform Bind Key to Binary Large Object. 15889:Enqueue Command Supervisor. Differs from 14234:with various prefixes in 64-bit mode are: 14097:On all Intel CPUs that support SSE2, the 13894:Whole Cache Writeback without invalidate. 13221:Cache-line prefetch with intent to write. 11623:Terminate indirect branch in 64-bit mode 11600:Terminate indirect branch in 32-bit mode 11149:Test if in transactional execution. Sets 10736:argument as a bit mask to select bits in 9807:instructions are not available in x86-64 6849:regardless of the contents of these bits. 6365: 4953:16-bit value in AX to 32-bit value in EAX 4082:Store LDTR to register or 16-bit memory. 3265: 2916:Store word in string. May be used with a 2820:Store byte in string. May be used with a 26217:volume 3B, revision 064, section 22.18.9 25637:(v3.0, order no. 334525-003, March 2019) 24754:"RSM—Resume from System Management Mode" 24367:Intel 286 secrets: ICE mode and F1 0F 04 23870:instructions write their results to the 22813:Floating-point unordered compare and pop 19500:Floating-point reverse-subtract and pop 18670:{\displaystyle \log _{10}\left(2\right)} 18558:{\displaystyle \log _{2}\left(10\right)} 18025:x87 Non-Waiting FPU Control Instructions 17826:prefix is only available in 64-bit mode. 17480:Alternative mechanism to access the CR8 17438:Added with other AMD-specific extensions 15606:reaches the value specified in EDX:EAX. 15529:User-mode memory monitoring and waiting. 14934:instructions are mandatory parts of the 14312:instruction is implementation-dependent. 12206:Added with other cross-vendor extensions 10999:Transactional Synchronization Extensions 10186:stepping D, but added in stepping E. On 9880:original instructions with new opcodes ( 8203:(#UD) exception in all operating modes. 7453:instruction uses a different encoding - 4067:Store MSW to register or 16-bit memory. 2668:Compare word string. May be used with a 2639:Compare byte string. May be used with a 26397: 26194: 25806:, order no. 31116, rev 3.62, page 419. 25402:opcode without assigning it a mnemonic. 25322:"ud0 length fix · intelxed/xed@7561f54" 25150:instruction mnemomics to GNU Binutils. 24607: 24069:List of x86 virtualization instructions 22478:) – they may have an error of up to ±1 22071:On Intel Pentium and later processors, 21885:instead if 64-bit operation is desired. 21803:. The corresponding pseudo-instruction 21776:. The corresponding pseudo-instruction 18614:{\displaystyle \log _{2}\left(e\right)} 15933:The instruction differs from the older 15378:Write data to a Processor Trace Packet. 15042:LuJiaZui, but not on earlier steppings. 13389:Add-with-carry, with the overflow-flag 13331:Add-with-carry. Differs from the older 12393:Load Fence and Dispatch Serialization. 11876:Get value of Extended Control Register. 11585:instruction will cause a #CP exception. 11292: 10992: 10872:has its own separate CPUID feature bit. 10148:Exchange GS base with KernelGSBase MSR 9523: 8607:On some Intel processors starting from 8437:instruction is also used to update the 7166: 4387:can be used to enter but not leave x86 4100:Store TR to register or 16-bit memory. 107:refers to the set of instructions that 16:List of x86 microprocessor instructions 26604: 25991:, sep 2021, order no. 648682 rev 1.0. 25612: 24205:Undocumented iAPX 286 Test Instruction 24058:List of x86 cryptographic instructions 23489:x87 Non-Waiting Instructions added in 22567:{\displaystyle {\frac {st(1)}{st(0)}}} 22372:The remainder computation done by the 20167:Floating-point partial remainder (not 20027:Split the st(0) value into two values 19926:x87 Additional Arithmetic Instructions 19542:Floating-point reverse-divide and pop 17746:Invalidate TLB Entries with broadcast. 17161:nibble specifying the condition) are: 17141:The condition codes supported for the 14226:are affected by the other bits of the 14210:instruction in 64-bit mode is, unlike 14105:, meaning that instructions after the 14045:instructions. (Older AMD CPUs require 13743:Read processor core ID into register. 13613:Read User Page Key register into EAX. 12188:The presence of this functionality of 11785:Processor Extended State Save/Restore. 10058:MOV with Sign Extend 32-bit to 64-bit 9993:Atomic only if used with LOCK prefix. 9520:instruction after the indirect branch. 8936:nibble specifying the condition) are: 6562:nibble specifying the condition) are: 6528:The condition codes supported for the 5946:Push/pop FS and GS segment registers. 4894:Input string from doubleword I/O port: 26371: 26204:, 1987 (order no. 210498-005), p. 485 26191:, 1981 (order no. 210201-001), p. 797 26139:, order no. 243291-002, February 1997 25426:The Intel SYSRET Privilege Escalation 25142:, 28 dec 1995 – patch that added the 24164:"Intel 80x86 Instruction Set Summary" 24124:List of discontinued x86 instructions 24080:List of discontinued x86 instructions 24073: 22258:Empty (may occur on 8087/80287 only) 22155:Unsupported (unnormal or pseudo-NaN) 20537: 20534: 20531: 20528: 20525: 20522: 20519: 20516: 20513: 20510: 20507: 20504: 20501: 20498: 20495: 20492: 20489: 20486: 20237: 20234: 20231: 20228: 20225: 20222: 20219: 20216: 20213: 20210: 20207: 20204: 20201: 20198: 20195: 20192: 20189: 20186: 18274:Load floating-point value onto stack 17654:Read processor register in user mode. 16916:invocation is permitted to wait. The 16031:Atomically perform a compare - and a 14853:(selected by register argument) are: 9577:much later – AMD APM started listing 9421:Documented for AMD x86-64 since 2002. 7880:Instruction atomic only if used with 7796:can be checked by toggling bit 21 of 7330:Instruction atomic only if used with 7281:Instruction atomic only if used with 5263:I/O port access is only allowed when 4920:Output string to doubleword I/O port: 3967:Clear task-switched flag in the MSW. 1387:Load string word. May be used with a 1303:Load string byte. May be used with a 362:destination = destination + source + 26343:x86 Opcode and Instruction Reference 25726:, rev 3.8.22, 8 March 2022, page 4. 25674:, ref no. 22466D/0, March 2000, p.11 25660:x86: CET v2.0: Update NOTRACK prefix 25360:("Official invalid opcode") for the 25281:(without ModR/M byte) on page 4-687. 24585: 24114:x86 Bit manipulation instruction set 24037: 22985:Top-of-stack st(0) is replaced with 17952:Unsupported values in ECX return 0. 16932:-defined time limit and 0 otherwise. 15734:Send Interprocessor User Interrupt. 15633:Instruction Execution Serialization. 15161: 14214:, unaffected by the presence of the 13304:Enhanced variants of add-with-carry. 11245:Load Address Tracking suspend/resume 10976:On AMD processors before Zen 3, the 10233:X86 Bit manipulation instruction set 9857: 9402:in Pentium Pro. However, except for 5155:and post-incremented by 4 otherwise. 5097:Pop 32-bit EFLAGS register off stack 5030:Push all 32-bit registers onto stack 4449:instructions can only run in Ring 0. 323:ASCII adjust AX after multiplication 26348:x86 and amd64 instruction reference 26331:Free IA-32 and x86-64 documentation 25907:Zhaoxin Kaixian KX-6000G CPUID dump 25766:"BLENDVPS/BLENDVPD/PBLENDVB syntax" 25507:VIA C3 Nehemiah Processor Datasheet 25377:Software Developer's Manual, vol 2B 25267:Software Developer's Manual, vol 2B 24741:Software Developer’s Manual, vol 3A 23714:) instruction in that the quotient 23706:instruction differs from the older 19728:Floating-point subtract by integer 19695:Floating-point multiply by integer 18780:x87 Integer Load/Store Instructions 18726:(approximately 0.69315) onto stack 18677:(approximately 0.30103) onto stack 18621:(approximately 1.44269) onto stack 18565:(approximately 3.32193) onto stack 18503:(approximately 3.14159) onto stack 17973:instruction can only run in ring 0. 17908:does not necessarily match that of 16014:The instruction is not serializing. 14992:On AMD CPUs with PREFETCHW, opcode 14849:The invalidation types defined for 14534:Timed MWAIT: end the wait when the 13026:Write base address of GS: segment. 13003:Write base address of FS: segment. 11723: 11530:Write 8 bytes to user shadow stack 11508:Write 4 bytes to user shadow stack 11461:Restore saved shadow stack pointer 11446:Save previous shadow stack pointer 10842:Shift left without updating flags. 9853:Added as instruction set extensions 9372:Unlike other instructions added in 7199: 6099:control registers are serializing. 5284:instruction differs from the older 4614: 4528:instruction is not available – the 3841: 2128:as a prefix for newer instructions. 954:Signed multiply in One-operand form 788:Decimal adjust AL after subtraction 240:Original 8086/8088 instruction set 13: 26358:Netwide Assembler Instruction List 25080:Software Developers Manual, vol 3B 23570:x87 Instructions added as part of 21797:is an instruction with the opcode 21770:is an instruction with the opcode 21709:Free x87 register, then stack pop 21296: 20782:{\displaystyle -1\leq st(0)\leq 1} 19860:Floating-point compare to integer 18719:{\displaystyle \ln \left(2\right)} 16948:can be run outside Ring 0 only if 16295:Branch hints are supported on all 14805:can be run outside Ring 0 only if 14494:The extension flags available for 14450:On some processors, such as Intel 12980:Read base address of GS: segment. 12934:Read base address of FS: segment. 12265:Prefetch with Non-Temporal Access. 12162:On some processors (starting with 10585:Bit Manipulation Instruction Set 2 10417:If source operand is all-0s, then 10396:Bit Manipulation Instruction Set 1 10362:If source operand is all-0s, then 8917:The condition codes supported for 8888:can be run outside Ring 0 only if 8863:can be run outside Ring 0 only if 8770:or serializing instructions (e.g. 4499:: Zero-extends 16-bit argument on 4322:Intel SDM revision 079, March 2023 2729:Shift right (unsigned shift right) 716:Compare words. May be used with a 14: 26628: 26324: 26037:, order no. 343754-002, may 2021. 25995:from the original on 31 mar 2023. 25647:Intel SDM, rev 076, December 2021 25509:, rev 1.13, sep 29, 2004, page 17 25383:(with ModR/M byte) on page 4-683. 24136: 22785:Floating-point unordered compare. 22597:{\displaystyle {\frac {\pi }{4}}} 19794:Floating-point divide by integer 19363:CC <- result_of( st(0) – src ) 18960:x87 Basic Arithmetic Instructions 17561:, except available in user mode. 16964:For the register argument to the 16830:Wrapped key programming for TSE. 16747:, and will produce #UD otherwise. 16718:Set ENCLAVECONTEXT field in SECS 16445:Restrict permissions of EPC page 14230:prefix. A few examples of opcode 14179:is still ordered with respect to 13410:Supervisor Mode Access Prevention 8649:On the Cyrix 5x86 and 6x86 CPUs, 6928:opcodes, the top two bits of the 6483:produces a different result from 4753:Mnemonic for older 16-bit variant 2920:prefix to repeat the instruction 2824:prefix to repeat the instruction 1714:prefix to repeat the instruction 1567:prefix to repeat the instruction 1391:prefix to repeat the instruction 1307:prefix to repeat the instruction 341:ASCII adjust AL after subtraction 192:) and is referred to as (32-bit) 26304:Intel Corporation (April 2022). 26270: 26258: 26246: 26234: 26220: 26207: 26181: 26168: 26155: 26142: 26129: 26117: 26100: 26070: 26040: 26011: 25998: 25981: 25950: 25937: 25912: 25899: 25873: 25860: 25847: 25830: 25827:from the original on 5 Jan 2023. 25813: 25796: 25783: 25758: 25733: 25716: 25703: 25690: 25677: 25664: 25652: 25640: 25627: 25613:Wegner, Zach (4 November 2020). 25606: 25583:@instlatx64 (October 31, 2020). 25576: 25571:AMD Zen 3 Ryzen Deep Dive Review 25563: 25550: 25538: 25525: 25512: 25499: 25486: 25469: 25452: 25439: 25418: 25405: 25386: 25369: 25314: 25303:from the original on 15 Dec 2023 25291:Stecklina, Julian (2019-02-08). 25284: 25207: 25190: 25157: 25128: 25115: 25098: 25085: 25072: 25038: 25021: 25004: 24987: 24970: 24953: 24941: 24900: 24797:Cyrix 486SLC/e Data Sheet (1992) 24772:System Management Mode Explained 24418:x86 architecture rFLAGS register 24016: 23921:They are also present in AMD K7. 23905: 23848: 23696: 23664: 23622: 22661: 22509: 22468: 22455: 22379: 22366: 22293: 22268: 22117: 22079: 22065: 21944: 21746: 21729: 20415:Floating-point round to integer 20385: 20161: 20021: 19998: 19977: 19956: 19641: 19479:Floating-point subtract and pop 19458:Floating-point multiply and pop 19167:Floating-point reverse subtract 18933: 18376: 17956: 17898: 17878: 17869: 17800: 17419:In initial implementations, the 17389: 17106: 17082: 17074: 17036: 17011: 17003: 16870: 16858: 16840: 16820:Direct key programming for TSE. 16777: 16750: 16734: 16671: 16659: 16534: 16513: 16437:Add page to initialized enclave 16302: 16289: 15090: 15069: 15045: 14970: 14941: 14920: 14903: 14843: 14828: 14815: 14796: 14775: 14734: 14642: 14625: 14610: 14565: 14557: 14488: 14485:to wait for memory writes again. 14465: 14431: 14413: 14382:supported SSE3 but not MONITOR.) 14360: 14338: 14321: 14302: 14200: 14147: 14077: 14009: 12156: 12147: 12130: 11709: 11262:Suspend Tracking Load Addresses 10970: 10953: 10946:returns input operand size, but 10920: 10895: 10850: 10800:, the shift-amount specified in 10617:ra = r/m AND NOT(-1 << rb) 10199: 10172: 10159: 9831: 9814: 9793: 9780:flags that indicate support for 9770: 9755:instructions are unavailable in 9688: 9670: 9653: 9612: 9561: 9500: 9489:originally took any arguments - 9424: 9415: 9383: 9366: 9262: 9237: 9205: 8911: 8898: 8879: 8854: 8817: 8815:CPUs. Does not have a CPUID bit. 8777: 8694: 8687:instruction does not modify any 8673: 7723: 4589:Microarchitectural Data Sampling 4362:instructions are serializing on 3305:Check array index against bounds 764:Decimal adjust AL after addition 25332:from the original on 1 Jun 2023 24883: 24866: 24849: 24832: 24815: 24802: 24781: 24774:(vol 6, no. 8, june 17, 1992). 24764: 24746: 24733: 24716: 24699: 24686: 24672: 24649: 24626: 24608:Coldwin, Gynvael (2009-12-29). 24562: 24541: 24537:CPU Identification before CPUID 24529: 24511: 24498: 24481: 24460: 24423: 24410: 24393: 24376: 24359: 24342: 24323: 24306: 24293: 24281: 24264: 24248: 23425:Floating-point compare and set 23394:Floating-point compare and set 22861:Floating-point sine and cosine. 22278:, if st(0) is zero or ±∞, then 20605:x87 Transcendental Instructions 19563:Floating-point compare and pop 18233:Disable Interrupts (8087 only) 17981:x87 floating-point instructions 17904:The register numbering used by 16783:The leaf functions defined for 16764:MSR and the "PTWEn" bit of the 16710:Increment VIRTCHILDCNT in SECS 16702:Decrement VIRTCHILDCNT in SECS 16677:The leaf functions defined for 16540:The leaf functions defined for 16466:Read EPC page type/status info 16308:The leaf functions defined for 14648:The leaf functions defined for 14558:Not used, must be set to zero. 14058:is not ordered with respect to 13784:Move to memory as Direct Store. 13672:Cache Line Writeback to memory. 13598:Protection Keys for user pages. 12504:Flush one cache line to memory. 12471:Intended for use in spinlocks. 11374:Increment shadow stack pointer 11286:Resume Tracking Load Addresses 9497:byte, in Binutils version 2.30. 9493:was later modified to accept a 9226:extension defines a set of new 8827:(but not necessarily S-states). 8785: 8656: 8643: 8601: 8575: 8559: 8452: 8427: 7547: 7534: 7495: 7474: 7449:On Intel 80486 stepping A, the 7418: 7123: 7061: 7038: 6963: 6914:registers, the reg part of the 6852: 6831: 6459: 6399: 5431: 5392: 5375: 5358: 5295: 5274: 5257: 5239: 5166: 5145: 4577: 4564: 4539: 4514: 4509:: Zero-extends 16-bit argument. 4416: 3791:SHL/SHR/SAL/SAR/ROL/ROR/RCL/RCR 2593:alternative 1-byte encoding of 2355:Repeat MOVS/STOS/CMPS/LODS/SCAS 291:ASCII adjust AX before division 208:Original 8086/8088 instructions 123:and executed on the processor. 26431:Low-level programming language 24949:/arch/x86/kernel/cpu/centaur.c 24893:, nov 1996. Archived from the 24231: 24214: 24177: 24156: 23204: 23198: 23172: 23169: 23163: 23118: 23112: 23086: 23083: 23077: 23029: 23023: 22965: 22959: 22905: 22899: 22558: 22552: 22541: 22535: 22424: 22418: 21553: 21547: 21451: 21445: 21389: 21383: 21353: 21347: 21338: 21335: 21329: 21285: 21279: 21257: 21251: 21199: 21193: 21182: 21176: 21154: 21151: 21145: 21094: 21088: 21032: 21026: 20944: 20938: 20870: 20864: 20834: 20828: 20819: 20816: 20810: 20770: 20764: 20715: 20709: 20657: 20651: 20637: 20634: 20628: 20559: 20553: 20473: 20467: 20458: 20455: 20449: 20352: 20346: 20334: 20328: 20319: 20316: 20310: 20278: 20272: 20261: 20255: 20181: 20075: 20069: 19962:Floating-point absolute value 19662:Floating-point add by integer 19521:Floating-point divide and pop 19295:Floating-point reverse divide 18213:Enable Interrupts (8087 only) 17786:Synchronize TLB invalidations. 17067:Intel Thread Director history 16988:Preferred optimization state. 16560:Create a cryptographic report 16416:Writeback/invalidate EPC page 16392:Load an EPC page as unblocked 16037:Available in 64-bit mode only. 15970:Available in 64-bit mode only. 15771:off the stack, in that order. 15719:Available in 64-bit mode only. 15717:User Interprocessor interrupt. 14518:.IF=0). (Available on all non- 13843:Move 64 bytes as Direct Store. 13546: 12911:Available in 64-bit mode only. 11893:Set Extended Control Register. 11493:Write 8 bytes to shadow stack 11476:Write 4 bytes to shadow stack 9991:CoMPare and eXCHanGe 16 Bytes. 9902:prefix; in the absence of the 8018:Performance Monitoring Counter 5465:80386: new opcodes introduced 5372:instruction started executing. 4670:, or from 32-bit to 16-bit if 4656:, or from 32-bit to 16-bit if 4637:of the current code segment - 4369: 270:ASCII adjust AL after addition 1: 25764:Flat Assembler messageboard, 25533:CPUID for Intel Xeon 3.60 GHz 25520:CPUID for Intel Xeon 3.40 GHz 24810:/arch/x86/include/asm/cpuid.h 24588:"BSWAP with 16-bit registers" 24185:SGDT/SIDT Fiction and Reality 24129: 24047:x86 SIMD instruction listings 21837:On 80387 and later x87 FPUs, 20081:{\displaystyle M*2^{E}=st(0)} 15608:The register argument to the 14571:The hint flags available for 14074:or a serializing instruction. 13489: 11560:Clear shadow stack busy flag 10008:64-bit Return from Interrupt 9957:Sign extend RAX into RDX:RAX 8872:On Intel Pentium and AMD K5, 4982:(signed divide) instruction. 2360:REP, REPE, REPNE, REPNZ, REPZ 1096:Call to interrupt if overflow 26077:@Instlatx64 (Apr 17, 2023). 25012:Re: i686 quirk for AMD Geode 24329:Linux kernel documentation, 24104:Advanced Vector Extensions 2 22348:to 0 and set the three bits 22085:The result of executing the 21867:bit and the presence of the 20138:st(0) is then replaced with 20037:The split is done such that 17474: 16613:Extend EPC page permissions 16384:Load an EPC page as blocked 16376:Extend EPC page measurement 16119: 16025: 15627: 15100:instruction will execute as 14756:The "core ID" value read by 14542:and later Intel processors) 13837: 12636:Trusted Execution Technology 11089:-branded server parts (e.g. 10938:produces the same result as 10930:instruction will execute as 10905:instruction will execute as 10702:to the bit positions set in 10602:Zero out high-order bits in 9650:byte and take two arguments. 7720:Instruction is serializing. 7374:Instruction is serializing. 5131:Instruction is serializing. 4285:The descriptors used by the 3261:Added in specific processors 1481:LOOPE, LOOPNE, LOOPNZ, LOOPZ 542:AX = AL ; sign extended 7: 26215:Software Developer's Manual 26047:@InstLatX64 (May 3, 2022). 25945:Software Developer's Manual 25698:Software Developer's Manual 25413:AMD-K6 Processor Data Sheet 25063:Multibyte NOP Made Official 24928:Software Developer's Manual 24823:CPUID Patch for IDT Winchip 24316:, see mitigations section. 24087: 24063:Virtualization instructions 23829:1.0000000000000000000012874 23752:used in the calculation of 22742:Store x87 Status Word to AX 19941:Floating-point change sign 19437:Floating-point add and pop 17918:The registers supported by 17536: 17526:Write to the CR8 register. 16605:Accept changes to EPC page 16568:Create a cryptographic key 15808:Clear User Interrupt Flag. 15470: 14692:Enter measured environment 13953:and later Geode processors. 13888: 13495:Optimized Cache Line Flush. 12903: 12454:Non-Temporal Memory Store. 11908: 11646:near instructions (opcodes 11302:return-oriented programming 11239: 10884:but not ABM, such as Intel 10732:Parallel Bit Extract. Uses 10227:Bit manipulation extensions 9376:, long NOP does not have a 8433:On Intel and AMD CPUs, the 7465:for 16/32-bit variant. The 6220:Performs same operation as 4848:Compare string doubleword: 1215:Load FLAGS into AH register 261: 119:program, often stored as a 10: 26633: 26295:in volume 1, section 8.3.8 25649:, volume 1, section 18.3.1 25460:"SYSENTER, Where Are You?" 24821:gcc-patches mailing list, 24808:Linux 6.3 kernel sources, 24586:Toth, Ervin (1998-03-16). 24350:I found the SAVEALL opcode 24077: 24066: 24055: 24052:Cryptographic instructions 24044: 23242:x87 Instructions added in 22768:x87 Instructions added in 20146:is pushed onto the stack. 18151:Store x87 FPU Environment 18113:Clear x87 Exception Flags 17740: 17694: 17048:CPUID.(EAX=20h,ECX=0):EBX. 16228:The branch hint mnemonics 15958: 15906: 15843:Data Streaming Accelerator 15523: 15428: 15372: 14700:Exit measured environment 13778: 13162:Process-context identifier 13150: 12506:In a system with multiple 11638:Prefix used with indirect 11570: 11379: 11343: 10996: 10247:Bit Manipulation Extension 10230: 9941: 9763:is, however, available in 9479:opcodes since version 2.7. 9355:66 0F 1F 84 00 00 00 00 00 9070:(CF=0 and ZF=0): "Above", 6989:is used to enable/disable 6696:(CF=0 and ZF=0): "Above", 5269:I/O port permission bitmap 4549:instruction causes #UD in 3927:interrupt Descriptor Table 3160:typically uses xchg as an 2700:left (unsigned shift left) 2562:(signed) r/m >>= CL; 2396:Return from near procedure 1268:Load ES:r with far pointer 1232:Load DS:r with far pointer 745:Convert word to doubleword 137: 26514: 26487:Microsoft Macro Assembler 26454: 26403: 25544:SuperUser StackExchange, 25249:and page 415 and 419 for 25169:binutils-gdb mailing list 25016:Linux Kernel Mailing List 24006: 23974: 23579: 23569: 23563: 23488: 23482: 23258: 23241: 23235: 23005: 22993:is pushed onto the stack. 22807: 22767: 22761: 22719:Notify FPU of entry into 22705: 22699: 21605: 21602: 21598: 21596: 21425: 21231: 21132:with quadrant adjustment: 21001: 20983:is pushed onto the stack. 20900: 20689: 20607: 20604: 20600: 20598: 19925: 19905: 19892: 19872: 19859: 19842: 19839: 19826: 19809: 19806: 19793: 19776: 19773: 19760: 19743: 19740: 19727: 19710: 19707: 19694: 19677: 19674: 19661: 19646: 19595: 19575: 19562: 19421: 19400: 19380: 19362: 19358: 19317: 19314: 19298: 19294: 19253: 19250: 19234: 19230: 19189: 19186: 19170: 19166: 19125: 19122: 19106: 19102: 19061: 19058: 19042: 19038: 18997: 18994: 18978: 18974: 18959: 18888: 18885: 18872: 18855: 18852: 18839: 18807: 18794: 18779: 18753: 18743: 18740: 18518: 18515: 18473: 18432: 18424: 18397: 18394: 18381: 18346: 18343: 18330: 18286: 18273: 18258: 18254: 18252: 18245: 18225: 18207: 18187: 18165: 18145: 18133:Load x87 FPU Environment 18125: 18105: 18085: 18067: 18047: 18027: 18024: 18020: 18018: 18013: 17922:as of December 2022 are: 17768: 17765: 17738: 17734: 17688: 17642: 17613:Zero out full cache line. 17607: 17601: 17566: 17563: 17534: 17530: 17504: 17501: 17472: 17468: 17445:Instruction Set Extension 17088:The register argument to 16928:to 1 if they reached the 16809: 16693: 16638: 16625: 16596: 16494: 16457: 16428: 16175: 16169: 16145: 16142: 16117: 16113: 16019: 15991: 15988: 15956: 15952: 15912:Non-serializing Write to 15900: 15867: 15833: 15831: 15827: 15823:Set User Interrupt Flag. 15787:Test User Interrupt Flag. 15739: 15736: 15709: 15705: 15666: 15660: 15621: 15582: 15549: 15521: 15517: 15476:Cache Line Demotion Hint. 15464: 15422: 15366: 15267: 15238:Software Guard Extensions 15229: 15225: 15196: 15193: 15159: 15155: 15132:Instruction Set Extension 14575:in the EAX register are: 14498:in the ECX register are: 14314:On systems without SSE2, 13882: 13831: 13772: 13716: 13660: 13618: 13615: 13590: 13586: 13540: 13483: 13442: 13439: 13401: 13397: 13344: 13341: 13294: 13290: 13243: 13240: 13213: 13209: 13144: 13125: 13070: 13067: 13064: 13042:Move to/from memory with 13034: 13030: 12939: 12936: 12901: 12897: 12852: 12849: 12841: 12819: 12817: 12813: 12784: 12781: 12778: 12749: 12745: 12691: 12685: 12620: 12564: 12561: 12528: 12524: 12475: 12398: 12395: 12368: 12364: 12273: 12270: 12240: 12236: 12213:Instruction Set Extension 12084: 12081: 12048: 12044: 11993: 11987: 11902: 11813: 11810: 11777: 11773: 11605: 11602: 11568: 11564: 11510: 11376: 11373: 11345: 11339: 11264: 11237: 11233: 11193: 11164: 11160: 11072: 11026: 11022: 10710:. Operation performed is: 10620: 10577: 10573: 10423: 10414: 10388: 10384: 10359: 10306: 10300: 10280:Advanced Bit Manipulation 10269: 10265: 9939:Sign extend EAX into RAX 8367: 8312: 8288: 8211: 8208: 8198: 8123: 8001: 7637: 7634: 7613: 7587:Discontinued instructions 7377: 7324: 7267: 7250: 7192:Undocumented, 80386 only. 6918:byte is used to indicate 6217: 6202: 6175: 6069: 6048: 6000: 5945: 5918: 5915: 5901: 5810: 5783: 5780: 5766: 5739: 5695: 5657: 5635: 5613:Bit Test and Complement. 5612: 5579: 5542: 5512: 5495: 5081: 4960: 4936: 4932: 4904: 4802:Store string doubleword: 4786: 4762: 4591:security vulnerabilities. 4244: 4241: 4217: 4165: 4133: 4104: 4084: 4036: 4033: 4014: 3984: 3905: 3902: 3881: 3801: 3798: 3789: 3667: 3664: 3652: 3623: 3620: 3608: 3416: 3413: 3405: 3342: 3339: 3331: 3199: 3195:Table look-up translation 3130: 2927: 2831: 2558:(signed) r/m >>= 1; 2417:Return from far procedure 2326:Rotate right (with carry) 2266: 2194: 2026: 2014: 1970: 1947: 1891: 1484: 1398: 1314: 501: 45:(MMX, SSE, AVX, FMA, AMX) 26617:Instruction set listings 26416:Comparison of assemblers 26189:iAPX86, 88 User's Manual 25751:with explicit operands. 25558:SDM order no. 325462-077 25354:6x86 processor data book 25104:Debian bug report logs, 24468:ICEBP finally documented 24278:), chapter 8, p.249,257. 22686:Instruction description 22649:{\displaystyle \pm \pi } 22623:{\displaystyle \pm \pi } 21740:instruction is executed. 19103:Floating-point subtract 19039:Floating-point multiply 18005:Instruction description 17700:Commit Stores To Memory. 17648: 16994:1 = C0.1 (faster wakeup) 16828:TSE_KEY_PROGRAM_WRAPPED: 16621:Initialize pending page 16453:Change type of EPC page 16035:if the condition is met. 15966:Model-specific registers 15711: 15672:Processor History Reset. 14668:Report SMX capabilities 13722: 13036: 11779: 11577:Indirect Branch Tracking 11310:indirect branch tracking 10706:, then stores result to 10169:must be 16-byte aligned. 9972:CoMPare String Quadword 8987:CF=1: "Carry", "Below", 8617:The ability to restrict 8552:Doorbell Register (AMD) 7557:prefix is used with the 6613:CF=1: "Carry", "Below", 6469:prefix is used with the 6409:prefix is used with the 6388:instructions accept the 4871:Scan string doubleword: 4825:Move string doubleword: 4776:Load string doubleword: 3803: 3669: 3625: 3550: 3479: 3418: 3344: 2516:left (signed shift left) 2297:Rotate left (with carry) 1721: 1574: 134:x86 integer instructions 28:x86 instruction listings 26152:, feb 1981, pages 24-25 25658:Binutils mailing list: 24770:Microprocessor Report, 24570:The LOADALL Instruction 23400:Differs from the older 21996:On the 8087 and 80287, 21311:80387: no restrictions 21130:Two-argument arctangent 19359:Floating-point compare 18073:Store x87 Control Word 17593:differs from the older 17499:Read the CR8 register. 17456:Instruction description 17130:CPUID.(EAX=7,ECX=1):EDX 16787:(selected by EAX) are: 16681:(selected by EAX) are: 16631:8 (EVERIFYREPORT2) 16544:(selected by EAX) are: 16474:Activate EBLOCK checks 16424:Activate EBLOCK checks 16368:Write data by debugger 16312:(selected by EAX) are: 15914:Model-specific register 15757:User Interrupt Return. 15284: 15269: 15143:Instruction description 14652:(selected by EAX) are: 13728:Read processor core ID. 13666: 13514:Differs from the older 13403: 12370: 12224:Instruction description 11761:Instruction description 11716:binutils use "notrack") 11545:Mark shadow stack busy 10610:, then write result to 10579: 10390: 10258:Instruction description 9820:On Transmeta CPUs, the 9694:The exact semantics of 9345:0F 1F 84 00 00 00 00 00 7694:Model-specific register 7630:Model-specific register 7163:is found to be working. 6969:On processors prior to 6558:respectively, with the 5879:Conditional jump near. 3900:Register) from memory. 3898:Global Descriptor Table 3869:Instruction description 2590:Subtraction with borrow 1285:Assert BUS LOCK# signal 63:(e.g. 3DNow!, MPX, XOP) 25896:, 10 May 2019, page 39 25823:, 3 Jan 2023, page 5. 24963:Accessed 24 Jan 2023. 23835: 23216: 23150:Floating-point cosine. 23130: 23054: 22977: 22917: 22650: 22624: 22598: 22568: 22444: 22328: 22327:{\displaystyle 2^{63}} 21655:Free x87 FPU Register 21603:Other x87 Instructions 21586: 21494: 21413:followed by stack pop 21407: 21303: 21219:followed by stack pop 21213: 21119: 21057: 20969: 20888:followed by stack pop 20882: 20783: 20735: 20672: 20573: 20365: 20292: 20130: 20082: 19231:Floating-point divide 18720: 18671: 18615: 18559: 18195:Restore x87 FPU State 18093:Store x87 Status Word 18055:Load x87 Control Word 17124:and later processors, 16924:instructions will set 16768:MSR) are all set to 1. 16707:1 (EINCVIRTCHILD) 16699:0 (EDECVIRTCHILD) 16639:Added with AEX-Notify 16531:-branded server parts. 16360:Read data by debugger 16344:Initialize an enclave 15231: 14708:Report SMX parameters 14471:The wait performed by 13592: 13296: 12632:Safer Mode Extensions. 12626: 12050: 11166: 11028: 10917:for most input values. 10415:Count Trailing zeroes. 10165:The memory operand to 10133:STOre String Quadword 9532:The UD0/1/2 opcodes - 9143:"Not Greater Or Equal" 9023:ZF=1: "Zero", "Equal" 8807:. Also present in all 8566:System Management Mode 8445:on Intel CPUs and MSR 7716:System Management Mode 7095:In virtual-8086 mode, 6952:For moves to/from the 6769:"Not Greater Or Equal" 6649:ZF=1: "Zero", "Equal" 6543:instructions (opcodes 6487:for most input values. 6255: UMOV r16/32, r/m 6231: UMOV r/m, r16/32 5254:side effect upon read. 4493:, undefined otherwise. 4264:, then shut down CPU. 4121:Adjust RPL (Requested 4052:Store IDTR to memory. 4031:Store GDTR to memory. 1250:Load Effective Address 39:(integer, system, x87) 26505:Open Watcom Assembler 26446:x86 assembly language 26163:8087 Math Coprocessor 25793:(archived 5 mar 2017) 25573:, nov 5, 2020, page 6 25494:Processor Recognition 24947:Linux kernel 5.4.12, 24657:"i486 Microprocessor" 24634:"i486 Microprocessor" 23836: 23389:not unordered (PF=0) 23217: 23131: 23055: 22978: 22918: 22651: 22625: 22599: 22569: 22476:Table-maker's dilemma 22445: 22329: 22185:Normal finite number 21743:state of the x87 FPU. 21587: 21495: 21408: 21304: 21214: 21120: 21058: 20970: 20883: 20784: 20736: 20673: 20574: 20366: 20293: 20131: 20083: 18721: 18672: 18616: 18560: 18482:Push +1.0 onto stack 18461:Push +0.0 onto stack 17149:instructions (opcode 16125:Instruction prefetch. 16050:CMPccXADD m64,r64,r64 16044:CMPccXADD m32,r32,r32 14665:0 (CAPABILITIES) 14206:The operation of the 13286:Prefetch cache line. 13138:NFx REX.W 0F 38 F1 /r 13105:NFx REX.W 0F 38 F0 /r 12197:.(EAX=0Dh,ECX=1):EAX. 12136:Under Intel APX, the 11172:Hardware Lock Elision 10758:VEX.LZ.F2.0F3A F0 /r 10667:and the high half in 10568:dst = (src-1) AND src 10549:dst = (src-1) XOR src 10360:Count Leading zeroes. 10118:SCAn String Quadword 10103:PUSH RFLAGS Register 10073:Move String Quadword 10041:LoaD String Quadword 9230:-encoded variants of 8625:"Raphael" and later). 7488:in the same way as a 7067:The operation of the 6156:to general register. 6119:to general register. 6067:to general register. 5470:Instruction mnemonics 5129:interrupt/trap gate. 4366:and later processors. 3060:Logical compare (AND) 2381:Return from procedure 2263:Push FLAGS onto stack 1946:opcode equivalent to 1288:(for multiprocessing) 1113:Return from interrupt 629:Complement carry flag 140:x86 assembly language 57:(e.g. RDRAND, AES-NI) 26586:Instruction listings 26049:"The CLDEMOTE Story" 24995:"Undocumented RDTSC" 24891:CPUID Algorithm Wars 24610:"BSWAP + 66h prefix" 24572:. Archived from the 24451:Undocumented OpCodes 23768: 23362:FCMOVNBE st(0),st(i) 23154: 23068: 23064:Floating-point sine. 23009: 22927: 22867: 22863:Computes two values 22637: 22611: 22581: 22523: 22393: 22311: 21760:instruction (opcode 21507: 21431: 21320: 21237: 21136: 21068: 21006: 20918: 20801: 20746: 20694: 20619: 20440: 20301: 20175: 20100: 20041: 18696: 18640: 18584: 18528: 17836:) prefix instead of 17278:"Not Below or Equal" 16715:2 (ESETCONTEXT) 16618:7 (EACCEPTCOPY) 16584:Re-enter an Enclave 16500:18 (EUPDATESVN) 16236:are listed in early 16088:CMPccXADD ,reg1,reg2 16070:VEX.128.66.0F38.W1 E 16060:VEX.128.66.0F38.W0 E 15964:Read/write multiple 14318:will execute as NOP. 14103:dispatch-serializing 13804:NP REX.W 0F 38 F9 /r 13384:F3 REX.W 0F 38 F6 /r 13326:66 REX.W 0F 38 F6 /r 12892:F2 REX.W 0F 38 F1 /r 11525:66 REX.W 0F 38 F5 /r 11488:NP REX.W 0F 38 F6 /r 11036:Transactional memory 10993:Added with Intel TSX 10836:VEX.LZ.66.0F38 F7 /r 10817:VEX.LZ.F2.0F38 F7 /r 10780:VEX.LZ.F3.0F38 F7 /r 10726:VEX.LZ.F3.0F38 F5 /r 10692:VEX.LZ.F2.0F38 F5 /r 10653:VEX.LZ.F2.0F38 F6 /r 10530:dst = (-src) AND src 10497:, length in bits of 10477:ra = r/m AND NOT(rb) 10088:POP RFLAGS Register 10026:Jump if RCX is zero 9335:0F 1F 80 00 00 00 00 9072:"Not Below or Equal" 8989:"Not Above or Equal" 8924:instruction (opcode 7948:(TSC) into EDX:EAX. 7876:Compare and Exchange 7269:Compare and Exchange 6698:"Not Below or Equal" 6615:"Not Above or Equal" 6195:In-circuit emulation 5744:SHRD arg1,arg2,shamt 5700:SHLD arg1,arg2,shamt 5580:Bit Test and Reset. 5288:instruction in that 4763:String instructions 4744:Instruction mnemonic 4377:CR0 control register 2514:Shift Arithmetically 2191:Push data onto stack 1964:Negate the operand, 769:binary-coded decimal 538:Convert byte to word 275:binary-coded decimal 26581:Calling conventions 26481:High Level Assembly 26398:x86 assembly topics 26333:, provided by Intel 25136:Pentium Pro changes 23471:FUCOMIP st(0),st(i) 23380:FCMOVNU st(0),st(i) 23346:FCMOVNE st(0),st(i) 23331:FCMOVNB st(0),st(i) 23299:FCMOVBE st(0),st(i) 21809:is then encoded as 21780:is then encoded as 19299:dst <- src / dst 19235:dst <- dst / src 19171:dst <- src – dst 19107:dst <- dst – src 19043:dst <- dst * src 18979:dst <- dst + src 18975:Floating-point add 18035:Initialize x87 FPU 17381:"Not Less or Equal" 16930:IA32_UMWAIT_CONTROL 16906:IA32_UMWAIT_CONTROL 16694:Added with OVERSUB 16647:Decrement TCS.CSSA 16458:Added with OVERSUB 15879:ENQCMDS r32/64,m512 15841:Part of Intel DSA ( 15059:is not disabled by 14998:as well as opcodes 14986:) instruction is a 14705:6 (PARAMETERS) 14673:2 (ENTERACCES) 14522:implementations of 14404:MONITOR EAX,ECX,EDX 12547:MONITOR EAX,ECX,EDX 9193:"Not Less or Equal" 8691:bits other than ZF. 7589:are not included.) 7459:for 8-bit variant, 7083:In protected mode, 6819:"Not Less or Equal" 6037:LSS r32, m32&16 6032:LSS r16, m16&16 6019:LGS r32, m32&16 6014:LGS r16, m16&16 5992:LFS r32, m32&16 5988:LFS r16, m16&16 5740:Shift Right Double. 5466: 5347:), however, unlike 5010:Jump if ECX is zero 4737: 4686:as well as the x86 4641:makes both 16-bit, 3110:floating-point unit 3105:Wait until not busy 2496:Store AH into FLAGS 876:floating-point unit 273:used with unpacked 241: 22:Part of a series on 26576:Processor register 26277:Intel SDM, rev 053 25892:Catherine Easdon, 24336:2020-10-21 at the 24074:Other instructions 23831: 23557:FXRSTOR64 m512byte 23451:FUCOMI st(0),st(i) 23433:FCOMIP st(0),st(i) 23372:not below or equal 23316:FCMOVU st(0),st(i) 23284:FCMOVE st(0),st(i) 23212: 23126: 23050: 22973: 22913: 22646: 22620: 22594: 22564: 22440: 22324: 22303:, if the quotient 21582: 21490: 21403: 21299: 21209: 21115: 21053: 20965: 20878: 20779: 20731: 20668: 20610:range restriction 20569: 20361: 20288: 20126: 20092:is an integer and 20078: 18716: 18667: 18611: 18555: 17716:platform-specific. 17379:(ZF=0 and SF=OF): 16803:MKTME_KEY_PROGRAM: 16408:Add version array 16400:Block an EPC page 16328:Create an enclave 15852:ENQCMD r32/64,m512 15604:Time Stamp Counter 15593:TPAUSE r32,EDX,EAX 15567:UMWAIT r32,EDX,EAX 15535:UMONITOR r16/32/64 14550:Monitorless MWAIT 13850:MOVDIR64B reg,m512 12699:Time Stamp Counter 9467:mnemonics for the 9191:(ZF=0 and SF=OF): 9161:"Greater Or Equal" 8825:P-,C- and T-states 7946:Time Stamp Counter 6817:(ZF=0 and SF=OF): 6787:"Greater Or Equal" 6282: IBTS r/m,reg 6276:Bitfield extract. 6267: XBTS reg,r/m 6243: UMOV r8, r/m 6209: UMOV r/m, r8 6117:x86 debug register 5696:Shift Left Double. 5464: 4735: 4635:segment descriptor 4151:segment descriptor 4007:Task State Segment 2800:Set interrupt flag 2778:Set direction flag 2138:(8086/8088 only), 1167:Jump if CX is zero 767:(used with packed 239: 144:Below is the full 51:(VT-x, AMD-V, TDX) 26599: 26598: 26493:Netwide Assembler 26411:Assembly language 26362:Netwide Assembler 26339:, provided by AMD 26252:Dusko Koncaliev, 25730:on 13 March 2022. 25140:GAS2 mailing list 25061:Intel Community: 24288:US Patent 4974159 24022:Unlike the older 23823: 23618: 23617: 23531:FXSAVE64 m512byte 23414:FCOMI st(0),st(i) 23355:not equal (ZF=0) 23340:not below (CF=0) 23325:unordered (PF=1) 23253:conditional moves 22779:range restriction 22695:Additional items 22592: 22562: 22262: 22261: 21725: 21724: 21569: 21525: 21524: 21500: 21483: 21482: 21309: 21203: 21051: 20963: 20729: 20282: 18156:FNSTENV m112/m224 18014:Additional items 17950: 17949: 17796: 17795: 17386: 17385: 17365:(ZF=1 or SF≠OF): 17276:(CF=0 and ZF=0): 17187:OF=1: "Overflow" 17151:VEX.128.66.0F38 E 17079: 17078: 17008: 17007: 16834: 16833: 16722: 16721: 16651: 16650: 16644:9 (EDECCSSA) 16576:Enter an Enclave 16507: 16506: 16471:11 (ETRACKC) 16463:10 (ERDINFO) 16215: 16214: 16085:The operation of 15398:F3 REX.W 0F AE /4 15051:Unlike the older 14909:Unlike the older 14897: 14896: 14781:Unlike the older 14728: 14727: 14716:SMX Mode Control 14635:instruction, the 14615: 14614: 14601:CPU power C-state 14562: 14561: 14462:to run in Ring 3. 13926: 13925: 13512:Flush cache line. 13022:F3 REX.W 0F AE /3 12999:F3 REX.W 0F AE /2 12976:F3 REX.W 0F AE /1 12930:F3 REX.W 0F AE /0 12808:F3 REX.W 0F B8 /r 12701:and Processor ID. 12487:Cache Line Flush. 12450:NP REX.W 0F C3 /r 12126: 12125: 12117:NP REX.W 0F C7 /3 12075:NP REX.W 0F C7 /5 12018:NP REX.W 0F C7 /4 11941:Unlike the older 11935:NP REX.W 0F AE /6 11856:NP REX.W 0F AE /5 11804:NP REX.W 0F AE /4 11730:context switching 11666: 11665: 11427:F3 REX.W 0F 1E /1 11400:F3 REX.W 0F AE /5 11290: 11289: 11132:End transaction. 10846: 10845: 10750:RORX reg,r/m,imm8 10597:VEX.LZ.0F38 F5 /r 10561:VEX.LZ.0F38 F3 /1 10542:VEX.LZ.0F38 F3 /2 10523:VEX.LZ.0F38 F3 /3 10489:VEX.LZ.0F38 F7 /r 10475:Bitwise AND-NOT: 10471:VEX.LZ.0F38 F2 /r 10458:F3 REX.W 0F BC /r 10378:F3 REX.W 0F BD /r 10340:F3 REX.W 0F B8 /r 10192:For this reason, 10155: 10154: 9799:On AMD CPUs, the 9765:Virtual 8086 mode 9398:opcode range was 9360: 9359: 9325:66 0F 1F 44 00 00 9202: 9201: 9173:(ZF=1 or SF≠OF): 8962:OF=1: "Overflow" 8833:and later; Intel 8683:instruction, the 8679:Unlike the older 8556: 8555: 8423: 8422: 7581:-class processors 7484:instruction sets 7414: 7413: 6828: 6827: 6799:(ZF=1 or SF≠OF): 6588:OF=1: "Overflow" 6319: 6318: 6291:Bitfield insert. 5742:The operation of 5725:SHRD r/m, r, imm8 5698:The operation of 5684:SHLD r/m, r, imm8 5410:if IOPL is not 3. 5408:virtual 8086 mode 5141: 5140: 4555:Virtual 8086 Mode 4429:is set, then the 4268: 4267: 3839: 3838: 3398:Leave stack frame 3324:Enter stack frame 3258: 3257: 2599:is available via 2525:r/m <<= CL; 1861:DX:AX = AX * r/m; 1856:Unsigned multiply 1131:Jump if condition 959:DX:AX = AX * r/m; 922:AX = DX:AX / r/m; 842:AX = DX:AX / r/m; 455:r/m &= r/imm; 98: 97: 26624: 26612:X86 instructions 26392: 26385: 26378: 26369: 26368: 26320: 26318: 26316: 26296: 26294: 26290: 26286: 26282: 26274: 26268: 26262: 26256: 26254:Pentium FDIV Bug 26250: 26244: 26238: 26232: 26231: 26224: 26218: 26211: 26205: 26198: 26192: 26185: 26179: 26172: 26166: 26159: 26153: 26146: 26140: 26133: 26127: 26121: 26115: 26104: 26098: 26097: 26091: 26090: 26074: 26068: 26067: 26061: 26060: 26044: 26038: 26031: 26025: 26015: 26009: 26002: 25996: 25985: 25979: 25972: 25961: 25954: 25948: 25941: 25935: 25929: 25925: 25916: 25910: 25903: 25897: 25890: 25884: 25877: 25871: 25864: 25858: 25851: 25845: 25834: 25828: 25819:R. Zhang et al, 25817: 25811: 25800: 25794: 25787: 25781: 25775: 25771: 25762: 25756: 25750: 25746: 25737: 25731: 25720: 25714: 25707: 25701: 25694: 25688: 25681: 25675: 25668: 25662: 25656: 25650: 25644: 25638: 25631: 25625: 25624: 25610: 25604: 25603: 25597: 25596: 25580: 25574: 25567: 25561: 25554: 25548: 25542: 25536: 25529: 25523: 25516: 25510: 25503: 25497: 25490: 25484: 25473: 25467: 25458:Michal Necasek, 25456: 25450: 25443: 25437: 25436:on Mar 15, 2019. 25432:, 13 june 2012. 25430:The Xen Project. 25422: 25416: 25409: 25403: 25401: 25400: 25390: 25384: 25382: 25373: 25367: 25365: 25364: 25359: 25350: 25341: 25340: 25338: 25337: 25318: 25312: 25311: 25309: 25308: 25288: 25282: 25280: 25272: 25263: 25254: 25252: 25248: 25239: 25230: 25228: 25227: 25222: 25221: 25211: 25205: 25194: 25188: 25182: 25178: 25174: 25165:x86: correct UDn 25161: 25155: 25149: 25145: 25132: 25126: 25119: 25113: 25102: 25096: 25089: 25083: 25076: 25070: 25059: 25053: 25052:on oct 28, 2022. 25042: 25036: 25025: 25019: 25008: 25002: 24993:Michal Necasek, 24991: 24985: 24974: 24968: 24959:Stack Overflow, 24957: 24951: 24945: 24939: 24937: 24933: 24924: 24915: 24906:Geoff Chappell, 24904: 24898: 24897:on dec 18, 2000. 24889:Robert Collins, 24887: 24881: 24879: 24870: 24864: 24853: 24847: 24846:on Oct 13, 2014. 24836: 24830: 24829:on Apr 27, 2023. 24825:, May 21, 2019. 24819: 24813: 24806: 24800: 24794: 24788: 24785: 24779: 24778:on Jun 29, 2022. 24768: 24762: 24761: 24756:. Archived from 24750: 24744: 24737: 24731: 24720: 24714: 24703: 24697: 24690: 24684: 24683: 24676: 24670: 24668: 24667: 24662: 24653: 24647: 24645: 24644: 24639: 24630: 24624: 24623: 24617: 24616: 24605: 24599: 24598: 24590:. Archived from 24583: 24577: 24568:Robert Collins, 24566: 24560: 24559:on Sep 19, 2020. 24545: 24539: 24535:Geoff Chappell, 24533: 24527: 24526: 24515: 24509: 24502: 24496: 24494: 24485: 24479: 24474:, May 25, 2018. 24466:Michal Necasek, 24464: 24458: 24453:, 29 july 1995. 24449:Robert Collins, 24447: 24438: 24437:on Mar 23, 2021. 24433:, Mar 22, 2021. 24427: 24421: 24414: 24408: 24397: 24391: 24386:, Apr 29, 2014. 24380: 24374: 24369:, aug 12, 2022. 24363: 24357: 24352:, jun 21, 2019. 24346: 24340: 24327: 24321: 24310: 24304: 24297: 24291: 24285: 24279: 24268: 24262: 24252: 24246: 24235: 24229: 24218: 24212: 24201: 24192: 24183:Michal Necasek, 24181: 24175: 24174: 24168: 24160: 24154: 24153: 24151: 24150: 24140: 24031: 24029: 24025: 24020: 24014: 24012: 24008: 24004: 24000: 23996: 23992: 23988: 23984: 23980: 23976: 23971: 23962: 23960: 23956: 23952: 23948: 23942: 23938: 23933: 23924: 23918: 23914: 23909: 23903: 23901: 23897: 23893: 23889: 23885: 23881: 23877: 23873: 23869: 23865: 23861: 23857: 23852: 23846: 23844: 23840: 23838: 23837: 23832: 23824: 23822: 23812: 23811: 23798: 23791: 23790: 23780: 23778: 23763: 23759: 23755: 23751: 23746: 23735: 23733: 23729: 23725: 23721: 23717: 23713: 23709: 23705: 23700: 23694: 23692: 23688: 23683: 23674: 23668: 23662: 23660: 23655: 23651: 23647: 23643: 23639: 23626: 23614: 23609: 23602: 23597: 23590: 23585: 23559: 23558: 23552: 23551: 23545: 23544: 23543:FXRSTOR m512byte 23533: 23532: 23526: 23525: 23519: 23508: 23478: 23473: 23472: 23465: 23457: 23452: 23447: 23439: 23434: 23428: 23420: 23415: 23409: 23403: 23397: 23386: 23381: 23374:(CF=0 and ZF=0) 23369: 23364: 23363: 23352: 23347: 23337: 23332: 23322: 23317: 23305: 23300: 23290: 23285: 23275: 23270: 23254: 23250: 23231: 23226: 23221: 23219: 23218: 23213: 23211: 23207: 23145: 23140: 23135: 23133: 23132: 23127: 23125: 23121: 23059: 23057: 23056: 23051: 23049: 23048: 23036: 23032: 23003: 22998: 22992: 22988: 22982: 22980: 22979: 22974: 22972: 22968: 22922: 22920: 22919: 22914: 22912: 22908: 22856: 22851: 22838: 22833: 22823: 22818: 22808:no restrictions 22805: 22800: 22790: 22780: 22776: 22757: 22752: 22747: 22737: 22732: 22727: 22683: 22682: 22672: 22670: 22665: 22659: 22655: 22653: 22652: 22647: 22629: 22627: 22626: 22621: 22603: 22601: 22600: 22595: 22593: 22585: 22573: 22571: 22570: 22565: 22563: 22561: 22544: 22527: 22518: 22513: 22507: 22505: 22501: 22496: 22487: 22472: 22466: 22464: 22459: 22453: 22449: 22447: 22446: 22441: 22439: 22438: 22408: 22407: 22388: 22383: 22377: 22375: 22370: 22364: 22361: 22355: 22351: 22347: 22341: 22337: 22333: 22331: 22330: 22325: 22323: 22322: 22306: 22302: 22297: 22291: 22289: 22285: 22281: 22277: 22272: 22266: 22129: 22128: 22126: 22121: 22115: 22113: 22109: 22104:Pentium FDIV bug 22096: 22090: 22088: 22083: 22077: 22074: 22069: 22063: 22061: 22057: 22053: 22049: 22045: 22041: 22037: 22033: 22029: 22024: 22001: 21999: 21994: 21985: 21977: 21954: 21952: 21948: 21942: 21940: 21936: 21932: 21921: 21919: 21915: 21908: 21904: 21895: 21886: 21884: 21880: 21876: 21870: 21866: 21861: 21857: 21852: 21848: 21844: 21840: 21835: 21822: 21817: 21816: 21808: 21807: 21802: 21801: 21796: 21795: 21788: 21787: 21779: 21775: 21774: 21769: 21763: 21759: 21755: 21750: 21744: 21739: 21733: 21721: 21716: 21715: 21704: 21699: 21698: 21687: 21682: 21677: 21667: 21666: 21660: 21650: 21645: 21635: 21630: 21620: 21615: 21592: 21591: 21589: 21588: 21583: 21581: 21577: 21570: 21565: 21537: 21533: 21526: 21517: 21516: 21499: 21497: 21496: 21491: 21489: 21485: 21484: 21475: 21474: 21458: 21454: 21426: 21423: 21418: 21412: 21410: 21409: 21404: 21402: 21398: 21368: 21367: 21308: 21306: 21305: 21300: 21292: 21288: 21264: 21260: 21233: 21229: 21224: 21218: 21216: 21215: 21210: 21208: 21204: 21202: 21185: 21168: 21124: 21122: 21121: 21116: 21114: 21113: 21101: 21097: 21062: 21060: 21059: 21054: 21052: 21044: 21039: 21035: 20999: 20994: 20988: 20982: 20978: 20974: 20972: 20971: 20966: 20964: 20956: 20951: 20947: 20913: 20909: 20901:no restrictions 20898: 20893: 20887: 20885: 20884: 20879: 20877: 20873: 20849: 20848: 20788: 20786: 20785: 20780: 20740: 20738: 20737: 20732: 20730: 20722: 20687: 20682: 20677: 20675: 20674: 20669: 20661: 20660: 20588: 20583: 20578: 20576: 20575: 20570: 20568: 20567: 20566: 20562: 20541: 20540: 20425: 20420: 20404: 20399: 20380: 20375: 20370: 20368: 20367: 20362: 20297: 20295: 20294: 20289: 20287: 20283: 20281: 20264: 20247: 20241: 20240: 20156: 20151: 20145: 20141: 20135: 20133: 20132: 20127: 20119: 20095: 20091: 20087: 20085: 20084: 20079: 20059: 20058: 20034: 20030: 20016: 20011: 19993: 19988: 19972: 19967: 19951: 19946: 19921: 19916: 19903: 19898: 19888: 19883: 19870: 19865: 19855: 19850: 19837: 19832: 19822: 19817: 19804: 19799: 19789: 19784: 19771: 19766: 19756: 19751: 19738: 19733: 19723: 19718: 19705: 19700: 19690: 19685: 19672: 19667: 19636: 19631: 19621: 19620: 19612: 19611: 19603: 19598: 19591: 19586: 19573: 19568: 19552: 19547: 19531: 19526: 19510: 19505: 19489: 19484: 19468: 19463: 19447: 19442: 19417: 19416: 19408: 19403: 19396: 19391: 19378: 19373: 19364: 19354: 19349: 19342: 19337: 19330: 19325: 19312: 19307: 19300: 19290: 19285: 19278: 19273: 19266: 19261: 19248: 19243: 19236: 19226: 19221: 19214: 19209: 19202: 19197: 19184: 19179: 19172: 19162: 19157: 19150: 19145: 19138: 19133: 19120: 19115: 19108: 19098: 19093: 19086: 19081: 19074: 19069: 19056: 19051: 19044: 19034: 19029: 19022: 19017: 19010: 19005: 18992: 18987: 18980: 18949: 18944: 18928: 18923: 18913: 18908: 18901: 18896: 18883: 18878: 18868: 18863: 18850: 18845: 18835: 18830: 18823: 18818: 18805: 18800: 18775: 18774: 18766: 18765: 18751: 18746: 18736: 18731: 18725: 18723: 18722: 18717: 18715: 18687: 18682: 18676: 18674: 18673: 18668: 18666: 18652: 18651: 18631: 18626: 18620: 18618: 18617: 18612: 18610: 18596: 18595: 18575: 18570: 18564: 18562: 18561: 18556: 18554: 18540: 18539: 18513: 18508: 18501: 18492: 18487: 18471: 18466: 18456: 18449: 18442: 18441: 18435: 18422: 18417: 18410: 18405: 18392: 18387: 18371: 18366: 18359: 18354: 18341: 18336: 18326: 18321: 18314: 18309: 18302: 18297: 18284: 18279: 18248: 18243: 18238: 18228: 18223: 18218: 18205: 18200: 18199:FRSTOR m752/m864 18190: 18185: 18180: 18179: 18178:FNSAVE m752/m864 18168: 18163: 18158: 18157: 18143: 18138: 18137:FLDENV m112/m224 18128: 18123: 18118: 18108: 18103: 18098: 18088: 18083: 18078: 18065: 18060: 18050: 18045: 18040: 18002: 18001: 17974: 17972: 17968: 17960: 17954: 17924: 17923: 17921: 17915: 17911: 17907: 17902: 17896: 17893: 17887: 17882: 17876: 17873: 17867: 17865: 17862:prefix with the 17861: 17855: 17850: 17841: 17839: 17835: 17831: 17825: 17822:). However, the 17821: 17820: 17815: 17814: 17809: 17804: 17791: 17783: 17778: 17758: 17753: 17721: 17712: 17707: 17666: 17661: 17627: 17622: 17621: 17596: 17592: 17587: 17581: 17576: 17560: 17554: 17549: 17523: 17522: 17516: 17515: 17496: 17491: 17482:control register 17442: 17441: 17431: 17426: 17422: 17417: 17408: 17406: 17402: 17398: 17395:Even though the 17393: 17387: 17382: 17368: 17354: 17329: 17304: 17279: 17265: 17264:"Below or Equal" 17262:(CF=1 or ZF=1): 17251: 17226: 17201: 17163: 17162: 17156: 17148: 17139: 17133: 17131: 17127: 17119: 17116:processors, the 17110: 17104: 17099: 17095: 17091: 17086: 17080: 17053: 17052: 17049: 17045: 17040: 17034: 17032: 17028: 17024: 17020: 17015: 17009: 16974: 16973: 16971: 16967: 16962: 16956: 16954: 16947: 16943: 16939: 16933: 16931: 16927: 16923: 16919: 16915: 16911: 16907: 16903: 16899: 16894: 16885: 16883: 16879: 16874: 16868: 16862: 16856: 16849: 16844: 16838: 16818:TSE_KEY_PROGRAM: 16789: 16788: 16786: 16781: 16775: 16773: 16767: 16763: 16759: 16754: 16748: 16746: 16742: 16738: 16732: 16729: 16683: 16682: 16680: 16675: 16669: 16667: 16663: 16657: 16597:Added with SGX2 16592:Exit an Enclave 16546: 16545: 16543: 16538: 16532: 16517: 16511: 16442:E (EMODPTR) 16429:Added with SGX2 16373:6 (EEXTEND) 16349:3 (EREMOVE) 16325:0 (ECREATE) 16314: 16313: 16311: 16306: 16300: 16293: 16287: 16285: 16281: 16277: 16273: 16272: 16267: 16263: 16259: 16255: 16250: 16241: 16235: 16231: 16226: 16196: 16191: 16162: 16157: 16150: 16137: 16132: 16105: 16090: 16089: 16077: 16076: 16075: 16066: 16065: 16052: 16051: 16046: 16045: 16008: 16003: 15996: 15982: 15977: 15948: 15936: 15928: 15923: 15892: 15886: 15881: 15880: 15872: 15858: 15853: 15820: 15815: 15805: 15800: 15784: 15779: 15754: 15749: 15731: 15726: 15689: 15688: 15679: 15645: 15640: 15615: 15611: 15599: 15594: 15590: 15579: 15573: 15568: 15564: 15541: 15536: 15513: 15488: 15483: 15446: 15441: 15418: 15400: 15399: 15394: 15389: 15385: 15353: 15352: 15346: 15330: 15329: 15323: 15295: 15256: 15255: 15249: 15218: 15212: 15188: 15182: 15173: 15129: 15128: 15118: 15116: 15112: 15108: 15103: 15099: 15094: 15088: 15084: 15078: 15073: 15067: 15065: 15058: 15054: 15049: 15043: 15036: 15025: 15023: 15017: 15016: 15011: 15010: 15003: 15002: 14997: 14996: 14985: 14984: 14979: 14974: 14968: 14966: 14963:) onwards, with 14958: 14954: 14950: 14947:The opcodes for 14945: 14939: 14933: 14929: 14924: 14918: 14916: 14912: 14907: 14901: 14855: 14854: 14852: 14847: 14841: 14837: 14832: 14826: 14824: 14819: 14813: 14811: 14804: 14800: 14794: 14792: 14788: 14784: 14779: 14773: 14771: 14767: 14764:is actually the 14763: 14759: 14754: 14745: 14743: 14738: 14732: 14654: 14653: 14651: 14646: 14640: 14638: 14634: 14629: 14623: 14577: 14576: 14574: 14569: 14563: 14525: 14506:MWAIT Extension 14500: 14499: 14497: 14492: 14486: 14484: 14480: 14474: 14469: 14463: 14461: 14457: 14448: 14442: 14440: 14435: 14429: 14422: 14417: 14411: 14409: 14405: 14401: 14397: 14392: 14383: 14373: 14369: 14364: 14358: 14356: 14347: 14342: 14336: 14334: 14330: 14325: 14319: 14317: 14311: 14306: 14300: 14297: 14293: 14288: 14284: 14279: 14275: 14270: 14266: 14261: 14257: 14252: 14248: 14243: 14239: 14233: 14229: 14225: 14221: 14218:prefix. Neither 14217: 14213: 14209: 14204: 14198: 14196: 14190: 14186: 14182: 14178: 14170: 14164: 14160: 14156: 14151: 14145: 14143: 14139: 14135: 14125: 14121: 14113: 14108: 14100: 14094: 14090: 14086: 14081: 14075: 14073: 14069: 14065: 14061: 14057: 14052: 14048: 14044: 14040: 14036: 14032: 14026: 14022: 14018: 14013: 14007: 14005: 14001: 13997: 13992: 13981: 13978: 13973: 13954: 13947:"MMX Extensions" 13939: 13906: 13901: 13857: 13852: 13851: 13806: 13805: 13800: 13795: 13791: 13754: 13740: 13735: 13686: 13685: 13679: 13653: 13648: 13610: 13605: 13578: 13564: 13559: 13517: 13509: 13504: 13503: 13478: 13472: 13467: 13436: 13430: 13425: 13417: 13392: 13386: 13385: 13380: 13375: 13371: 13370: 13338: 13334: 13328: 13327: 13322: 13317: 13313: 13312: 13283: 13278: 13277: 13255: 13235: 13230: 13229: 13176: 13171: 13170:INVPCID reg,m128 13140: 13139: 13133: 13123: 13118: 13114: 13107: 13106: 13100: 13062: 13057: 13053: 13023: 13019: 13014: 13010: 13000: 12996: 12991: 12987: 12977: 12973: 12968: 12964: 12931: 12927: 12922: 12918: 12893: 12888: 12881: 12876: 12872: 12839: 12834: 12809: 12804: 12803:POPCNT r64,r/m64 12776: 12771: 12770:POPCNT r32,r/m32 12767: 12766:POPCNT r16,r/m16 12758:Population Count 12713: 12708: 12672: 12652: 12651: 12645: 12615: 12609: 12603: 12598: 12594: 12554: 12549: 12548: 12543: 12501: 12496: 12495: 12466: 12461: 12451: 12447: 12442: 12438: 12428: 12423: 12390: 12385: 12357: 12352: 12342: 12337: 12327: 12322: 12312: 12307: 12291: 12262: 12257: 12210: 12209: 12199: 12198: 12192:is indicated by 12191: 12185: 12181: 12177: 12160: 12154: 12151: 12145: 12143: 12139: 12134: 12119: 12118: 12113: 12108: 12104: 12076: 12072: 12067: 12063: 12019: 12015: 12010: 12006: 11964: 11952: 11948: 11944: 11936: 11932: 11927: 11926: 11921: 11890: 11885: 11873: 11868: 11858: 11857: 11852: 11847: 11843: 11805: 11801: 11796: 11792: 11747: 11746: 11739: 11734:state-components 11724:Added with XSAVE 11717: 11713: 11707: 11705: 11701: 11697: 11688: 11686: 11682: 11677: 11661: 11657: 11656: 11651: 11650: 11645: 11641: 11635: 11630: 11620: 11615: 11597: 11592: 11584: 11557: 11552: 11542: 11537: 11527: 11526: 11520: 11519: 11505: 11500: 11490: 11489: 11483: 11473: 11468: 11458: 11453: 11443: 11438: 11428: 11423: 11413: 11408: 11401: 11396: 11385: 11371: 11366: 11315: 11314: 11283: 11282: 11276: 11269: 11259: 11258: 11252: 11228: 11222: 11217: 11210: 11203: 11190: 11184: 11179: 11155: 11146: 11145: 11139: 11129: 11128: 11122: 11112: 11104: 11067: 11066: 11058: 11050: 11049: 11044: 11003: 11002: 10986: 10983: 10979: 10974: 10968: 10966: 10962: 10957: 10951: 10949: 10945: 10941: 10937: 10933: 10929: 10924: 10918: 10916: 10912: 10908: 10904: 10899: 10893: 10883: 10877: 10871: 10867: 10863: 10859: 10854: 10839: 10838: 10837: 10830: 10820: 10819: 10818: 10811: 10803: 10799: 10795: 10791: 10783: 10782: 10781: 10774: 10764: 10763: 10762: 10752: 10751: 10739: 10735: 10729: 10728: 10727: 10720: 10709: 10705: 10701: 10695: 10694: 10693: 10686: 10678: 10674: 10670: 10666: 10662: 10656: 10655: 10654: 10647: 10631: 10618: 10613: 10609: 10605: 10599: 10598: 10592: 10569: 10562: 10557: 10550: 10543: 10538: 10531: 10524: 10519: 10508: 10504: 10500: 10496: 10490: 10485: 10478: 10472: 10467: 10460: 10459: 10453: 10420: 10412: 10407: 10403: 10380: 10379: 10373: 10365: 10357: 10352: 10348: 10341: 10336: 10335:POPCNT r64,r/m64 10302:Population Count 10298: 10293: 10292: 10291:POPCNT r32,r/m32 10287: 10286:POPCNT r16,r/m16 10244: 10243: 10220: 10218: 10217: 10212: 10208: 10203: 10197: 10195: 10181: 10176: 10170: 10168: 10163: 10145: 10140: 10130: 10125: 10115: 10110: 10100: 10095: 10085: 10080: 10070: 10065: 10055: 10050: 10049: 10048:MOVSXD r64,r/m32 10038: 10033: 10023: 10015: 10005: 10000: 9988: 9987: 9981: 9980: 9969: 9964: 9954: 9949: 9936: 9931: 9910: 9909: 9905: 9901: 9890: 9883: 9876: 9872: 9846: 9844: 9840: 9835: 9829: 9827: 9823: 9818: 9812: 9806: 9802: 9797: 9791: 9787: 9783: 9779: 9774: 9768: 9762: 9754: 9750: 9746: 9741: 9730: 9728: 9722: 9718: 9714: 9709: 9700: 9697: 9692: 9686: 9682: 9678: 9674: 9668: 9666: 9662: 9657: 9651: 9645: 9641: 9640: 9635: 9631: 9627: 9623: 9622: 9616: 9610: 9604: 9603: 9598: 9597: 9591: 9582: 9580: 9576: 9572: 9571: 9565: 9559: 9554:onwards (except 9549: 9548: 9543: 9542: 9537: 9536: 9530: 9521: 9519: 9515: 9514: 9509: 9504: 9498: 9492: 9488: 9484: 9478: 9477: 9472: 9471: 9466: 9462: 9454: 9445: 9439: 9435: 9434: 9428: 9422: 9419: 9413: 9411: 9407: 9406: 9401: 9397: 9396: 9391: 9387: 9381: 9370: 9364: 9356: 9346: 9336: 9326: 9316: 9306: 9296: 9286: 9270: 9269: 9266: 9260: 9258: 9254: 9253: 9248: 9247: 9241: 9235: 9233: 9220: 9214: 9211:In 64-bit mode, 9209: 9203: 9198: 9194: 9180: 9176: 9162: 9158: 9144: 9130: 9126: 9112: 9109:PF=1: "Parity", 9098: 9073: 9059: 9058:"Below or Equal" 9055: 9052:(CF=1 or ZF=1): 9041: 9037: 9012: 9011:"Above or Equal" 9008: 9004: 8990: 8976: 8938: 8937: 8931: 8923: 8915: 8909: 8907: 8902: 8896: 8894: 8887: 8883: 8877: 8875: 8869: 8862: 8858: 8852: 8848: 8781: 8775: 8773: 8769: 8763: 8759: 8754: 8750: 8745: 8736: 8734: 8729: 8718: 8715:Pentium F00F bug 8704: 8703: 8698: 8692: 8686: 8682: 8677: 8671: 8669: 8665: 8662:On NexGen CPUs, 8660: 8654: 8652: 8647: 8641: 8639: 8635: 8626: 8620: 8614: 8605: 8599: 8597: 8594:In 64-bit mode, 8588: 8584: 8579: 8573: 8571: 8563: 8557: 8549: 8539: 8535: 8523: 8513: 8503: 8493: 8483: 8473: 8460: 8459: 8456: 8450: 8448: 8444: 8436: 8431: 8415: 8409: 8404: 8392: 8355: 8350: 8339: 8333: 8328: 8300: 8295: 8267: 8262: 8257: 8252: 8247: 8240: 8235: 8234: 8228: 8196: 8191: 8186: 8174: 8142: 8141: 8135: 8130: 8108: 8077: 8076: 8070: 8069: 8032: 8013: 8008: 7980: 7941: 7936: 7912: 7883: 7872: 7871: 7865: 7864: 7803: 7795: 7784: 7779: 7735: 7711: 7706: 7689: 7684: 7666: 7625: 7620: 7592: 7591: 7566: 7564: 7560: 7556: 7551: 7545: 7543: 7538: 7532: 7528: 7524: 7519: 7510: 7508: 7503: 7499: 7493: 7491: 7487: 7483: 7478: 7472: 7470: 7469: 7464: 7463: 7458: 7457: 7452: 7447: 7438: 7427: 7422: 7407: 7406: 7400: 7390: 7385: 7365: 7364: 7358: 7351: 7346: 7342: 7333: 7326:eXchange and ADD 7322: 7321: 7315: 7308: 7307: 7301: 7300: 7295: 7294: 7284: 7278: 7274: 7265: 7264: 7258: 7246: 7235: 7234: 7228: 7207: 7206: 7193: 7190: 7184: 7182: 7178: 7173: 7164: 7162: 7158: 7154: 7148: 7144: 7139: 7130: 7127: 7121: 7117: 7113: 7112: 7104: 7100: 7099: 7092: 7088: 7087: 7081:in several ways: 7080: 7079: 7074: 7070: 7065: 7059: 7055: 7051: 7047: 7042: 7036: 7034: 7029: 7020: 7018: 7014: 7009: 7005: 7001: 6988: 6984: 6980: 6976: 6967: 6961: 6959: 6955: 6950: 6937: 6935: 6927: 6926: 6921: 6913: 6909: 6905: 6901: 6896: 6879: 6873: 6869: 6865: 6861: 6856: 6850: 6848: 6840: 6835: 6829: 6824: 6820: 6806: 6802: 6788: 6784: 6770: 6756: 6752: 6738: 6735:PF=1: "Parity", 6724: 6699: 6685: 6684:"Below or Equal" 6681: 6678:(CF=1 or ZF=1): 6667: 6663: 6638: 6637:"Above or Equal" 6634: 6630: 6616: 6602: 6564: 6563: 6557: 6550: 6542: 6534: 6526: 6517: 6515: 6511: 6506: 6502: 6497: 6488: 6486: 6482: 6478: 6474: 6473: 6468: 6463: 6457: 6453: 6449: 6445: 6436: 6434: 6430: 6426: 6422: 6418: 6414: 6413: 6408: 6403: 6397: 6395: 6391: 6387: 6383: 6379: 6374: 6363: 6351: 6347: 6343: 6339: 6334: 6309: 6304: 6303: LOADALL386 6288: 6283: 6273: 6268: 6261: 6256: 6249: 6244: 6237: 6232: 6223: 6215: 6210: 6191: 6186: 6168: 6163: 6149: 6144: 6131: 6126: 6112: 6107: 6098: 6094: 6090: 6082: 6077: 6065:control register 6060: 6055: 6044: 6039: 6038: 6033: 6026: 6021: 6020: 6015: 5998: 5993: 5989: 5982: 5977: 5970: 5965: 5958: 5953: 5943: 5938: 5931: 5926: 5913: 5908: 5894: 5889: 5876: 5869: 5861: 5854: 5841: 5840: 5834: 5827: 5822: 5821:MOVSX reg, r/m16 5808: 5803: 5796: 5791: 5790:MOVZX reg, r/m16 5778: 5773: 5762: 5757: 5750: 5745: 5737: 5736: 5727: 5726: 5718: 5713: 5706: 5701: 5693: 5685: 5672: 5671: 5665: 5649: 5648: 5642: 5631: 5623: 5610: 5605: 5598: 5590: 5577: 5572: 5565: 5557: 5540: 5535: 5528: 5520: 5493: 5488: 5467: 5463: 5458: 5456: 5452: 5448: 5440: 5435: 5429: 5427: 5423: 5419: 5415: 5405: 5401: 5396: 5390: 5388: 5384: 5379: 5373: 5371: 5367: 5362: 5356: 5354: 5350: 5346: 5342: 5338: 5334: 5330: 5326: 5320: 5316: 5312: 5308: 5304: 5299: 5293: 5291: 5287: 5283: 5278: 5272: 5261: 5255: 5252: 5248: 5243: 5237: 5235: 5231: 5227: 5223: 5219: 5215: 5211: 5207: 5201: 5197: 5193: 5189: 5185: 5181: 5177: 5170: 5164: 5162: 5154: 5149: 5137: 5120: 5114: 5109: 5102: 5094: 5089: 5079: 5067: 5062: 5055: 5047: 5042: 5035: 5027: 5022: 5015: 5007: 5006: 4997: 4996: 4988: 4981: 4973: 4968: 4958: 4947: 4942: 4928: 4923: 4922:port := DS: 4917: 4912: 4902: 4897: 4896:ES: := port 4891: 4886: 4879: 4868: 4863: 4856: 4845: 4840: 4833: 4828: 4822: 4817: 4810: 4805: 4799: 4794: 4784: 4779: 4773: 4768: 4738: 4734: 4731: 4723: 4719: 4712: 4708: 4685: 4681: 4673: 4669: 4665: 4659: 4655: 4651: 4644: 4640: 4608: 4606: 4601: 4592: 4586: 4581: 4575: 4573: 4568: 4562: 4560: 4548: 4543: 4537: 4535: 4531: 4527: 4518: 4512: 4508: 4498: 4484: 4477: 4473: 4469: 4464: 4453: 4448: 4444: 4440: 4436: 4432: 4428: 4420: 4414: 4412: 4408: 4400: 4396: 4386: 4382: 4373: 4367: 4361: 4357: 4353: 4349: 4345: 4340: 4325: 4319: 4315: 4311: 4307: 4300: 4296: 4292: 4288: 4283: 4263: 4257: 4252: 4238: 4232: 4227: 4210: 4205: 4195: 4194: 4188: 4178: 4173: 4158: 4146: 4141: 4118: 4113: 4112: 4097: 4092: 4079: 4074: 4064: 4059: 4049: 4044: 4028: 4023: 4022: 4000: 3995: 3979: 3974: 3964: 3959: 3949: 3944: 3920: 3915: 3914: 3893: 3888: 3860: 3859: 3828: 3825: 3822: 3819: 3816: 3813: 3810: 3807: 3792: 3772: 3769: 3766: 3763: 3760: 3757: 3754: 3751: 3748: 3745: 3742: 3739: 3736: 3733: 3730: 3727: 3724: 3721: 3718: 3715: 3712: 3709: 3706: 3703: 3700: 3697: 3694: 3691: 3688: 3685: 3682: 3679: 3676: 3673: 3655: 3638: 3635: 3632: 3629: 3611: 3602: 3599: 3596: 3593: 3590: 3587: 3584: 3581: 3578: 3575: 3572: 3569: 3566: 3563: 3560: 3557: 3554: 3540: 3531: 3528: 3525: 3522: 3519: 3516: 3513: 3510: 3507: 3504: 3501: 3498: 3495: 3492: 3489: 3486: 3483: 3469: 3455: 3452: 3449: 3446: 3443: 3440: 3437: 3434: 3431: 3428: 3425: 3422: 3408: 3392: 3378: 3375: 3372: 3369: 3366: 3363: 3360: 3357: 3354: 3351: 3348: 3334: 3315: 3296: 3277: 3276: 3253: 3249: 3245: 3241: 3237: 3233: 3228: 3224: 3213: 3206: 3201: 3192: 3185: 3181: 3177: 3173: 3162:atomic operation 3155: 3154: 3151: 3148: 3145: 3142: 3139: 3136: 3133: 3124: 3117: 3102: 3095: 3091: 3087: 3083: 3079: 3075: 3070: 3066: 3065:r/m & r/imm; 3057: 3047: 3043: 3039: 3035: 3031: 3027: 3022: 3018: 3009: 3002: 2997: 2996: 2993: 2990: 2987: 2984: 2981: 2978: 2975: 2972: 2969: 2966: 2963: 2960: 2957: 2954: 2951: 2948: 2945: 2942: 2939: 2936: 2933: 2930: 2923: 2919: 2913: 2906: 2901: 2900: 2897: 2894: 2891: 2888: 2885: 2882: 2879: 2876: 2873: 2870: 2867: 2864: 2861: 2858: 2855: 2852: 2849: 2846: 2843: 2840: 2837: 2834: 2827: 2823: 2817: 2810: 2805: 2797: 2788: 2783: 2775: 2768: 2763: 2755: 2748: 2744: 2740: 2736: 2726: 2719: 2715: 2711: 2707: 2694: 2687: 2679: 2675: 2671: 2665: 2658: 2650: 2646: 2642: 2636: 2628: 2624: 2620: 2616: 2612: 2608: 2603:SALC instruction 2598: 2597: 2587: 2580: 2576: 2572: 2568: 2563: 2559: 2550: 2543: 2539: 2535: 2531: 2526: 2522: 2521:r/m <<= 1; 2510: 2503: 2493: 2486: 2482: 2478: 2474: 2464: 2457: 2453: 2449: 2445: 2435: 2428: 2424: 2414: 2407: 2403: 2393: 2378: 2371: 2367: 2361: 2352: 2345: 2341: 2337: 2333: 2323: 2316: 2312: 2308: 2304: 2294: 2287: 2282: 2281: 2278: 2275: 2272: 2269: 2260: 2253: 2249: 2245: 2241: 2237: 2233: 2229: 2225: 2221: 2216: 2215: 2212: 2209: 2206: 2203: 2200: 2197: 2188: 2181: 2176: 2164: 2157: 2153: 2149: 2145: 2141: 2137: 2133: 2127: 2123: 2119: 2108: 2101: 2097: 2093: 2089: 2084: 2080: 2076: 2072: 2063: 2055: 2051: 2047: 2043: 2039: 2035: 2030: 2029: 2024: 2023: 2020: 2017: 2005: 1998: 1994: 1989: 1988: 1985: 1982: 1979: 1976: 1973: 1961: 1954: 1949: 1940: 1931: 1927: 1922: 1921: 1918: 1915: 1912: 1909: 1906: 1903: 1900: 1897: 1894: 1886:Two's complement 1882: 1875: 1871: 1866: 1862: 1853: 1846: 1839: 1836: 1833: 1830: 1827: 1824: 1821: 1818: 1815: 1812: 1809: 1806: 1803: 1800: 1797: 1794: 1791: 1788: 1785: 1782: 1779: 1776: 1773: 1770: 1767: 1764: 1761: 1758: 1755: 1752: 1749: 1746: 1743: 1740: 1737: 1734: 1731: 1728: 1725: 1717: 1713: 1707: 1700: 1692: 1689: 1686: 1683: 1680: 1677: 1674: 1671: 1668: 1665: 1662: 1659: 1656: 1653: 1650: 1647: 1644: 1641: 1638: 1635: 1632: 1629: 1626: 1623: 1620: 1617: 1614: 1611: 1608: 1605: 1602: 1599: 1596: 1593: 1590: 1587: 1584: 1581: 1578: 1570: 1566: 1560: 1553: 1549: 1544: 1540: 1531: 1524: 1520: 1515: 1514: 1511: 1508: 1505: 1502: 1499: 1496: 1493: 1490: 1487: 1482: 1473: 1468: 1461: 1456: 1455: 1452: 1449: 1446: 1443: 1440: 1437: 1434: 1431: 1428: 1425: 1422: 1419: 1416: 1413: 1410: 1407: 1404: 1401: 1394: 1390: 1384: 1377: 1372: 1371: 1368: 1365: 1362: 1359: 1356: 1353: 1350: 1347: 1344: 1341: 1338: 1335: 1332: 1329: 1326: 1323: 1320: 1317: 1310: 1306: 1300: 1293: 1282: 1275: 1265: 1258: 1246: 1239: 1229: 1222: 1212: 1205: 1201: 1197: 1193: 1183: 1174: 1164: 1156: 1152: 1148: 1144: 1138: 1127: 1120: 1110: 1103: 1093: 1086: 1082: 1069: 1060: 1056: 1052: 1048: 1038: 1031: 1027: 1023: 1019: 1014: 1010: 1006: 1002: 993: 985: 981: 977: 973: 969: 964: 960: 951: 944: 940: 935: 931: 927: 923: 914: 907: 900:Enter halt state 897: 888: 884: 871: 864: 860: 855: 851: 847: 843: 831: 824: 820: 816: 812: 802: 795: 785: 776: 761: 752: 742: 735: 727: 723: 719: 713: 706: 698: 694: 690: 684: 676: 672: 668: 664: 660: 656: 649:Compare operands 646: 639: 634: 626: 619: 614: 603: 594: 589: 578: 571: 566: 555: 548: 543: 535: 528: 524: 520: 516: 511: 510: 507: 504: 493: 485: 481: 477: 473: 469: 465: 460: 456: 445: 437: 433: 429: 425: 421: 417: 412: 408: 399: 391: 387: 383: 379: 375: 371: 366: 355: 348: 338: 331: 320: 313: 303: 300: 288: 281: 267: 242: 238: 236:(i.e. a value). 90: 83: 76: 19: 18: 26632: 26631: 26627: 26626: 26625: 26623: 26622: 26621: 26602: 26601: 26600: 26595: 26571:Program counter 26516: 26510: 26499:Turbo Assembler 26450: 26426:Instruction set 26399: 26396: 26327: 26314: 26312: 26300: 26299: 26292: 26288: 26284: 26280: 26275: 26271: 26263: 26259: 26251: 26247: 26240:Michael Steil, 26239: 26235: 26226: 26225: 26221: 26212: 26208: 26199: 26195: 26186: 26182: 26173: 26169: 26160: 26156: 26147: 26143: 26134: 26130: 26122: 26118: 26114:on 20 Jul 2023. 26105: 26101: 26088: 26086: 26075: 26071: 26058: 26056: 26045: 26041: 26032: 26028: 26016: 26012: 26003: 25999: 25986: 25982: 25973: 25964: 25955: 25951: 25942: 25938: 25927: 25923: 25917: 25913: 25904: 25900: 25891: 25887: 25878: 25874: 25865: 25861: 25852: 25848: 25844:on Apr 7, 2024. 25835: 25831: 25818: 25814: 25810:on Apr 8, 2024. 25801: 25797: 25788: 25784: 25773: 25769: 25763: 25759: 25748: 25744: 25738: 25734: 25721: 25717: 25708: 25704: 25695: 25691: 25682: 25678: 25669: 25665: 25657: 25653: 25645: 25641: 25632: 25628: 25611: 25607: 25594: 25592: 25581: 25577: 25568: 25564: 25555: 25551: 25543: 25539: 25530: 25526: 25517: 25513: 25504: 25500: 25491: 25487: 25483:on 13 Apr 2017. 25474: 25470: 25466:on 29 Nov 2023. 25462:, 20 Jul 2017. 25457: 25453: 25444: 25440: 25424:George Dunlap, 25423: 25419: 25410: 25406: 25398: 25397: 25391: 25387: 25380: 25374: 25370: 25362: 25361: 25357: 25351: 25344: 25335: 25333: 25320: 25319: 25315: 25306: 25304: 25289: 25285: 25278: 25270: 25264: 25257: 25250: 25246: 25240: 25233: 25225: 25224: 25219: 25218: 25212: 25208: 25204:on 16 Mar 2003. 25195: 25191: 25187:on 25 Jul 2023. 25180: 25176: 25172: 25162: 25158: 25154:on 25 Jul 2023. 25147: 25143: 25133: 25129: 25120: 25116: 25103: 25099: 25090: 25086: 25077: 25073: 25060: 25056: 25043: 25039: 25026: 25022: 25010:Willy Tarreau, 25009: 25005: 25001:on 16 Dec 2023. 24997:, 27 Apr 2018. 24992: 24988: 24984:on 26 Apr 2024. 24980:, 24 Apr 2024. 24975: 24971: 24967:on 24 Jan 2023. 24958: 24954: 24946: 24942: 24935: 24931: 24925: 24918: 24910:, 23 jan 2008. 24905: 24901: 24888: 24884: 24877: 24871: 24867: 24863:on Feb 9, 2022. 24854: 24850: 24837: 24833: 24820: 24816: 24807: 24803: 24799:, section 2.6.4 24795: 24791: 24786: 24782: 24769: 24765: 24752: 24751: 24747: 24738: 24734: 24730:on 20 Dec 2023. 24721: 24717: 24704: 24700: 24691: 24687: 24678: 24677: 24673: 24665: 24664: 24660: 24654: 24650: 24642: 24641: 24637: 24631: 24627: 24614: 24612: 24606: 24602: 24594:on 1999-11-03. 24584: 24580: 24576:on Jun 5, 1997. 24567: 24563: 24546: 24542: 24534: 24530: 24517: 24516: 24512: 24503: 24499: 24492: 24486: 24482: 24465: 24461: 24448: 24441: 24428: 24424: 24415: 24411: 24407:on Mar 15, 2019 24403:, Apr 4, 2016. 24398: 24394: 24381: 24377: 24364: 24360: 24356:on 13 Apr 2023. 24347: 24343: 24338:Wayback Machine 24328: 24324: 24311: 24307: 24298: 24294: 24286: 24282: 24269: 24265: 24253: 24249: 24236: 24232: 24228:on 16 Mar 2023. 24219: 24215: 24211:on 20 Dec 2023. 24202: 24195: 24191:on 29 Nov 2023. 24182: 24178: 24166: 24162: 24161: 24157: 24148: 24146: 24142: 24141: 24137: 24132: 24090: 24082: 24076: 24071: 24065: 24060: 24054: 24049: 24043: 24035: 24034: 24027: 24023: 24021: 24017: 24010: 24002: 23998: 23994: 23990: 23986: 23982: 23978: 23972: 23965: 23958: 23954: 23950: 23946: 23944: 23940: 23936: 23934: 23927: 23922: 23920: 23916: 23912: 23910: 23906: 23899: 23895: 23891: 23887: 23883: 23879: 23875: 23871: 23867: 23863: 23859: 23855: 23853: 23849: 23842: 23807: 23803: 23799: 23786: 23782: 23781: 23779: 23774: 23769: 23766: 23765: 23761: 23757: 23753: 23749: 23747: 23738: 23731: 23727: 23723: 23719: 23715: 23711: 23707: 23703: 23701: 23697: 23690: 23686: 23684: 23677: 23669: 23665: 23658: 23653: 23649: 23645: 23641: 23637: 23627: 23623: 23612: 23607: 23600: 23595: 23588: 23583: 23556: 23555: 23549: 23548: 23542: 23541: 23530: 23529: 23523: 23522: 23518:FXSAVE m512byte 23517: 23506: 23504: 23503:64-bit mnemonic 23476: 23470: 23469: 23463: 23455: 23450: 23445: 23437: 23432: 23426: 23418: 23413: 23405: 23401: 23399: 23395: 23384: 23379: 23373: 23367: 23361: 23360: 23350: 23345: 23335: 23330: 23320: 23315: 23310:(CF=1 or ZF=1) 23309: 23303: 23298: 23288: 23283: 23273: 23265: 23252: 23251: 23248: 23229: 23224: 23185: 23181: 23155: 23152: 23151: 23143: 23138: 23099: 23095: 23069: 23066: 23065: 23044: 23040: 23016: 23012: 23010: 23007: 23006: 23001: 22996: 22990: 22986: 22984: 22946: 22942: 22928: 22925: 22924: 22886: 22882: 22868: 22865: 22864: 22862: 22854: 22849: 22836: 22831: 22821: 22816: 22803: 22798: 22788: 22786: 22778: 22777: 22774: 22755: 22750: 22745: 22735: 22730: 22725: 22713: 22681: 22676: 22675: 22668: 22666: 22662: 22638: 22635: 22634: 22612: 22609: 22608: 22584: 22582: 22579: 22578: 22545: 22528: 22526: 22524: 22521: 22520: 22516: 22514: 22510: 22503: 22499: 22497: 22490: 22473: 22469: 22462: 22460: 22456: 22451: 22434: 22430: 22403: 22399: 22394: 22391: 22390: 22386: 22384: 22380: 22373: 22371: 22367: 22359: 22357: 22353: 22349: 22345: 22343: 22339: 22335: 22318: 22314: 22312: 22309: 22308: 22307:is larger than 22304: 22300: 22298: 22294: 22287: 22283: 22279: 22275: 22273: 22269: 22141:Classification 22124: 22122: 22118: 22111: 22107: 22098:On early Intel 22097: 22093: 22086: 22084: 22080: 22072: 22070: 22066: 22059: 22055: 22051: 22047: 22043: 22039: 22035: 22031: 22027: 22025: 22004: 21997: 21995: 21988: 21983: 21980: 21978: 21957: 21950: 21949: 21945: 21938: 21934: 21933: 21924: 21917: 21913: 21910: 21906: 21902: 21896: 21889: 21882: 21878: 21874: 21872: 21868: 21864: 21859: 21855: 21850: 21846: 21842: 21838: 21836: 21825: 21811: 21810: 21805: 21804: 21799: 21798: 21793: 21792: 21782: 21781: 21777: 21772: 21771: 21767: 21761: 21757: 21753: 21751: 21747: 21741: 21737: 21734: 21730: 21719: 21713: 21712: 21702: 21696: 21695: 21685: 21680: 21679: 21675: 21664: 21663: 21658: 21648: 21643: 21633: 21628: 21618: 21613: 21564: 21563: 21559: 21515: 21514: 21510: 21508: 21505: 21504: 21502: 21501: 21473: 21466: 21462: 21438: 21434: 21432: 21429: 21428: 21421: 21416: 21376: 21372: 21363: 21359: 21321: 21318: 21317: 21310: 21272: 21268: 21244: 21240: 21238: 21235: 21234: 21227: 21222: 21186: 21169: 21167: 21163: 21137: 21134: 21133: 21109: 21105: 21081: 21077: 21069: 21066: 21065: 21063: 21043: 21019: 21015: 21007: 21004: 21003: 20997: 20992: 20986: 20984: 20980: 20976: 20955: 20931: 20927: 20919: 20916: 20915: 20911: 20907: 20896: 20891: 20857: 20853: 20844: 20840: 20802: 20799: 20798: 20747: 20744: 20743: 20741: 20721: 20695: 20692: 20691: 20685: 20680: 20644: 20640: 20620: 20617: 20616: 20609: 20586: 20581: 20546: 20542: 20485: 20484: 20483: 20479: 20441: 20438: 20437: 20423: 20418: 20402: 20397: 20391:Floating-point 20378: 20373: 20302: 20299: 20298: 20265: 20248: 20246: 20242: 20185: 20184: 20176: 20173: 20172: 20154: 20149: 20143: 20139: 20137: 20109: 20101: 20098: 20097: 20093: 20089: 20054: 20050: 20042: 20039: 20038: 20036: 20032: 20028: 20014: 20009: 20005: 19991: 19986: 19970: 19965: 19949: 19944: 19935: 19930: 19919: 19914: 19901: 19896: 19886: 19881: 19868: 19863: 19853: 19848: 19835: 19830: 19820: 19815: 19802: 19797: 19787: 19782: 19769: 19764: 19754: 19749: 19736: 19731: 19721: 19716: 19703: 19698: 19688: 19683: 19670: 19665: 19656: 19651: 19634: 19629: 19618: 19617: 19609: 19608: 19601: 19596: 19589: 19584: 19571: 19566: 19550: 19546:FDIVRP st(i),st 19545: 19529: 19524: 19508: 19504:FSUBRP st(i),st 19503: 19487: 19482: 19466: 19461: 19445: 19440: 19431: 19426: 19414: 19413: 19406: 19401: 19394: 19389: 19376: 19371: 19365: 19352: 19347: 19340: 19335: 19328: 19323: 19310: 19305: 19288: 19283: 19276: 19271: 19264: 19259: 19246: 19241: 19224: 19219: 19212: 19207: 19200: 19195: 19182: 19177: 19160: 19155: 19148: 19143: 19136: 19131: 19118: 19113: 19096: 19091: 19084: 19079: 19072: 19067: 19054: 19049: 19032: 19027: 19020: 19015: 19008: 19003: 18990: 18985: 18969: 18964: 18947: 18942: 18926: 18921: 18911: 18906: 18899: 18894: 18881: 18876: 18866: 18861: 18848: 18843: 18833: 18828: 18821: 18816: 18803: 18798: 18789: 18784: 18772: 18771: 18763: 18762: 18749: 18744: 18734: 18729: 18705: 18697: 18694: 18693: 18685: 18680: 18656: 18647: 18643: 18641: 18638: 18637: 18629: 18624: 18600: 18591: 18587: 18585: 18582: 18581: 18573: 18568: 18544: 18535: 18531: 18529: 18526: 18525: 18511: 18506: 18499: 18490: 18485: 18469: 18464: 18454: 18447: 18439: 18438: 18433: 18420: 18415: 18408: 18403: 18390: 18385: 18369: 18364: 18357: 18352: 18339: 18334: 18324: 18319: 18312: 18307: 18300: 18295: 18282: 18277: 18268: 18263: 18246: 18241: 18236: 18226: 18221: 18216: 18203: 18198: 18188: 18183: 18177: 18176: 18166: 18161: 18155: 18154: 18141: 18136: 18126: 18121: 18116: 18106: 18101: 18096: 18086: 18081: 18076: 18063: 18058: 18048: 18043: 18038: 18029: 18000: 17983: 17978: 17977: 17970: 17963: 17961: 17957: 17919: 17917: 17913: 17909: 17905: 17903: 17899: 17891: 17889: 17885: 17883: 17879: 17874: 17870: 17863: 17859: 17857: 17853: 17851: 17844: 17837: 17833: 17829: 17827: 17823: 17818: 17817: 17812: 17811: 17807: 17805: 17801: 17789: 17787: 17781: 17776: 17762: 17756: 17751: 17743: 17719: 17717: 17710: 17705: 17697: 17664: 17659: 17651: 17625: 17619: 17618: 17610: 17594: 17590: 17589: 17585: 17579: 17574: 17558: 17552: 17547: 17539: 17520: 17519: 17513: 17512: 17494: 17489: 17477: 17449: 17440: 17435: 17434: 17428: 17424: 17420: 17418: 17411: 17404: 17400: 17396: 17394: 17390: 17380: 17367:"Less or Equal" 17366: 17352: 17327: 17315:PF=1: "Parity" 17302: 17277: 17263: 17249: 17224: 17199: 17150: 17142: 17140: 17136: 17129: 17125: 17117: 17114:Sapphire Rapids 17111: 17107: 17097: 17093: 17089: 17087: 17083: 17050: 17047: 17046:is provided by 17043: 17041: 17037: 17030: 17026: 17022: 17018: 17016: 17012: 16969: 16965: 16963: 16959: 16949: 16945: 16941: 16940: 16936: 16929: 16925: 16921: 16917: 16913: 16909: 16905: 16901: 16897: 16895: 16888: 16881: 16877: 16875: 16871: 16866: 16863: 16859: 16854: 16851: 16847: 16845: 16841: 16829: 16819: 16810:Added with TSE 16804: 16784: 16782: 16778: 16771: 16769: 16765: 16761: 16757: 16755: 16751: 16744: 16740: 16739: 16735: 16727: 16725: 16678: 16676: 16672: 16665: 16664: 16660: 16654: 16626:Added with TDX 16541: 16539: 16535: 16518: 16514: 16487:13 (ELDUC) 16479:12 (ELDBC) 16421:C (ETRACK) 16397:9 (EBLOCK) 16365:5 (EDBGWR) 16357:4 (EDBGRD) 16309: 16307: 16303: 16294: 16290: 16283: 16279: 16275: 16270: 16269: 16265: 16261: 16257: 16253: 16251: 16244: 16233: 16229: 16227: 16220: 16194: 16189: 16178: 16160: 16155: 16146: 16135: 16130: 16122: 16106: 16100: 16094: 16087: 16086: 16084: 16078: 16069: 16068: 16067: 16059: 16058: 16057: 16053: 16049: 16048: 16047: 16043: 16042: 16036: 16028: 16006: 16001: 15992: 15980: 15975: 15969: 15961: 15944: 15934: 15926: 15921: 15909: 15890: 15884: 15878: 15877: 15870:Sapphire Rapids 15868: 15856: 15851: 15836: 15818: 15813: 15803: 15798: 15788: 15782: 15777: 15752: 15747: 15741:Sapphire Rapids 15729: 15724: 15718: 15714: 15684:F3 0F 3A F0 C0 15683: 15682: 15677: 15669: 15643: 15638: 15630: 15613: 15609: 15602:Wait until the 15597: 15592: 15591: 15588: 15577: 15571: 15566: 15565: 15562: 15554: 15539: 15534: 15526: 15511:Sapphire Rapids 15509: 15508: 15502: 15486: 15481: 15473: 15444: 15439: 15431: 15414: 15413: 15397: 15396: 15395: 15392: 15387: 15386: 15383: 15375: 15350: 15349: 15344: 15327: 15326: 15321: 15311: 15304: 15296: 15290: 15287: 15279: 15272: 15253: 15252: 15247: 15241: 15234: 15216: 15210: 15201: 15186: 15180: 15171: 15167: 15136: 15127: 15122: 15121: 15114: 15110: 15106: 15105: 15101: 15097: 15095: 15091: 15086: 15082: 15080: 15076: 15074: 15070: 15060: 15056: 15052: 15050: 15046: 15037: 15028: 15019: 15014: 15013: 15008: 15007: 15005: 15000: 14999: 14994: 14993: 14991: 14982: 14981: 14977: 14975: 14971: 14964: 14956: 14952: 14948: 14946: 14942: 14931: 14927: 14925: 14921: 14914: 14910: 14908: 14904: 14850: 14848: 14844: 14839: 14835: 14833: 14829: 14822: 14820: 14816: 14806: 14802: 14801: 14797: 14790: 14786: 14782: 14780: 14776: 14769: 14765: 14761: 14757: 14755: 14748: 14741: 14739: 14735: 14681:3 (EXITAC) 14649: 14647: 14643: 14636: 14632: 14630: 14626: 14572: 14570: 14566: 14523: 14495: 14493: 14489: 14482: 14478: 14476: 14472: 14470: 14466: 14459: 14455: 14449: 14445: 14438: 14436: 14432: 14427: 14424: 14420: 14418: 14414: 14407: 14403: 14399: 14395: 14393: 14386: 14371: 14367: 14365: 14361: 14354: 14345: 14343: 14339: 14332: 14328: 14326: 14322: 14315: 14313: 14309: 14307: 14303: 14295: 14291: 14286: 14282: 14277: 14273: 14268: 14264: 14259: 14255: 14250: 14246: 14241: 14237: 14231: 14227: 14223: 14219: 14215: 14211: 14207: 14205: 14201: 14197:is serializing. 14194: 14192: 14188: 14187:followed by an 14184: 14180: 14176: 14168: 14167:On Intel CPUs, 14166: 14162: 14158: 14154: 14152: 14148: 14141: 14137: 14133: 14131: 14123: 14119: 14114:also acts as a 14111: 14106: 14098: 14096: 14092: 14088: 14084: 14082: 14078: 14071: 14067: 14063: 14059: 14055: 14054: 14050: 14046: 14042: 14038: 14034: 14030: 14028: 14024: 14020: 14016: 14014: 14010: 14003: 13999: 13995: 13993: 13984: 13976: 13974: 13957: 13940: 13931: 13919: 13904: 13899: 13891: 13875: 13870: 13855: 13849: 13848: 13840: 13824: 13819: 13803: 13802: 13801: 13798: 13794:MOVDIRI m64,r64 13793: 13792: 13790:MOVDIRI m32,r32 13789: 13781: 13765: 13760: 13755: 13749: 13738: 13733: 13725: 13709: 13704: 13699: 13684:NFx 66 0F AE /6 13683: 13682: 13677: 13669: 13651: 13646: 13638: 13633: 13628: 13623: 13608: 13603: 13595: 13579: 13575:Knights Landing 13573: 13562: 13557: 13549: 13533: 13528: 13515: 13513: 13508:NFx 66 0F AE /7 13507: 13501: 13500: 13492: 13476: 13470: 13465: 13457: 13452: 13447: 13434: 13428: 13423: 13415: 13414:Repurposes the 13413: 13406: 13390: 13383: 13382: 13381: 13378: 13373: 13372: 13368: 13367: 13359: 13354: 13349: 13336: 13332: 13325: 13324: 13323: 13320: 13315: 13314: 13310: 13309: 13301: 13281: 13275: 13274: 13266: 13261: 13256: 13249: 13248: 13233: 13227: 13226: 13218: 13202: 13197: 13192: 13174: 13169: 13153: 13137: 13136: 13131: 13122:NFx 0F 38 F1 /r 13121: 13116: 13115: 13112: 13104: 13103: 13098: 13090: 13085: 13080: 13075: 13061:NFx 0F 38 F0 /r 13060: 13055: 13054: 13051: 13044:byte order swap 13039: 13021: 13020: 13017: 13012: 13011: 13008: 12998: 12997: 12994: 12989: 12988: 12985: 12975: 12974: 12971: 12966: 12965: 12962: 12954: 12949: 12944: 12929: 12928: 12925: 12920: 12919: 12916: 12910: 12906: 12891: 12887:CRC32 r64,r/m64 12886: 12879: 12875:CRC32 r32,r/m32 12874: 12873: 12871:CRC32 r32,r/m16 12870: 12862: 12857: 12837: 12832: 12824: 12807: 12802: 12794: 12789: 12774: 12769: 12768: 12765: 12754: 12738: 12733: 12728: 12717: 12711: 12706: 12694: 12678: 12673: 12663: 12656: 12649: 12648: 12643: 12633: 12629: 12613: 12611: 12607: 12601: 12596: 12595: 12592: 12584: 12579: 12574: 12569: 12558: 12552: 12546: 12545: 12544: 12541: 12533: 12517: 12508:cache hierarchy 12505: 12499: 12493: 12492: 12484: 12470: 12464: 12459: 12449: 12448: 12445: 12440: 12439: 12436: 12426: 12421: 12413: 12408: 12403: 12388: 12383: 12375: 12355: 12350: 12340: 12335: 12325: 12320: 12310: 12305: 12297: 12292: 12285: 12284: 12278: 12266: 12260: 12255: 12247: 12217: 12208: 12203: 12202: 12193: 12189: 12187: 12183: 12179: 12175: 12161: 12157: 12152: 12148: 12141: 12137: 12135: 12131: 12116: 12115: 12114: 12111: 12106: 12105: 12102: 12094: 12089: 12074: 12073: 12070: 12065: 12064: 12061: 12053: 12037: 12032: 12017: 12016: 12013: 12008: 12007: 12004: 11996: 11980: 11975: 11970: 11965: 11959: 11950: 11946: 11942: 11940: 11934: 11933: 11930: 11924: 11923: 11922: 11919: 11911: 11894: 11888: 11883: 11877: 11871: 11866: 11855: 11854: 11853: 11850: 11845: 11844: 11841: 11833: 11828: 11823: 11818: 11803: 11802: 11799: 11794: 11793: 11790: 11782: 11754: 11750:XSAVE Extension 11737: 11726: 11721: 11720: 11714: 11710: 11703: 11699: 11698: 11691: 11684: 11680: 11678: 11671: 11659: 11654: 11653: 11648: 11647: 11643: 11639: 11633: 11628: 11618: 11613: 11595: 11590: 11582: 11580: 11573: 11555: 11550: 11540: 11535: 11524: 11523: 11517: 11516: 11503: 11498: 11487: 11486: 11481: 11471: 11466: 11456: 11451: 11441: 11436: 11426: 11421: 11411: 11406: 11399: 11394: 11386: 11380: 11369: 11364: 11358: 11355: 11348: 11298: 11280: 11279: 11274: 11267:Sapphire Rapids 11265: 11256: 11255: 11250: 11242: 11226: 11220: 11215: 11205: 11199: 11197: 11188: 11182: 11177: 11169: 11150: 11143: 11142: 11137: 11126: 11125: 11120: 11107: 11102: 11095:Sapphire Rapids 11076: 11061: 11060: 11059: 11053: 11047: 11046: 11045: 11042: 11031: 11001: 10995: 10990: 10989: 10981: 10977: 10975: 10971: 10964: 10960: 10958: 10954: 10947: 10943: 10939: 10935: 10931: 10927: 10925: 10921: 10914: 10910: 10906: 10902: 10900: 10896: 10881: 10879: 10875: 10873: 10869: 10865: 10861: 10857: 10855: 10851: 10835: 10834: 10833: 10828: 10816: 10815: 10814: 10809: 10801: 10797: 10793: 10789: 10787: 10779: 10778: 10777: 10772: 10757: 10756: 10755: 10749: 10748: 10743: 10737: 10733: 10725: 10724: 10723: 10718: 10713: 10707: 10703: 10699: 10691: 10690: 10689: 10684: 10676: 10672: 10668: 10664: 10660: 10652: 10651: 10650: 10645: 10637: 10632: 10626: 10625: 10616: 10615: 10614:. Equivalent to 10611: 10607: 10603: 10596: 10595: 10590: 10582: 10567: 10566: 10560: 10555: 10548: 10547: 10541: 10536: 10529: 10528: 10522: 10517: 10512: 10509:. Equivalent to 10506: 10502: 10498: 10494: 10488: 10484:BEXTR ra,r/m,rb 10483: 10476: 10470: 10465: 10457: 10456: 10452:TZCNT r64,r/m64 10451: 10443: 10438: 10433: 10428: 10418: 10416: 10410: 10406:TZCNT r32,r/m32 10405: 10404: 10402:TZCNT r16,r/m16 10401: 10393: 10377: 10376: 10372:LZCNT r64,r/m64 10371: 10363: 10361: 10355: 10351:LZCNT r32,r/m32 10350: 10349: 10347:LZCNT r16,r/m16 10346: 10339: 10334: 10326: 10321: 10316: 10311: 10296: 10290: 10289: 10288: 10285: 10277: 10251: 10235: 10229: 10224: 10223: 10215: 10214: 10210: 10206: 10204: 10200: 10193: 10191: 10179: 10177: 10173: 10166: 10164: 10160: 10143: 10138: 10128: 10123: 10113: 10108: 10098: 10093: 10083: 10078: 10068: 10063: 10053: 10047: 10046: 10036: 10031: 10018: 10013: 10003: 9998: 9992: 9985: 9984: 9979:CMPXCHG16B m128 9978: 9977: 9967: 9962: 9952: 9947: 9934: 9929: 9903: 9899: 9888: 9881: 9874: 9870: 9863: 9855: 9850: 9849: 9842: 9838: 9836: 9832: 9825: 9821: 9819: 9815: 9804: 9800: 9798: 9794: 9789: 9785: 9781: 9777: 9775: 9771: 9760: 9752: 9748: 9744: 9742: 9733: 9726: 9724: 9720: 9716: 9712: 9710: 9703: 9695: 9693: 9689: 9684: 9680: 9676: 9675: 9671: 9664: 9660: 9658: 9654: 9643: 9638: 9637: 9633: 9629: 9625: 9620: 9619: 9617: 9613: 9601: 9600: 9595: 9594: 9592: 9585: 9578: 9574: 9569: 9568: 9566: 9562: 9546: 9545: 9540: 9539: 9534: 9533: 9531: 9524: 9517: 9512: 9511: 9507: 9505: 9501: 9490: 9486: 9482: 9480: 9475: 9474: 9469: 9468: 9464: 9460: 9455: 9448: 9437: 9432: 9431: 9429: 9425: 9420: 9416: 9409: 9404: 9403: 9399: 9394: 9393: 9389: 9388: 9384: 9371: 9367: 9354: 9344: 9334: 9324: 9314: 9304: 9294: 9284: 9267: 9263: 9256: 9251: 9250: 9245: 9244: 9242: 9238: 9231: 9218: 9216: 9212: 9210: 9206: 9196: 9192: 9178: 9175:"Less or Equal" 9174: 9160: 9156: 9142: 9141:SF≠OF: "Less", 9128: 9124: 9110: 9096: 9071: 9057: 9053: 9039: 9035: 9010: 9006: 9002: 8988: 8974: 8925: 8918: 8916: 8912: 8905: 8903: 8899: 8889: 8885: 8884: 8880: 8873: 8871: 8864: 8860: 8859: 8855: 8846: 8828: 8820: 8788: 8782: 8778: 8771: 8767: 8765: 8761: 8757: 8752: 8748: 8746: 8739: 8732: 8730: 8721: 8701: 8700: 8699: 8695: 8684: 8680: 8678: 8674: 8667: 8663: 8661: 8657: 8650: 8648: 8644: 8637: 8636: 8629: 8618: 8616: 8612: 8606: 8602: 8595: 8593: 8592: 8590: 8586: 8582: 8580: 8576: 8569: 8564: 8560: 8547: 8537: 8533: 8527: 8521: 8511: 8501: 8491: 8481: 8471: 8457: 8453: 8446: 8442: 8434: 8432: 8428: 8413: 8407: 8402: 8393: 8386: 8385: 8379: 8373: 8353: 8348: 8337: 8331: 8326: 8318: 8298: 8293: 8284: 8280: 8275: 8265: 8264: 8260: 8255: 8254: 8250: 8249: 8245: 8238: 8232: 8231: 8230: 8226: 8217: 8194: 8189: 8188: 8184: 8175: 8164: 8163: 8139: 8138: 8133: 8132: 8128: 8115: 8109: 8098: 8097: 8091: 8074: 8073: 8067: 8066: 8057: 8051: 8045: 8039: 8033: 8026: 8011: 8006: 7993: 7987: 7981: 7971: 7969: 7963: 7939: 7934: 7925: 7919: 7913: 7903: 7901: 7895: 7881: 7879: 7869: 7868: 7862: 7861: 7852: 7846: 7840: 7834: 7828: 7822: 7816: 7801: 7793: 7782: 7775: 7766: 7760: 7754: 7748: 7742: 7736: 7729: 7725: 7709: 7704: 7687: 7682: 7673: 7667: 7656: 7655: 7649: 7643: 7623: 7618: 7583: 7570: 7569: 7562: 7558: 7554: 7552: 7548: 7541: 7539: 7535: 7530: 7526: 7522: 7520: 7513: 7506: 7505: 7501: 7500: 7496: 7489: 7485: 7481: 7479: 7475: 7467: 7466: 7461: 7460: 7455: 7454: 7450: 7448: 7441: 7425: 7423: 7419: 7404: 7403: 7398: 7388: 7383: 7368:Invalidate the 7362: 7361: 7356: 7349: 7344: 7343: 7340: 7331: 7319: 7318: 7313: 7305: 7304: 7299:CMPXCHG r/m,r32 7298: 7297: 7296: 7293:CMPXCHG r/m,r16 7292: 7291: 7282: 7276: 7272: 7262: 7261: 7257:CMPXCHG r/m8,r8 7256: 7244: 7241: 7232: 7231: 7226: 7205: 7197: 7196: 7191: 7187: 7180: 7176: 7174: 7167: 7160: 7156: 7152: 7150: 7146: 7142: 7140: 7133: 7128: 7124: 7115: 7110: 7109: 7102: 7097: 7096: 7090: 7085: 7084: 7077: 7076: 7072: 7068: 7066: 7062: 7057: 7053: 7049: 7045: 7043: 7039: 7032: 7030: 7023: 7016: 7012: 7011: 7008:non-serializing 7007: 7003: 6999: 6998: 6986: 6982: 6978: 6974: 6968: 6964: 6957: 6953: 6951: 6940: 6933: 6925:MOV CRx/DRx/TRx 6924: 6923: 6919: 6911: 6907: 6903: 6899: 6897: 6882: 6871: 6867: 6863: 6859: 6857: 6853: 6846: 6838: 6836: 6832: 6822: 6818: 6804: 6801:"Less or Equal" 6800: 6786: 6782: 6768: 6767:SF≠OF: "Less", 6754: 6750: 6736: 6722: 6697: 6683: 6679: 6665: 6661: 6636: 6632: 6628: 6614: 6600: 6552: 6544: 6536: 6529: 6527: 6520: 6513: 6509: 6508: 6504: 6500: 6498: 6491: 6484: 6480: 6476: 6471: 6470: 6466: 6464: 6460: 6455: 6451: 6447: 6446: 6439: 6432: 6428: 6424: 6420: 6416: 6411: 6410: 6406: 6404: 6400: 6393: 6389: 6385: 6381: 6377: 6375: 6366: 6349: 6345: 6341: 6337: 6335: 6324: 6307: 6302: 6296: 6286: 6281: 6271: 6266: 6259: 6254: 6247: 6242: 6235: 6230: 6221: 6213: 6208: 6189: 6184: 6182: 6180: 6166: 6161: 6147: 6142: 6129: 6124: 6110: 6105: 6096: 6092: 6088: 6080: 6075: 6058: 6053: 6042: 6036: 6035: 6034: 6031: 6024: 6018: 6017: 6016: 6013: 5996: 5991: 5990: 5987: 5980: 5975: 5968: 5963: 5956: 5951: 5941: 5936: 5929: 5924: 5911: 5906: 5892: 5887: 5871: 5870: 5864: 5856: 5855: 5849: 5838: 5837: 5832: 5825: 5820: 5806: 5802:MOVSX reg, r/m8 5801: 5794: 5789: 5776: 5772:MOVZX reg, r/m8 5771: 5760: 5756:SHRD r/m, r, CL 5755: 5748: 5747: 5743: 5741: 5731: 5730: 5724: 5723: 5716: 5712:SHLD r/m, r, CL 5711: 5704: 5703: 5699: 5697: 5688: 5683: 5669: 5668: 5663: 5646: 5645: 5640: 5626: 5621: 5608: 5603: 5593: 5588: 5575: 5570: 5560: 5555: 5538: 5533: 5523: 5518: 5491: 5486: 5462: 5461: 5454: 5450: 5446: 5438: 5436: 5432: 5425: 5421: 5417: 5413: 5411: 5403: 5399: 5397: 5393: 5386: 5382: 5380: 5376: 5369: 5365: 5363: 5359: 5352: 5348: 5344: 5340: 5336: 5332: 5328: 5324: 5322: 5318: 5314: 5310: 5306: 5302: 5300: 5296: 5289: 5285: 5281: 5279: 5275: 5262: 5258: 5250: 5246: 5244: 5240: 5233: 5229: 5225: 5221: 5217: 5213: 5209: 5205: 5203: 5199: 5195: 5191: 5187: 5183: 5179: 5175: 5173: 5171: 5167: 5160: 5158: 5156: 5152: 5150: 5146: 5135: 5118: 5112: 5107: 5100: 5092: 5087: 5077: 5065: 5060: 5053: 5045: 5040: 5033: 5025: 5020: 5013: 5001: 5000: 4994: 4993: 4986: 4979: 4971: 4966: 4956: 4945: 4940: 4926: 4921: 4915: 4910: 4900: 4895: 4889: 4884: 4877: 4874: 4866: 4861: 4854: 4851: 4843: 4838: 4831: 4827:ES: := DS: 4826: 4820: 4815: 4808: 4804:ES: := EAX 4803: 4797: 4792: 4782: 4778:EAX := DS: 4777: 4771: 4766: 4729: 4721: 4717: 4710: 4706: 4683: 4679: 4671: 4667: 4663: 4657: 4653: 4649: 4642: 4638: 4620: 4612: 4611: 4604: 4602: 4595: 4584: 4582: 4578: 4571: 4569: 4565: 4558: 4546: 4544: 4540: 4533: 4529: 4525: 4519: 4515: 4506: 4496: 4482: 4475: 4471: 4467: 4465: 4456: 4450: 4446: 4442: 4438: 4434: 4430: 4423: 4421: 4417: 4410: 4406: 4398: 4394: 4392: 4384: 4380: 4379:– however, the 4374: 4370: 4359: 4355: 4351: 4347: 4343: 4341: 4328: 4317: 4313: 4309: 4305: 4303: 4298: 4294: 4290: 4286: 4284: 4273: 4261: 4255: 4250: 4236: 4230: 4222: 4208: 4203: 4192: 4191: 4186: 4176: 4171: 4156: 4154: 4144: 4139: 4128: 4123:Privilege Level 4116: 4110: 4109: 4095: 4090: 4077: 4072: 4062: 4057: 4047: 4043:SIDT m16&32 4042: 4026: 4021:SGDT m16&32 4020: 4019: 3998: 3990: 3977: 3972: 3962: 3957: 3947: 3942: 3924: 3918: 3913:LIDT m16&32 3912: 3911: 3891: 3887:LGDT m16&32 3886: 3847: 3830: 3829: 3826: 3823: 3820: 3817: 3814: 3811: 3808: 3805: 3790: 3774: 3773: 3770: 3767: 3764: 3761: 3758: 3755: 3752: 3749: 3746: 3743: 3740: 3737: 3734: 3731: 3728: 3725: 3722: 3719: 3716: 3713: 3710: 3707: 3704: 3701: 3698: 3695: 3692: 3689: 3686: 3683: 3680: 3677: 3674: 3671: 3653: 3640: 3639: 3636: 3633: 3630: 3627: 3609: 3604: 3603: 3600: 3597: 3594: 3591: 3588: 3585: 3582: 3579: 3576: 3573: 3570: 3567: 3564: 3561: 3558: 3555: 3552: 3549:equivalent to: 3538: 3533: 3532: 3529: 3526: 3523: 3520: 3517: 3514: 3511: 3508: 3505: 3502: 3499: 3496: 3493: 3490: 3487: 3484: 3481: 3478:equivalent to: 3467: 3457: 3456: 3453: 3450: 3447: 3444: 3441: 3438: 3435: 3432: 3429: 3426: 3423: 3420: 3417:equivalent to: 3406: 3390: 3380: 3379: 3376: 3373: 3370: 3367: 3364: 3361: 3358: 3355: 3352: 3349: 3346: 3343:equivalent to: 3332: 3313: 3294: 3275: 3263: 3251: 3247: 3243: 3239: 3235: 3231: 3226: 3222: 3211: 3204: 3190: 3183: 3179: 3175: 3171: 3152: 3149: 3146: 3143: 3140: 3137: 3134: 3131: 3122: 3115: 3100: 3093: 3089: 3085: 3081: 3077: 3073: 3068: 3064: 3053: 3045: 3041: 3037: 3033: 3029: 3025: 3020: 3016: 3007: 3000: 2994: 2991: 2988: 2985: 2982: 2979: 2976: 2973: 2970: 2967: 2964: 2961: 2958: 2955: 2952: 2949: 2946: 2943: 2940: 2937: 2934: 2931: 2928: 2921: 2917: 2911: 2904: 2898: 2895: 2892: 2889: 2886: 2883: 2880: 2877: 2874: 2871: 2868: 2865: 2862: 2859: 2856: 2853: 2850: 2847: 2844: 2841: 2838: 2835: 2832: 2825: 2821: 2815: 2808: 2803: 2793: 2786: 2781: 2773: 2766: 2761: 2753: 2746: 2742: 2738: 2734: 2724: 2717: 2713: 2709: 2705: 2692: 2685: 2677: 2673: 2669: 2663: 2656: 2648: 2644: 2640: 2634: 2626: 2622: 2618: 2614: 2610: 2606: 2595: 2594: 2585: 2578: 2574: 2570: 2566: 2561: 2557: 2548: 2541: 2537: 2533: 2529: 2524: 2520: 2508: 2501: 2491: 2484: 2480: 2476: 2472: 2462: 2455: 2451: 2447: 2443: 2433: 2426: 2422: 2412: 2405: 2401: 2391: 2376: 2369: 2365: 2359: 2350: 2343: 2339: 2335: 2331: 2321: 2314: 2310: 2306: 2302: 2292: 2285: 2279: 2276: 2273: 2270: 2267: 2258: 2251: 2247: 2243: 2239: 2235: 2231: 2227: 2223: 2219: 2213: 2210: 2207: 2204: 2201: 2198: 2195: 2186: 2179: 2174: 2162: 2155: 2151: 2147: 2143: 2139: 2135: 2131: 2125: 2121: 2120:POP CS (opcode 2117: 2106: 2099: 2095: 2091: 2087: 2082: 2078: 2074: 2070: 2061: 2053: 2049: 2045: 2041: 2037: 2033: 2027: 2021: 2018: 2015: 2003: 1996: 1992: 1986: 1983: 1980: 1977: 1974: 1971: 1959: 1952: 1936: 1929: 1925: 1919: 1916: 1913: 1910: 1907: 1904: 1901: 1898: 1895: 1892: 1880: 1873: 1869: 1864: 1860: 1851: 1844: 1841: 1840: 1837: 1834: 1831: 1828: 1825: 1822: 1819: 1816: 1813: 1810: 1807: 1804: 1801: 1798: 1795: 1792: 1789: 1786: 1783: 1780: 1777: 1774: 1771: 1768: 1765: 1762: 1759: 1756: 1753: 1750: 1747: 1744: 1741: 1738: 1735: 1732: 1729: 1726: 1723: 1715: 1711: 1705: 1698: 1694: 1693: 1690: 1687: 1684: 1681: 1678: 1675: 1672: 1669: 1666: 1663: 1660: 1657: 1654: 1651: 1648: 1645: 1642: 1639: 1636: 1633: 1630: 1627: 1624: 1621: 1618: 1615: 1612: 1609: 1606: 1603: 1600: 1597: 1594: 1591: 1588: 1585: 1582: 1579: 1576: 1568: 1564: 1558: 1551: 1547: 1542: 1538: 1529: 1522: 1518: 1512: 1509: 1506: 1503: 1500: 1497: 1494: 1491: 1488: 1485: 1480: 1471: 1470: 1466: 1459: 1453: 1450: 1447: 1444: 1441: 1438: 1435: 1432: 1429: 1426: 1423: 1420: 1417: 1414: 1411: 1408: 1405: 1402: 1399: 1392: 1388: 1382: 1375: 1369: 1366: 1363: 1360: 1357: 1354: 1351: 1348: 1345: 1342: 1339: 1336: 1333: 1330: 1327: 1324: 1321: 1318: 1315: 1308: 1304: 1298: 1291: 1280: 1273: 1263: 1256: 1244: 1237: 1227: 1220: 1210: 1203: 1199: 1195: 1191: 1179: 1172: 1162: 1154: 1150: 1146: 1142: 1136: 1125: 1118: 1108: 1101: 1091: 1084: 1080: 1065: 1058: 1054: 1050: 1046: 1036: 1029: 1025: 1021: 1017: 1012: 1008: 1004: 1000: 996:Input from port 991: 983: 979: 975: 971: 967: 962: 958: 949: 942: 938: 933: 929: 925: 921: 912: 905: 893: 886: 882: 869: 862: 858: 853: 849: 845: 841: 829: 822: 818: 814: 810: 800: 793: 781: 774: 757: 750: 740: 733: 725: 721: 717: 711: 704: 696: 692: 688: 682: 674: 670: 666: 662: 658: 654: 644: 637: 632: 624: 617: 612: 599: 592: 587: 576: 569: 564: 553: 546: 541: 533: 526: 522: 518: 514: 508: 505: 502: 491: 483: 479: 475: 471: 467: 463: 459:r &= r/imm; 458: 454: 443: 435: 431: 427: 423: 419: 415: 410: 406: 397: 389: 385: 381: 377: 373: 369: 361: 353: 346: 336: 329: 318: 311: 301: 298: 286: 279: 263: 248: 246: 210: 200:(also known as 142: 136: 113:microprocessors 105:instruction set 94: 17: 12: 11: 5: 26630: 26620: 26619: 26614: 26597: 26596: 26594: 26593: 26588: 26583: 26578: 26573: 26568: 26563: 26561:Memory address 26558: 26557: 26556: 26551: 26546: 26544:Interrupt flag 26541: 26539:Direction flag 26536: 26526: 26520: 26518: 26512: 26511: 26509: 26508: 26502: 26496: 26490: 26484: 26478: 26472: 26469:Flat Assembler 26466: 26460: 26458: 26452: 26451: 26449: 26448: 26443: 26441:Microassembler 26438: 26433: 26428: 26423: 26418: 26413: 26407: 26405: 26401: 26400: 26395: 26394: 26387: 26380: 26372: 26366: 26365: 26355: 26350: 26345: 26340: 26334: 26326: 26325:External links 26323: 26322: 26321: 26298: 26297: 26269: 26264:Bruce Dawson, 26257: 26245: 26233: 26219: 26206: 26193: 26180: 26167: 26154: 26141: 26128: 26116: 26099: 26069: 26039: 26026: 26024:on 5 May 2022. 26010: 25997: 25980: 25978:, 25 Jun 2017. 25962: 25949: 25936: 25934:on 5 Feb 2005. 25911: 25909:, May 15, 2023 25898: 25885: 25872: 25859: 25857:, Jan 22, 2018 25846: 25829: 25812: 25795: 25782: 25780:on 6 Nov 2022. 25768:, also covers 25757: 25755:on 9 May 2005. 25732: 25715: 25702: 25689: 25687:, 26 Feb 2019. 25676: 25663: 25651: 25639: 25626: 25605: 25575: 25562: 25549: 25537: 25524: 25511: 25498: 25496:, May 7, 2002. 25485: 25468: 25451: 25438: 25417: 25404: 25385: 25368: 25342: 25313: 25283: 25255: 25231: 25206: 25189: 25156: 25127: 25114: 25097: 25084: 25071: 25069:on 7 Apr 2022. 25054: 25037: 25035:on 9 May 2024. 25020: 25018:, 10 Nov 2009. 25003: 24986: 24969: 24952: 24940: 24916: 24914:on 5 Nov 2023. 24899: 24882: 24865: 24848: 24831: 24814: 24801: 24789: 24780: 24763: 24760:on 2012-03-12. 24745: 24732: 24715: 24698: 24685: 24671: 24648: 24625: 24600: 24578: 24561: 24547:Jeff Parsons, 24540: 24528: 24510: 24497: 24480: 24478:on 6 June 2018 24459: 24457:on 21 feb 2001 24439: 24422: 24416:sandpile.org, 24409: 24399:Raymond Chen, 24392: 24390:on Jan 4, 2018 24375: 24373:on 8 Dec 2023. 24358: 24341: 24322: 24320:on Apr 22,2022 24305: 24292: 24280: 24263: 24247: 24245:on 8 Dec 2023. 24230: 24213: 24193: 24187:, 4 May 2017. 24176: 24155: 24134: 24133: 24131: 24128: 24127: 24126: 24121: 24116: 24111: 24106: 24101: 24096: 24089: 24086: 24078:Main article: 24075: 24072: 24067:Main article: 24064: 24061: 24056:Main article: 24053: 24050: 24045:Main article: 24042: 24036: 24033: 24032: 24015: 23963: 23925: 23904: 23847: 23830: 23827: 23821: 23818: 23815: 23810: 23806: 23802: 23797: 23794: 23789: 23785: 23777: 23773: 23736: 23695: 23675: 23670:Not including 23663: 23634:Protected Mode 23620: 23619: 23616: 23615: 23610: 23604: 23603: 23598: 23592: 23591: 23586: 23581: 23577: 23576: 23574: 23567: 23566: 23564: 23561: 23560: 23553: 23546: 23539: 23535: 23534: 23527: 23520: 23515: 23511: 23510: 23501: 23486: 23485: 23483: 23480: 23479: 23474: 23467: 23459: 23458: 23453: 23448: 23441: 23440: 23435: 23430: 23422: 23421: 23416: 23411: 23391: 23390: 23387: 23382: 23376: 23375: 23370: 23365: 23357: 23356: 23353: 23348: 23342: 23341: 23338: 23333: 23327: 23326: 23323: 23318: 23312: 23311: 23308:below or equal 23306: 23301: 23295: 23294: 23291: 23286: 23280: 23279: 23276: 23271: 23263: 23256: 23255: 23246: 23239: 23238: 23236: 23233: 23232: 23227: 23222: 23210: 23206: 23203: 23200: 23197: 23194: 23191: 23188: 23184: 23180: 23177: 23174: 23171: 23168: 23165: 23162: 23159: 23147: 23146: 23141: 23136: 23124: 23120: 23117: 23114: 23111: 23108: 23105: 23102: 23098: 23094: 23091: 23088: 23085: 23082: 23079: 23076: 23073: 23061: 23060: 23047: 23043: 23039: 23035: 23031: 23028: 23025: 23022: 23019: 23015: 23004: 22999: 22994: 22989:, after which 22971: 22967: 22964: 22961: 22958: 22955: 22952: 22949: 22945: 22941: 22938: 22935: 22932: 22911: 22907: 22904: 22901: 22898: 22895: 22892: 22889: 22885: 22881: 22878: 22875: 22872: 22858: 22857: 22852: 22847: 22840: 22839: 22834: 22829: 22825: 22824: 22819: 22814: 22810: 22809: 22806: 22801: 22796: 22782: 22781: 22775:Source operand 22772: 22765: 22764: 22762: 22759: 22758: 22753: 22748: 22743: 22739: 22738: 22733: 22728: 22723: 22721:Protected Mode 22716: 22715: 22710: 22703: 22702: 22700: 22697: 22696: 22693: 22690: 22687: 22680: 22677: 22674: 22673: 22660: 22658: 22657: 22645: 22642: 22631: 22619: 22616: 22605: 22591: 22588: 22560: 22557: 22554: 22551: 22548: 22543: 22540: 22537: 22534: 22531: 22508: 22488: 22467: 22454: 22437: 22433: 22429: 22426: 22423: 22420: 22417: 22414: 22411: 22406: 22402: 22398: 22378: 22365: 22321: 22317: 22292: 22267: 22260: 22259: 22256: 22253: 22250: 22246: 22245: 22239: 22236: 22233: 22229: 22228: 22225: 22222: 22219: 22215: 22214: 22211: 22208: 22205: 22201: 22200: 22197: 22194: 22191: 22187: 22186: 22183: 22180: 22177: 22173: 22172: 22167: 22164: 22161: 22157: 22156: 22153: 22150: 22147: 22143: 22142: 22139: 22136: 22133: 22116: 22091: 22078: 22064: 22002: 21986: 21955: 21943: 21922: 21887: 21823: 21819: 21818: 21790: 21745: 21727: 21726: 21723: 21722: 21717: 21710: 21706: 21705: 21700: 21693: 21689: 21688: 21683: 21673: 21669: 21668: 21661: 21656: 21652: 21651: 21646: 21641: 21637: 21636: 21631: 21626: 21622: 21621: 21616: 21611: 21607: 21606: 21604: 21600: 21599: 21597: 21594: 21593: 21580: 21576: 21573: 21568: 21562: 21558: 21555: 21552: 21549: 21546: 21543: 21540: 21536: 21532: 21529: 21523: 21520: 21513: 21488: 21481: 21478: 21472: 21469: 21465: 21461: 21457: 21453: 21450: 21447: 21444: 21441: 21437: 21424: 21419: 21414: 21401: 21397: 21394: 21391: 21388: 21385: 21382: 21379: 21375: 21371: 21366: 21362: 21358: 21355: 21352: 21349: 21346: 21343: 21340: 21337: 21334: 21331: 21328: 21325: 21313: 21312: 21298: 21295: 21291: 21287: 21284: 21281: 21278: 21275: 21271: 21267: 21263: 21259: 21256: 21253: 21250: 21247: 21243: 21230: 21225: 21220: 21207: 21201: 21198: 21195: 21192: 21189: 21184: 21181: 21178: 21175: 21172: 21166: 21162: 21159: 21156: 21153: 21150: 21147: 21144: 21141: 21126: 21125: 21112: 21108: 21104: 21100: 21096: 21093: 21090: 21087: 21084: 21080: 21076: 21073: 21050: 21047: 21042: 21038: 21034: 21031: 21028: 21025: 21022: 21018: 21014: 21011: 21000: 20995: 20990: 20989:is always 1.0 20962: 20959: 20954: 20950: 20946: 20943: 20940: 20937: 20934: 20930: 20926: 20923: 20903: 20902: 20899: 20894: 20889: 20876: 20872: 20869: 20866: 20863: 20860: 20856: 20852: 20847: 20843: 20839: 20836: 20833: 20830: 20827: 20824: 20821: 20818: 20815: 20812: 20809: 20806: 20790: 20789: 20778: 20775: 20772: 20769: 20766: 20763: 20760: 20757: 20754: 20751: 20728: 20725: 20720: 20717: 20714: 20711: 20708: 20705: 20702: 20699: 20688: 20683: 20678: 20667: 20664: 20659: 20656: 20653: 20650: 20647: 20643: 20639: 20636: 20633: 20630: 20627: 20624: 20612: 20611: 20608:Source operand 20606: 20602: 20601: 20599: 20596: 20595: 20592: 20589: 20584: 20579: 20565: 20561: 20558: 20555: 20552: 20549: 20545: 20539: 20536: 20533: 20530: 20527: 20524: 20521: 20518: 20515: 20512: 20509: 20506: 20503: 20500: 20497: 20494: 20491: 20488: 20482: 20478: 20475: 20472: 20469: 20466: 20463: 20460: 20457: 20454: 20451: 20448: 20445: 20433: 20432: 20429: 20426: 20421: 20416: 20412: 20411: 20408: 20405: 20400: 20395: 20388: 20387: 20384: 20381: 20376: 20371: 20360: 20357: 20354: 20351: 20348: 20345: 20342: 20339: 20336: 20333: 20330: 20327: 20324: 20321: 20318: 20315: 20312: 20309: 20306: 20286: 20280: 20277: 20274: 20271: 20268: 20263: 20260: 20257: 20254: 20251: 20245: 20239: 20236: 20233: 20230: 20227: 20224: 20221: 20218: 20215: 20212: 20209: 20206: 20203: 20200: 20197: 20194: 20191: 20188: 20183: 20180: 20164: 20163: 20160: 20157: 20152: 20147: 20142:, after which 20136:.   20125: 20122: 20118: 20115: 20112: 20108: 20105: 20077: 20074: 20071: 20068: 20065: 20062: 20057: 20053: 20049: 20046: 20024: 20023: 20020: 20017: 20012: 20007: 20001: 20000: 19997: 19994: 19989: 19984: 19980: 19979: 19976: 19973: 19968: 19963: 19959: 19958: 19955: 19952: 19947: 19942: 19938: 19937: 19932: 19927: 19923: 19922: 19917: 19911: 19910: 19907: 19904: 19899: 19894: 19890: 19889: 19884: 19878: 19877: 19874: 19871: 19866: 19861: 19857: 19856: 19851: 19845: 19844: 19841: 19838: 19833: 19828: 19824: 19823: 19818: 19812: 19811: 19808: 19805: 19800: 19795: 19791: 19790: 19785: 19779: 19778: 19775: 19772: 19767: 19762: 19758: 19757: 19752: 19746: 19745: 19742: 19739: 19734: 19729: 19725: 19724: 19719: 19713: 19712: 19709: 19706: 19701: 19696: 19692: 19691: 19686: 19680: 19679: 19676: 19673: 19668: 19663: 19659: 19658: 19653: 19648: 19644: 19643: 19640: 19637: 19632: 19627: 19623: 19622: 19614: 19613: 19605: 19604: 19599: 19593: 19592: 19587: 19581: 19580: 19577: 19574: 19569: 19564: 19560: 19559: 19556: 19553: 19548: 19543: 19539: 19538: 19535: 19532: 19527: 19525:FDIVP st(i),st 19522: 19518: 19517: 19514: 19511: 19506: 19501: 19497: 19496: 19493: 19490: 19485: 19483:FSUBP st(i),st 19480: 19476: 19475: 19472: 19469: 19464: 19462:FMULP st(i),st 19459: 19455: 19454: 19451: 19448: 19443: 19441:FADDP st(i),st 19438: 19434: 19433: 19428: 19423: 19419: 19418: 19410: 19409: 19404: 19398: 19397: 19392: 19386: 19385: 19382: 19379: 19374: 19369: 19368: 19367: 19356: 19355: 19350: 19348:FDIVR st(i),st 19344: 19343: 19338: 19336:FDIVR st,st(i) 19332: 19331: 19326: 19320: 19319: 19316: 19313: 19308: 19303: 19302: 19301: 19292: 19291: 19286: 19280: 19279: 19274: 19268: 19267: 19262: 19256: 19255: 19252: 19249: 19244: 19239: 19238: 19237: 19228: 19227: 19222: 19220:FSUBR st(i),st 19216: 19215: 19210: 19208:FSUBR st,st(i) 19204: 19203: 19198: 19192: 19191: 19188: 19185: 19180: 19175: 19174: 19173: 19164: 19163: 19158: 19152: 19151: 19146: 19140: 19139: 19134: 19128: 19127: 19124: 19121: 19116: 19111: 19110: 19109: 19100: 19099: 19094: 19088: 19087: 19082: 19076: 19075: 19070: 19064: 19063: 19060: 19057: 19052: 19047: 19046: 19045: 19036: 19035: 19030: 19024: 19023: 19018: 19012: 19011: 19006: 19000: 18999: 18996: 18993: 18988: 18983: 18982: 18981: 18972: 18971: 18966: 18961: 18957: 18956: 18953: 18950: 18945: 18940: 18936: 18935: 18932: 18929: 18924: 18919: 18915: 18914: 18909: 18903: 18902: 18897: 18891: 18890: 18887: 18884: 18879: 18874: 18870: 18869: 18864: 18858: 18857: 18854: 18851: 18846: 18841: 18837: 18836: 18831: 18825: 18824: 18819: 18813: 18812: 18809: 18806: 18801: 18796: 18792: 18791: 18786: 18781: 18777: 18776: 18768: 18767: 18759: 18758: 18755: 18752: 18747: 18742: 18738: 18737: 18732: 18727: 18714: 18711: 18708: 18704: 18701: 18689: 18688: 18683: 18678: 18665: 18662: 18659: 18655: 18650: 18646: 18633: 18632: 18627: 18622: 18609: 18606: 18603: 18599: 18594: 18590: 18577: 18576: 18571: 18566: 18553: 18550: 18547: 18543: 18538: 18534: 18521: 18520: 18517: 18514: 18509: 18504: 18494: 18493: 18488: 18483: 18479: 18478: 18475: 18472: 18467: 18462: 18458: 18457: 18451: 18450: 18444: 18443: 18436: 18430: 18429: 18426: 18423: 18418: 18412: 18411: 18406: 18400: 18399: 18396: 18393: 18388: 18383: 18379: 18378: 18375: 18372: 18367: 18361: 18360: 18355: 18349: 18348: 18345: 18342: 18337: 18332: 18328: 18327: 18322: 18316: 18315: 18310: 18304: 18303: 18298: 18292: 18291: 18288: 18285: 18280: 18275: 18271: 18270: 18265: 18260: 18256: 18255: 18253: 18250: 18249: 18244: 18239: 18234: 18230: 18229: 18224: 18219: 18214: 18210: 18209: 18206: 18201: 18196: 18192: 18191: 18186: 18181: 18174: 18170: 18169: 18164: 18159: 18152: 18148: 18147: 18144: 18139: 18134: 18130: 18129: 18124: 18119: 18114: 18110: 18109: 18104: 18099: 18094: 18090: 18089: 18084: 18079: 18074: 18070: 18069: 18066: 18061: 18056: 18052: 18051: 18046: 18041: 18036: 18032: 18031: 18026: 18022: 18021: 18019: 18016: 18015: 18012: 18009: 18006: 17999: 17992: 17982: 17979: 17976: 17975: 17955: 17948: 17947: 17944: 17940: 17939: 17936: 17932: 17931: 17928: 17897: 17877: 17868: 17842: 17798: 17797: 17794: 17793: 17784: 17779: 17773: 17772: 17767: 17764: 17759: 17754: 17749: 17748: 17747: 17744: 17741: 17736: 17735: 17732: 17731: 17726: 17723: 17713: 17708: 17703: 17702: 17701: 17698: 17695: 17690: 17689: 17686: 17685: 17680: 17677: 17669:Read selected 17667: 17662: 17657: 17656: 17655: 17652: 17649: 17644: 17643: 17640: 17639: 17634: 17631: 17628: 17623: 17616: 17615: 17614: 17611: 17608: 17603: 17602: 17599: 17598: 17582: 17577: 17571: 17570: 17565: 17562: 17555: 17550: 17545: 17544: 17543: 17540: 17537: 17532: 17531: 17528: 17527: 17524: 17517: 17509: 17508: 17503: 17500: 17497: 17492: 17487: 17486: 17485: 17478: 17475: 17470: 17469: 17466: 17465: 17462: 17457: 17454: 17451: 17446: 17439: 17436: 17433: 17432: 17409: 17388: 17384: 17383: 17377: 17374: 17370: 17369: 17363: 17360: 17356: 17355: 17349: 17346: 17342: 17341: 17340:SF≠OF: "Less" 17338: 17335: 17331: 17330: 17324: 17321: 17317: 17316: 17313: 17310: 17306: 17305: 17299: 17296: 17292: 17291: 17288: 17285: 17281: 17280: 17274: 17271: 17267: 17266: 17260: 17257: 17253: 17252: 17246: 17243: 17239: 17238: 17235: 17232: 17228: 17227: 17221: 17218: 17214: 17213: 17212:CF=1: "Below" 17210: 17207: 17203: 17202: 17200:"Not Overflow" 17196: 17193: 17189: 17188: 17185: 17182: 17178: 17177: 17170: 17167: 17134: 17105: 17081: 17077: 17076: 17073: 17069: 17068: 17065: 17061: 17060: 17057: 17035: 17010: 17006: 17005: 17002: 16998: 16997: 16996: 16995: 16992: 16986: 16982: 16981: 16978: 16957: 16934: 16886: 16869: 16857: 16839: 16832: 16831: 16826: 16822: 16821: 16816: 16812: 16811: 16807: 16806: 16801: 16797: 16796: 16793: 16776: 16749: 16733: 16720: 16719: 16716: 16712: 16711: 16708: 16704: 16703: 16700: 16696: 16695: 16691: 16690: 16687: 16670: 16658: 16649: 16648: 16645: 16641: 16640: 16636: 16635: 16632: 16628: 16627: 16623: 16622: 16619: 16615: 16614: 16611: 16607: 16606: 16603: 16599: 16598: 16594: 16593: 16590: 16586: 16585: 16582: 16578: 16577: 16574: 16570: 16569: 16566: 16562: 16561: 16558: 16554: 16553: 16550: 16533: 16512: 16505: 16504: 16501: 16497: 16496: 16492: 16491: 16488: 16484: 16483: 16480: 16476: 16475: 16472: 16468: 16467: 16464: 16460: 16459: 16455: 16454: 16451: 16450:F (EMODT) 16447: 16446: 16443: 16439: 16438: 16435: 16431: 16430: 16426: 16425: 16422: 16418: 16417: 16414: 16410: 16409: 16406: 16402: 16401: 16398: 16394: 16393: 16390: 16386: 16385: 16382: 16378: 16377: 16374: 16370: 16369: 16366: 16362: 16361: 16358: 16354: 16353: 16350: 16346: 16345: 16342: 16341:2 (EINIT) 16338: 16337: 16334: 16330: 16329: 16326: 16322: 16321: 16318: 16301: 16288: 16242: 16217: 16216: 16213: 16212: 16207: 16204: 16197: 16192: 16187: 16186: 16185: 16179: 16176: 16171: 16170: 16167: 16166: 16163: 16158: 16156:PREFETCHIT1 m8 16152: 16151: 16148:Granite Rapids 16144: 16141: 16138: 16133: 16131:PREFETCHIT0 m8 16128: 16127: 16126: 16123: 16120: 16115: 16114: 16111: 16110: 16098: 16095: 16092: 16080: 16055: 16040: 16039: 16038: 16029: 16026: 16021: 16020: 16017: 16016: 16009: 16004: 15998: 15997: 15990: 15987: 15983: 15978: 15973: 15972: 15971: 15962: 15959: 15954: 15953: 15950: 15949: 15942: 15939: 15929: 15924: 15919: 15918: 15917: 15910: 15907: 15902: 15901: 15898: 15897: 15894: 15887: 15885:F3 0F 38 F8 /r 15882: 15874: 15873: 15866: 15863: 15859: 15857:F2 0F 38 F8 /r 15854: 15849: 15848: 15847: 15845:Architecture). 15839:Enqueue Store. 15837: 15834: 15829: 15828: 15825: 15824: 15821: 15816: 15810: 15809: 15806: 15801: 15795: 15794: 15789:Copies UIF to 15785: 15780: 15774: 15773: 15755: 15750: 15744: 15743: 15738: 15735: 15732: 15727: 15722: 15721: 15720: 15715: 15712: 15707: 15706: 15703: 15702: 15697: 15694: 15690: 15680: 15675: 15674: 15673: 15670: 15667: 15662: 15661: 15658: 15657: 15652: 15649: 15646: 15641: 15636: 15635: 15634: 15631: 15628: 15623: 15622: 15619: 15618: 15600: 15595: 15585: 15584: 15581: 15574: 15569: 15559: 15558: 15548: 15545: 15542: 15537: 15532: 15531: 15530: 15527: 15524: 15519: 15518: 15515: 15514: 15495: 15492: 15489: 15484: 15479: 15478: 15477: 15474: 15471: 15466: 15465: 15462: 15461: 15456: 15453: 15447: 15442: 15437: 15436: 15435: 15432: 15429: 15424: 15423: 15420: 15419: 15407: 15404: 15401: 15390: 15381: 15380: 15379: 15376: 15373: 15368: 15367: 15364: 15363: 15360: 15354: 15347: 15341: 15340: 15337: 15331: 15324: 15318: 15317: 15316: 15315: 15305: 15302: 15300: 15288: 15285: 15283: 15273: 15270: 15266: 15263: 15257: 15250: 15245: 15244: 15243: 15235: 15232: 15227: 15226: 15223: 15222: 15219: 15214: 15206: 15205: 15195: 15192: 15189: 15184: 15177: 15176: 15175: 15168: 15162: 15157: 15156: 15153: 15152: 15149: 15144: 15141: 15138: 15133: 15126: 15123: 15120: 15119: 15089: 15068: 15044: 15026: 15015:PREFETCHWT1 m8 14969: 14940: 14919: 14902: 14895: 14894: 14891: 14887: 14886: 14883: 14879: 14878: 14875: 14871: 14870: 14867: 14863: 14862: 14859: 14842: 14827: 14814: 14795: 14774: 14746: 14733: 14726: 14725: 14722: 14718: 14717: 14714: 14710: 14709: 14706: 14702: 14701: 14698: 14694: 14693: 14690: 14686: 14685: 14682: 14678: 14677: 14674: 14670: 14669: 14666: 14662: 14661: 14658: 14641: 14624: 14613: 14612: 14609: 14605: 14604: 14597: 14593: 14592: 14589: 14585: 14584: 14581: 14564: 14560: 14559: 14556: 14552: 14551: 14548: 14544: 14543: 14532: 14528: 14527: 14512: 14508: 14507: 14504: 14487: 14464: 14443: 14430: 14412: 14384: 14359: 14357:but not SSE2.) 14337: 14320: 14301: 14299: 14298: 14289: 14280: 14271: 14262: 14253: 14244: 14199: 14146: 14076: 14008: 13982: 13955: 13928: 13927: 13924: 13923: 13913: 13910: 13907: 13902: 13897: 13896: 13895: 13892: 13889: 13884: 13883: 13880: 13879: 13864: 13861: 13858: 13856:66 0F 38 F8 /r 13853: 13846: 13845: 13844: 13841: 13838: 13833: 13832: 13829: 13828: 13813: 13810: 13807: 13799:NP 0F 38 F9 /r 13796: 13787: 13786: 13785: 13782: 13779: 13774: 13773: 13770: 13769: 13747: 13744: 13741: 13736: 13731: 13730: 13729: 13726: 13723: 13718: 13717: 13714: 13713: 13693: 13690: 13687: 13680: 13675: 13674: 13673: 13670: 13667: 13662: 13661: 13658: 13657: 13654: 13649: 13643: 13642: 13617: 13614: 13611: 13606: 13601: 13600: 13599: 13596: 13593: 13588: 13587: 13584: 13583: 13571: 13568: 13565: 13560: 13558:PREFETCHWT1 m8 13555: 13554: 13553: 13550: 13547: 13542: 13541: 13538: 13537: 13522: 13519: 13510: 13505: 13498: 13497: 13496: 13493: 13490: 13485: 13484: 13481: 13480: 13473: 13468: 13462: 13461: 13441: 13438: 13431: 13426: 13421: 13420: 13419: 13407: 13404: 13399: 13398: 13395: 13394: 13387: 13379:F3 0F 38 F6 /r 13376: 13374:ADOX r64,r/m64 13369:ADOX r32,r/m32 13364: 13363: 13343: 13340: 13329: 13321:66 0F 38 F6 /r 13318: 13316:ADCX r64,r/m64 13311:ADCX r32,r/m32 13307: 13306: 13305: 13302: 13297: 13292: 13291: 13288: 13287: 13284: 13279: 13271: 13270: 13242: 13239: 13236: 13231: 13224: 13223: 13222: 13219: 13216: 13211: 13210: 13207: 13206: 13186: 13183: 13177: 13175:66 0F 38 82 /r 13172: 13167: 13166: 13165: 13154: 13151: 13146: 13145: 13142: 13141: 13134: 13128: 13127: 13124: 13119: 13109: 13108: 13101: 13095: 13094: 13069: 13066: 13063: 13058: 13049: 13048: 13047: 13040: 13037: 13032: 13031: 13028: 13027: 13024: 13015: 13005: 13004: 13001: 12992: 12982: 12981: 12978: 12969: 12959: 12958: 12938: 12935: 12932: 12923: 12914: 12913: 12912: 12907: 12904: 12899: 12898: 12895: 12894: 12889: 12883: 12882: 12880:F2 0F 38 F1 /r 12877: 12867: 12866: 12851: 12848: 12840: 12838:F2 0F 38 F0 /r 12835: 12833:CRC32 r32,r/m8 12830: 12829: 12828: 12825: 12820: 12815: 12814: 12811: 12810: 12805: 12799: 12798: 12783: 12780: 12777: 12772: 12763: 12762: 12761: 12755: 12752: 12747: 12746: 12743: 12742: 12722: 12719: 12714: 12709: 12704: 12703: 12702: 12695: 12692: 12687: 12686: 12683: 12682: 12661: 12658: 12653: 12646: 12641: 12640: 12639: 12630: 12627: 12622: 12621: 12618: 12617: 12604: 12599: 12589: 12588: 12563: 12560: 12555: 12550: 12539: 12538: 12537: 12534: 12531: 12526: 12525: 12522: 12521: 12514: 12511: 12502: 12497: 12490: 12489: 12488: 12485: 12482: 12477: 12476: 12473: 12472: 12467: 12462: 12456: 12455: 12452: 12443: 12441:MOVNTI m64,r64 12437:MOVNTI m32,r32 12433: 12432: 12431:Memory Fence. 12429: 12424: 12418: 12417: 12397: 12394: 12391: 12386: 12381: 12380: 12379: 12376: 12371: 12366: 12365: 12362: 12361: 12358: 12353: 12347: 12346: 12343: 12338: 12332: 12331: 12328: 12323: 12317: 12316: 12313: 12308: 12302: 12301: 12272: 12269: 12263: 12258: 12256:PREFETCHNTA m8 12253: 12252: 12251: 12248: 12243: 12238: 12237: 12234: 12233: 12230: 12225: 12222: 12219: 12214: 12207: 12204: 12201: 12200: 12155: 12146: 12128: 12127: 12124: 12123: 12120: 12109: 12099: 12098: 12083: 12080: 12077: 12068: 12059: 12058: 12057: 12054: 12051: 12046: 12045: 12042: 12041: 12026: 12023: 12020: 12011: 12002: 12001: 12000: 11997: 11994: 11989: 11988: 11985: 11984: 11957: 11954: 11937: 11928: 11925:XSAVEOPT64 mem 11917: 11916: 11915: 11912: 11909: 11904: 11903: 11900: 11899: 11896: 11891: 11886: 11880: 11879: 11874: 11869: 11863: 11862: 11859: 11848: 11838: 11837: 11812: 11809: 11806: 11797: 11788: 11787: 11786: 11783: 11780: 11775: 11774: 11771: 11770: 11767: 11762: 11759: 11756: 11751: 11725: 11722: 11719: 11718: 11708: 11689: 11668: 11667: 11664: 11663: 11636: 11631: 11625: 11624: 11621: 11616: 11610: 11609: 11604: 11601: 11598: 11593: 11588: 11587: 11586: 11574: 11571: 11566: 11565: 11562: 11561: 11558: 11553: 11547: 11546: 11543: 11538: 11532: 11531: 11528: 11521: 11518:WRUSSQ m64,r64 11513: 11512: 11509: 11506: 11504:66 0F 38 F5 /r 11501: 11499:WRUSSD m32,r32 11495: 11494: 11491: 11484: 11478: 11477: 11474: 11472:NP 0F 38 F6 /r 11469: 11463: 11462: 11459: 11454: 11448: 11447: 11444: 11439: 11433: 11432: 11429: 11424: 11418: 11417: 11414: 11409: 11403: 11402: 11397: 11391: 11390: 11378: 11375: 11372: 11367: 11362: 11361: 11360: 11349: 11346: 11341: 11340: 11337: 11336: 11333: 11328: 11325: 11322: 11319: 11308:(CET_SS), and 11297: 11291: 11288: 11287: 11284: 11277: 11271: 11270: 11263: 11260: 11253: 11248: 11247: 11246: 11243: 11240: 11235: 11234: 11231: 11230: 11223: 11218: 11212: 11211: 11192: 11185: 11180: 11175: 11174: 11173: 11170: 11167: 11162: 11161: 11158: 11157: 11147: 11140: 11134: 11133: 11130: 11123: 11117: 11116: 11113: 11105: 11099: 11098: 11071: 11068: 11051: 11040: 11039: 11038: 11032: 11029: 11024: 11023: 11020: 11019: 11016: 11013: 11010: 11007: 10997:Main article: 10994: 10991: 10988: 10987: 10969: 10952: 10919: 10894: 10848: 10847: 10844: 10843: 10840: 10831: 10829:SHLX ra,r/m,rb 10825: 10824: 10821: 10812: 10810:SHRX ra,r/m,rb 10806: 10805: 10784: 10775: 10773:SARX ra,r/m,rb 10769: 10768: 10765: 10753: 10745: 10744: 10741: 10730: 10721: 10719:PEXT ra,rb,r/m 10715: 10714: 10711: 10696: 10687: 10685:PDEP ra,rb,r/m 10681: 10680: 10657: 10648: 10646:MULX ra,rb,r/m 10642: 10641: 10619: 10600: 10593: 10591:BZHI ra,r/m,rb 10588: 10587: 10586: 10583: 10580: 10575: 10574: 10571: 10570: 10563: 10558: 10552: 10551: 10544: 10539: 10537:BLSMSK reg,r/m 10533: 10532: 10525: 10520: 10514: 10513: 10510: 10491: 10486: 10480: 10479: 10473: 10468: 10466:ANDN ra,rb,r/m 10462: 10461: 10454: 10448: 10447: 10422: 10413: 10408: 10399: 10398: 10397: 10394: 10391: 10386: 10385: 10382: 10381: 10374: 10368: 10367: 10358: 10353: 10343: 10342: 10337: 10331: 10330: 10305: 10299: 10294: 10283: 10282: 10281: 10278: 10272: 10267: 10266: 10263: 10262: 10259: 10256: 10253: 10248: 10231:Main article: 10228: 10225: 10222: 10221: 10198: 10171: 10157: 10156: 10153: 10152: 10149: 10146: 10141: 10135: 10134: 10131: 10126: 10120: 10119: 10116: 10111: 10105: 10104: 10101: 10096: 10090: 10089: 10086: 10081: 10075: 10074: 10071: 10066: 10060: 10059: 10056: 10051: 10043: 10042: 10039: 10034: 10028: 10027: 10024: 10016: 10010: 10009: 10006: 10001: 9995: 9994: 9989: 9986:REX.W 0F C7 /1 9982: 9974: 9973: 9970: 9965: 9959: 9958: 9955: 9950: 9944: 9943: 9940: 9937: 9932: 9926: 9925: 9920: 9917: 9914: 9896: 9895: 9892: 9885: 9878: 9862: 9856: 9854: 9851: 9848: 9847: 9830: 9813: 9792: 9769: 9731: 9701: 9687: 9669: 9652: 9611: 9583: 9560: 9522: 9499: 9459:have used the 9446: 9423: 9414: 9382: 9365: 9358: 9357: 9352: 9348: 9347: 9342: 9338: 9337: 9332: 9328: 9327: 9322: 9318: 9317: 9315:0F 1F 44 00 00 9312: 9308: 9307: 9302: 9298: 9297: 9292: 9288: 9287: 9282: 9278: 9277: 9276:Byte Sequence 9274: 9261: 9236: 9204: 9200: 9199: 9189: 9186: 9182: 9181: 9171: 9168: 9164: 9163: 9153: 9150: 9146: 9145: 9139: 9136: 9132: 9131: 9121: 9118: 9114: 9113: 9107: 9104: 9100: 9099: 9093: 9090: 9086: 9085: 9082: 9079: 9075: 9074: 9068: 9065: 9061: 9060: 9050: 9047: 9043: 9042: 9032: 9029: 9025: 9024: 9021: 9018: 9014: 9013: 8999: 8996: 8992: 8991: 8985: 8982: 8978: 8977: 8975:"Not Overflow" 8971: 8968: 8964: 8963: 8960: 8957: 8953: 8952: 8945: 8942: 8910: 8897: 8878: 8853: 8851: 8850: 8821: 8818: 8816: 8789: 8786: 8776: 8737: 8719: 8709:on some Intel 8702:LOCK CMPXCHG8B 8693: 8672: 8655: 8642: 8627: 8600: 8574: 8558: 8554: 8553: 8550: 8544: 8543: 8542:(x2APIC MSRs) 8540: 8530: 8529: 8524: 8518: 8517: 8514: 8508: 8507: 8504: 8498: 8497: 8494: 8488: 8487: 8484: 8478: 8477: 8474: 8468: 8467: 8464: 8451: 8425: 8424: 8421: 8420: 8417: 8410: 8405: 8399: 8398: 8366: 8363: 8356: 8351: 8345: 8344: 8341: 8334: 8329: 8323: 8322: 8311: 8308: 8301: 8296: 8290: 8289: 8286: 8285: 8268: 8258: 8242: 8241: 8236: 8223: 8222: 8210: 8207: 8201:invalid opcode 8197: 8192: 8181: 8180: 8156: 8153: 8145:Official long 8143: 8136: 8125: 8124: 8121: 8120: 8084: 8081: 8078: 8071: 8068:CMOVcc reg,r/m 8063: 8062: 8024: 8021: 8014: 8009: 8003: 8002: 7999: 7998: 7956: 7953: 7942: 7937: 7931: 7930: 7888: 7885: 7873: 7866: 7858: 7857: 7809: 7806: 7785: 7780: 7772: 7771: 7727: 7722: 7712: 7707: 7701: 7700: 7690: 7685: 7679: 7678: 7636: 7633: 7626: 7621: 7615: 7614: 7611: 7610: 7607: 7602: 7599: 7596: 7582: 7571: 7568: 7567: 7546: 7533: 7511: 7494: 7473: 7439: 7416: 7415: 7412: 7411: 7408: 7401: 7395: 7394: 7391: 7386: 7380: 7379: 7376: 7366: 7359: 7353: 7352: 7347: 7337: 7336: 7323: 7316: 7310: 7309: 7302: 7288: 7287: 7266: 7259: 7253: 7252: 7249: 7239: 7236: 7229: 7223: 7222: 7217: 7214: 7211: 7204: 7198: 7195: 7194: 7185: 7165: 7131: 7122: 7120: 7119: 7106: 7060: 7037: 7021: 6991:protected mode 6962: 6938: 6880: 6851: 6830: 6826: 6825: 6815: 6812: 6808: 6807: 6797: 6794: 6790: 6789: 6779: 6776: 6772: 6771: 6765: 6762: 6758: 6757: 6747: 6744: 6740: 6739: 6733: 6730: 6726: 6725: 6719: 6716: 6712: 6711: 6708: 6705: 6701: 6700: 6694: 6691: 6687: 6686: 6676: 6673: 6669: 6668: 6658: 6655: 6651: 6650: 6647: 6644: 6640: 6639: 6625: 6622: 6618: 6617: 6611: 6608: 6604: 6603: 6601:"Not Overflow" 6597: 6594: 6590: 6589: 6586: 6583: 6579: 6578: 6571: 6568: 6518: 6489: 6458: 6437: 6398: 6364: 6362: 6361: 6357: 6352:instructions: 6321: 6320: 6317: 6316: 6313: 6310: 6305: 6293: 6292: 6289: 6287: 0F A7 /r 6284: 6278: 6277: 6274: 6272: 0F A6 /r 6269: 6263: 6262: 6260: 0F 13 /r 6257: 6251: 6250: 6248: 0F 12 /r 6245: 6239: 6238: 6236: 0F 11 /r 6233: 6227: 6226: 6216: 6214: 0F 10 /r 6211: 6205: 6204: 6201: 6192: 6187: 6177: 6176: 6173: 6172: 6169: 6164: 6158: 6157: 6152:Move from x86 6150: 6145: 6139: 6138: 6132: 6127: 6121: 6120: 6113: 6108: 6102: 6101: 6083: 6078: 6072: 6071: 6068: 6061: 6056: 6050: 6049: 6046: 6045: 6040: 6028: 6027: 6022: 6010: 6009: 5999: 5994: 5984: 5983: 5978: 5972: 5971: 5966: 5960: 5959: 5954: 5948: 5947: 5944: 5939: 5933: 5932: 5927: 5921: 5920: 5917: 5914: 5909: 5903: 5902: 5899: 5898: 5895: 5890: 5884: 5883: 5877: 5862: 5846: 5845: 5842: 5835: 5829: 5828: 5823: 5817: 5816: 5813:sign-extension 5809: 5804: 5798: 5797: 5792: 5786: 5785: 5782: 5779: 5774: 5768: 5767: 5764: 5763: 5758: 5752: 5751: 5738: 5728: 5720: 5719: 5714: 5708: 5707: 5694: 5686: 5680: 5679: 5673: 5666: 5660: 5659: 5656: 5650: 5643: 5637: 5636: 5633: 5632: 5624: 5618: 5617: 5611: 5606: 5600: 5599: 5591: 5585: 5584: 5578: 5573: 5567: 5566: 5558: 5552: 5551: 5541: 5536: 5530: 5529: 5521: 5515: 5514: 5511: 5494: 5489: 5483: 5482: 5477: 5474: 5471: 5460: 5459: 5430: 5391: 5374: 5357: 5294: 5273: 5256: 5238: 5165: 5143: 5142: 5139: 5138: 5133: 5115: 5110: 5104: 5103: 5098: 5095: 5090: 5084: 5083: 5080: 5075: 5072:FLAGS register 5068: 5063: 5057: 5056: 5051: 5048: 5043: 5037: 5036: 5031: 5028: 5023: 5017: 5016: 5011: 5008: 4998: 4990: 4989: 4984: 4974: 4969: 4963: 4962: 4959: 4954: 4948: 4943: 4938: 4934: 4933: 4930: 4929: 4924: 4918: 4913: 4907: 4906: 4903: 4898: 4892: 4887: 4881: 4880: 4875: 4872: 4869: 4864: 4858: 4857: 4852: 4849: 4846: 4841: 4835: 4834: 4829: 4823: 4818: 4812: 4811: 4806: 4800: 4795: 4789: 4788: 4785: 4780: 4774: 4769: 4764: 4760: 4759: 4754: 4751: 4748: 4745: 4742: 4726: 4725: 4714: 4696:test registers 4676: 4675: 4661: 4619: 4613: 4610: 4609: 4593: 4576: 4563: 4538: 4513: 4511: 4510: 4504: 4494: 4485:: Stores full 4454: 4415: 4389:Protected Mode 4368: 4326: 4270: 4269: 4266: 4265: 4258: 4256: F1 0F 04 4253: 4251: STOREALL 4247: 4246: 4243: 4240: 4233: 4228: 4219: 4218: 4215: 4214: 4211: 4206: 4200: 4199: 4196: 4189: 4183: 4182: 4179: 4174: 4168: 4167: 4164: 4147: 4142: 4136: 4135: 4132: 4129: 4126: 4119: 4114: 4111:ARPL r/m16,r16 4106: 4105: 4102: 4101: 4098: 4093: 4087: 4086: 4083: 4080: 4075: 4069: 4068: 4065: 4060: 4054: 4053: 4050: 4045: 4039: 4038: 4035: 4032: 4029: 4024: 4016: 4015: 4012: 4011: 4001: 3996: 3987: 3986: 3983: 3980: 3975: 3969: 3968: 3965: 3960: 3954: 3953: 3950: 3945: 3939: 3938: 3931:protected mode 3921: 3916: 3908: 3907: 3904: 3901: 3894: 3889: 3883: 3882: 3879: 3878: 3873: 3870: 3867: 3864: 3851:protected mode 3846: 3840: 3837: 3836: 3832: 3831: 3804: 3800: 3797: 3794: 3787: 3786: 3779: 3778: 3670: 3666: 3663: 3657: 3650: 3649: 3642: 3641: 3626: 3622: 3619: 3613: 3606: 3605: 3551: 3547: 3544: 3541: 3535: 3534: 3480: 3476: 3473: 3470: 3464: 3463: 3459: 3458: 3419: 3415: 3412: 3409: 3403: 3402: 3399: 3396: 3393: 3387: 3386: 3382: 3381: 3345: 3341: 3338: 3335: 3329: 3328: 3325: 3322: 3316: 3310: 3309: 3306: 3303: 3297: 3291: 3290: 3287: 3284: 3281: 3274: 3264: 3262: 3259: 3256: 3255: 3229: 3219: 3214: 3208: 3207: 3202: 3196: 3193: 3187: 3186: 3169: 3128: 3125: 3119: 3118: 3113: 3106: 3103: 3097: 3096: 3071: 3069:r & m/imm; 3061: 3058: 3050: 3049: 3023: 3013: 3010: 3004: 3003: 2998: 2925: 2914: 2908: 2907: 2902: 2829: 2818: 2812: 2811: 2806: 2801: 2798: 2790: 2789: 2784: 2779: 2776: 2770: 2769: 2764: 2759: 2758:Set carry flag 2756: 2750: 2749: 2732: 2730: 2727: 2721: 2720: 2703: 2701: 2695: 2689: 2688: 2683: 2681: 2666: 2660: 2659: 2654: 2652: 2637: 2631: 2630: 2604: 2591: 2588: 2582: 2581: 2564: 2554: 2551: 2545: 2544: 2527: 2517: 2511: 2505: 2504: 2499: 2497: 2494: 2488: 2487: 2470: 2468: 2465: 2459: 2458: 2441: 2439: 2436: 2430: 2429: 2420: 2418: 2415: 2409: 2408: 2399: 2397: 2394: 2388: 2387: 2385: 2382: 2379: 2373: 2372: 2363: 2356: 2353: 2347: 2346: 2329: 2327: 2324: 2318: 2317: 2300: 2298: 2295: 2289: 2288: 2283: 2264: 2261: 2255: 2254: 2217: 2192: 2189: 2183: 2182: 2177: 2175:FLAGS = *SP++; 2172: 2169:FLAGS register 2165: 2159: 2158: 2129: 2115: 2111:Pop data from 2109: 2103: 2102: 2085: 2067: 2066:Output to port 2064: 2058: 2057: 2031: 2011: 2006: 2000: 1999: 1990: 1968: 1962: 1956: 1955: 1950: 1944: 1941: 1933: 1932: 1923: 1889: 1883: 1877: 1876: 1867: 1865:AX = AL * r/m; 1857: 1854: 1848: 1847: 1842: 1722: 1719: 1708: 1702: 1701: 1696: 1575: 1572: 1561: 1555: 1554: 1545: 1535: 1532: 1526: 1525: 1516: 1477: 1474: 1463: 1462: 1457: 1396: 1385: 1379: 1378: 1373: 1312: 1301: 1295: 1294: 1289: 1286: 1283: 1277: 1276: 1271: 1269: 1266: 1260: 1259: 1254: 1252: 1247: 1241: 1240: 1235: 1233: 1230: 1224: 1223: 1218: 1216: 1213: 1207: 1206: 1189: 1187: 1184: 1176: 1175: 1170: 1168: 1165: 1159: 1158: 1140: 1133: 1128: 1122: 1121: 1116: 1114: 1111: 1105: 1104: 1099: 1097: 1094: 1088: 1087: 1078: 1076: 1070: 1062: 1061: 1044: 1042: 1041:Increment by 1 1039: 1033: 1032: 1015: 997: 994: 988: 987: 965: 955: 952: 946: 945: 936: 934:AH = remainder 930:AL = AX / r/m; 926:DX = remainder 918: 915: 909: 908: 903: 901: 898: 890: 889: 880: 878: 872: 866: 865: 856: 854:AH = remainder 850:AL = AX / r/m; 846:DX = remainder 838: 832: 826: 825: 808: 806: 805:Decrement by 1 803: 797: 796: 791: 789: 786: 778: 777: 772: 765: 762: 754: 753: 748: 746: 743: 737: 736: 731: 729: 714: 708: 707: 702: 700: 685: 679: 678: 652: 650: 647: 641: 640: 635: 630: 627: 621: 620: 615: 610: 608:interrupt flag 604: 596: 595: 590: 585: 583:direction flag 579: 573: 572: 567: 562: 556: 550: 549: 544: 539: 536: 530: 529: 512: 499: 497:Call procedure 494: 488: 487: 461: 451: 446: 440: 439: 413: 403: 400: 394: 393: 367: 359: 358:Add with carry 356: 350: 349: 344: 342: 339: 333: 332: 327: 324: 321: 315: 314: 309: 292: 289: 283: 282: 277: 271: 268: 260: 259: 256: 253: 250: 226:memory address 209: 206: 138:Main article: 135: 132: 96: 95: 93: 92: 85: 78: 70: 67: 66: 65: 64: 58: 52: 49:Virtualization 46: 40: 31: 30: 24: 23: 15: 9: 6: 4: 3: 2: 26629: 26618: 26615: 26613: 26610: 26609: 26607: 26592: 26589: 26587: 26584: 26582: 26579: 26577: 26574: 26572: 26569: 26567: 26564: 26562: 26559: 26555: 26552: 26550: 26549:Overflow flag 26547: 26545: 26542: 26540: 26537: 26535: 26532: 26531: 26530: 26527: 26525: 26522: 26521: 26519: 26513: 26506: 26503: 26500: 26497: 26494: 26491: 26488: 26485: 26482: 26479: 26476: 26475:GNU Assembler 26473: 26470: 26467: 26465: 26462: 26461: 26459: 26457: 26453: 26447: 26444: 26442: 26439: 26437: 26434: 26432: 26429: 26427: 26424: 26422: 26419: 26417: 26414: 26412: 26409: 26408: 26406: 26402: 26393: 26388: 26386: 26381: 26379: 26374: 26373: 26370: 26363: 26359: 26356: 26354: 26351: 26349: 26346: 26344: 26341: 26338: 26335: 26332: 26329: 26328: 26311: 26307: 26302: 26301: 26278: 26273: 26267: 26261: 26255: 26249: 26243: 26237: 26229: 26223: 26216: 26210: 26203: 26197: 26190: 26184: 26177: 26171: 26164: 26158: 26151: 26145: 26138: 26132: 26126: 26120: 26113: 26109: 26103: 26095: 26084: 26080: 26073: 26065: 26054: 26050: 26043: 26036: 26030: 26023: 26020: 26014: 26007: 26001: 25994: 25990: 25984: 25977: 25971: 25969: 25967: 25959: 25953: 25946: 25940: 25933: 25921: 25915: 25908: 25902: 25895: 25889: 25882: 25876: 25870:, 20 nov 2018 25869: 25863: 25856: 25850: 25843: 25839: 25833: 25826: 25822: 25816: 25809: 25805: 25799: 25792: 25786: 25779: 25767: 25761: 25754: 25742: 25736: 25729: 25725: 25719: 25713:, 14 May 2018 25712: 25706: 25699: 25693: 25686: 25680: 25673: 25667: 25661: 25655: 25648: 25643: 25636: 25630: 25622: 25621: 25616: 25615:"zwegner/zp7" 25609: 25601: 25590: 25586: 25579: 25572: 25566: 25559: 25553: 25547: 25541: 25534: 25528: 25521: 25515: 25508: 25502: 25495: 25489: 25482: 25478: 25472: 25465: 25461: 25455: 25448: 25442: 25435: 25431: 25427: 25421: 25414: 25408: 25395: 25389: 25378: 25372: 25355: 25349: 25347: 25331: 25327: 25323: 25317: 25302: 25298: 25294: 25287: 25276: 25268: 25262: 25260: 25244: 25238: 25236: 25216: 25210: 25203: 25199: 25193: 25186: 25170: 25166: 25163:Jan Beulich, 25160: 25153: 25141: 25137: 25134:John Hassey, 25131: 25124: 25118: 25112:on 1 Aug 2019 25111: 25107: 25101: 25094: 25088: 25081: 25075: 25068: 25064: 25058: 25051: 25047: 25041: 25034: 25030: 25024: 25017: 25013: 25007: 25000: 24996: 24990: 24983: 24979: 24973: 24966: 24962: 24956: 24950: 24944: 24929: 24923: 24921: 24913: 24909: 24903: 24896: 24892: 24886: 24875: 24869: 24862: 24858: 24852: 24845: 24841: 24835: 24828: 24824: 24818: 24811: 24805: 24798: 24793: 24784: 24777: 24773: 24767: 24759: 24755: 24749: 24742: 24736: 24729: 24725: 24719: 24712: 24711:0-201-47950-8 24708: 24702: 24695: 24689: 24681: 24675: 24658: 24652: 24635: 24629: 24622: 24611: 24604: 24597: 24593: 24589: 24582: 24575: 24571: 24565: 24558: 24554: 24553:PCjs Machines 24550: 24544: 24538: 24532: 24524: 24520: 24514: 24507: 24501: 24490: 24484: 24477: 24473: 24469: 24463: 24456: 24452: 24446: 24444: 24436: 24432: 24426: 24420:, see note #7 24419: 24413: 24406: 24402: 24396: 24389: 24385: 24379: 24372: 24368: 24362: 24355: 24351: 24345: 24339: 24335: 24332: 24326: 24319: 24315: 24309: 24302: 24296: 24289: 24284: 24277: 24276:1-56884-169-8 24273: 24267: 24261: 24257: 24254:MBC Project, 24251: 24244: 24240: 24237:Oracle Corp, 24234: 24227: 24223: 24217: 24210: 24206: 24200: 24198: 24190: 24186: 24180: 24172: 24165: 24159: 24145: 24139: 24135: 24125: 24122: 24120: 24117: 24115: 24112: 24110: 24107: 24105: 24102: 24100: 24097: 24095: 24092: 24091: 24085: 24081: 24070: 24059: 24048: 24040: 24026:instruction, 24019: 24001:will produce 23970: 23968: 23932: 23930: 23908: 23851: 23828: 23825: 23816: 23813: 23808: 23804: 23795: 23792: 23787: 23783: 23775: 23771: 23745: 23743: 23741: 23699: 23682: 23680: 23673: 23667: 23635: 23631: 23625: 23621: 23611: 23606: 23605: 23599: 23594: 23593: 23587: 23582: 23578: 23575: 23573: 23568: 23565: 23562: 23554: 23547: 23540: 23537: 23536: 23528: 23521: 23516: 23513: 23512: 23502: 23500: 23496: 23492: 23487: 23484: 23481: 23475: 23468: 23461: 23460: 23454: 23449: 23443: 23442: 23436: 23431: 23424: 23423: 23417: 23412: 23408: 23393: 23392: 23388: 23383: 23378: 23377: 23371: 23366: 23359: 23358: 23354: 23349: 23344: 23343: 23339: 23334: 23329: 23328: 23324: 23319: 23314: 23313: 23307: 23302: 23297: 23296: 23293:equal (ZF=1) 23292: 23287: 23282: 23281: 23278:below (CF=1) 23277: 23272: 23269:B st(0),st(i) 23268: 23264: 23262: 23257: 23249:Condition for 23247: 23245: 23240: 23237: 23234: 23228: 23223: 23208: 23201: 23195: 23192: 23189: 23186: 23182: 23178: 23175: 23166: 23160: 23157: 23149: 23148: 23142: 23137: 23122: 23115: 23109: 23106: 23103: 23100: 23096: 23092: 23089: 23080: 23074: 23071: 23063: 23062: 23045: 23041: 23037: 23033: 23026: 23020: 23017: 23013: 23000: 22995: 22969: 22962: 22956: 22953: 22950: 22947: 22943: 22939: 22936: 22933: 22930: 22909: 22902: 22896: 22893: 22890: 22887: 22883: 22879: 22876: 22873: 22870: 22860: 22859: 22853: 22848: 22845: 22842: 22841: 22835: 22830: 22827: 22826: 22820: 22815: 22812: 22811: 22802: 22797: 22794: 22784: 22783: 22773: 22771: 22766: 22763: 22760: 22754: 22749: 22744: 22741: 22740: 22734: 22729: 22724: 22722: 22718: 22717: 22711: 22709: 22704: 22701: 22698: 22694: 22691: 22688: 22685: 22684: 22664: 22643: 22640: 22632: 22617: 22614: 22606: 22589: 22586: 22576: 22575: 22555: 22549: 22546: 22538: 22532: 22529: 22512: 22495: 22493: 22485: 22481: 22477: 22471: 22458: 22435: 22431: 22427: 22421: 22415: 22412: 22409: 22404: 22400: 22396: 22382: 22369: 22319: 22315: 22296: 22290:is set to +∞. 22271: 22265: 22257: 22254: 22251: 22248: 22247: 22243: 22240: 22237: 22234: 22231: 22230: 22226: 22223: 22220: 22217: 22216: 22212: 22209: 22206: 22203: 22202: 22198: 22195: 22192: 22189: 22188: 22184: 22181: 22178: 22175: 22174: 22171: 22168: 22165: 22162: 22159: 22158: 22154: 22151: 22148: 22145: 22144: 22140: 22137: 22134: 22131: 22130: 22120: 22105: 22101: 22095: 22082: 22068: 22023: 22021: 22019: 22017: 22015: 22013: 22011: 22009: 22007: 21993: 21991: 21976: 21974: 21972: 21970: 21968: 21966: 21964: 21962: 21960: 21947: 21931: 21929: 21927: 21900: 21894: 21892: 21834: 21832: 21830: 21828: 21821:instructions. 21814: 21791: 21785: 21766: 21765: 21749: 21732: 21728: 21718: 21711: 21708: 21707: 21701: 21697:FSTPNCE st(i) 21694: 21691: 21690: 21684: 21674: 21671: 21670: 21662: 21657: 21654: 21653: 21647: 21642: 21639: 21638: 21632: 21627: 21624: 21623: 21617: 21612: 21610:No operation 21609: 21608: 21601: 21595: 21578: 21574: 21571: 21566: 21560: 21556: 21550: 21544: 21541: 21538: 21534: 21530: 21527: 21521: 21518: 21511: 21486: 21479: 21476: 21470: 21467: 21463: 21459: 21455: 21448: 21442: 21439: 21435: 21420: 21415: 21399: 21395: 21392: 21386: 21380: 21377: 21373: 21369: 21364: 21360: 21356: 21350: 21344: 21341: 21332: 21326: 21323: 21315: 21314: 21293: 21289: 21282: 21276: 21273: 21269: 21265: 21261: 21254: 21248: 21245: 21241: 21226: 21221: 21205: 21196: 21190: 21187: 21179: 21173: 21170: 21164: 21160: 21157: 21148: 21142: 21139: 21131: 21128: 21127: 21110: 21106: 21102: 21098: 21091: 21085: 21082: 21078: 21074: 21071: 21048: 21045: 21040: 21036: 21029: 21023: 21020: 21016: 21012: 21009: 20996: 20991: 20960: 20957: 20952: 20948: 20941: 20935: 20932: 20928: 20924: 20921: 20905: 20904: 20895: 20890: 20874: 20867: 20861: 20858: 20854: 20850: 20845: 20841: 20837: 20831: 20825: 20822: 20813: 20807: 20804: 20796: 20792: 20791: 20776: 20773: 20767: 20761: 20758: 20755: 20752: 20749: 20726: 20723: 20718: 20712: 20706: 20703: 20700: 20697: 20684: 20679: 20665: 20662: 20654: 20648: 20645: 20641: 20631: 20625: 20622: 20614: 20613: 20603: 20597: 20593: 20590: 20585: 20580: 20563: 20556: 20550: 20547: 20543: 20480: 20476: 20470: 20464: 20461: 20452: 20446: 20443: 20435: 20434: 20430: 20427: 20422: 20417: 20414: 20413: 20409: 20406: 20401: 20396: 20394: 20390: 20389: 20382: 20377: 20372: 20358: 20355: 20349: 20343: 20340: 20337: 20331: 20325: 20322: 20313: 20307: 20304: 20284: 20275: 20269: 20266: 20258: 20252: 20249: 20243: 20178: 20170: 20166: 20165: 20158: 20153: 20148: 20123: 20120: 20116: 20113: 20110: 20106: 20103: 20072: 20066: 20063: 20060: 20055: 20051: 20047: 20044: 20026: 20025: 20018: 20013: 20008: 20003: 20002: 19995: 19990: 19985: 19982: 19981: 19974: 19969: 19964: 19961: 19960: 19953: 19948: 19943: 19940: 19939: 19933: 19928: 19924: 19918: 19913: 19912: 19900: 19895: 19891: 19885: 19880: 19879: 19867: 19862: 19858: 19852: 19847: 19846: 19834: 19829: 19825: 19819: 19814: 19813: 19801: 19796: 19792: 19786: 19781: 19780: 19768: 19763: 19759: 19753: 19748: 19747: 19735: 19730: 19726: 19720: 19715: 19714: 19702: 19697: 19693: 19687: 19682: 19681: 19669: 19664: 19660: 19654: 19649: 19645: 19638: 19633: 19628: 19625: 19624: 19616: 19615: 19607: 19606: 19600: 19594: 19588: 19583: 19582: 19570: 19565: 19561: 19557: 19554: 19549: 19544: 19541: 19540: 19536: 19533: 19528: 19523: 19520: 19519: 19515: 19512: 19507: 19502: 19499: 19498: 19494: 19491: 19486: 19481: 19478: 19477: 19473: 19470: 19465: 19460: 19457: 19456: 19452: 19449: 19444: 19439: 19436: 19435: 19429: 19424: 19420: 19412: 19411: 19405: 19399: 19393: 19388: 19387: 19375: 19370: 19361: 19360: 19357: 19351: 19346: 19345: 19339: 19334: 19333: 19327: 19322: 19321: 19309: 19304: 19297: 19296: 19293: 19287: 19284:FDIV st(i),st 19282: 19281: 19275: 19272:FDIV st,st(i) 19270: 19269: 19263: 19258: 19257: 19245: 19240: 19233: 19232: 19229: 19223: 19218: 19217: 19211: 19206: 19205: 19199: 19194: 19193: 19181: 19176: 19169: 19168: 19165: 19159: 19156:FSUB st(i),st 19154: 19153: 19147: 19144:FSUB st,st(i) 19142: 19141: 19135: 19130: 19129: 19117: 19112: 19105: 19104: 19101: 19095: 19092:FMUL st(i),st 19090: 19089: 19083: 19080:FMUL st,st(i) 19078: 19077: 19071: 19066: 19065: 19053: 19048: 19041: 19040: 19037: 19031: 19028:FADD st(i),st 19026: 19025: 19019: 19016:FADD st,st(i) 19014: 19013: 19007: 19002: 19001: 18989: 18984: 18977: 18976: 18973: 18967: 18962: 18958: 18954: 18951: 18946: 18941: 18938: 18937: 18930: 18925: 18920: 18917: 18916: 18910: 18905: 18904: 18898: 18893: 18892: 18880: 18875: 18871: 18865: 18860: 18859: 18847: 18842: 18838: 18832: 18827: 18826: 18820: 18815: 18814: 18802: 18797: 18793: 18787: 18782: 18778: 18770: 18769: 18761: 18760: 18748: 18739: 18733: 18728: 18712: 18709: 18706: 18702: 18699: 18691: 18690: 18684: 18679: 18663: 18660: 18657: 18653: 18648: 18644: 18635: 18634: 18628: 18623: 18607: 18604: 18601: 18597: 18592: 18588: 18579: 18578: 18572: 18567: 18551: 18548: 18545: 18541: 18536: 18532: 18523: 18522: 18510: 18505: 18502: 18496: 18495: 18489: 18484: 18481: 18480: 18468: 18463: 18460: 18459: 18453: 18452: 18446: 18445: 18437: 18431: 18419: 18414: 18413: 18407: 18402: 18401: 18389: 18384: 18380: 18373: 18368: 18363: 18362: 18356: 18351: 18350: 18338: 18333: 18329: 18323: 18318: 18317: 18311: 18306: 18305: 18299: 18294: 18293: 18281: 18276: 18272: 18266: 18261: 18257: 18251: 18240: 18235: 18232: 18231: 18220: 18215: 18212: 18211: 18202: 18197: 18194: 18193: 18182: 18175: 18172: 18171: 18160: 18153: 18150: 18149: 18140: 18135: 18132: 18131: 18120: 18115: 18112: 18111: 18100: 18095: 18092: 18091: 18080: 18075: 18072: 18071: 18062: 18057: 18054: 18053: 18042: 18037: 18034: 18033: 18023: 18017: 18010: 18007: 18004: 18003: 17997: 17991: 17988: 17966: 17959: 17953: 17945: 17942: 17941: 17937: 17934: 17933: 17929: 17926: 17925: 17901: 17881: 17872: 17849: 17847: 17810:prefix, e.g. 17803: 17799: 17785: 17780: 17775: 17774: 17771: 17760: 17755: 17750: 17745: 17739: 17737: 17733: 17730: 17727: 17724: 17714: 17709: 17704: 17699: 17693: 17692: 17691: 17687: 17684: 17681: 17678: 17676: 17672: 17668: 17663: 17658: 17653: 17647: 17646: 17645: 17641: 17638: 17635: 17632: 17629: 17624: 17617: 17612: 17606: 17605: 17604: 17600: 17583: 17578: 17573: 17572: 17569: 17556: 17551: 17546: 17541: 17535: 17533: 17529: 17525: 17518: 17511: 17510: 17507: 17498: 17493: 17488: 17483: 17479: 17473: 17471: 17467: 17463: 17461: 17458: 17455: 17452: 17447: 17444: 17443: 17416: 17414: 17392: 17378: 17375: 17372: 17371: 17364: 17361: 17358: 17357: 17350: 17347: 17344: 17343: 17339: 17336: 17333: 17332: 17325: 17322: 17319: 17318: 17314: 17311: 17308: 17307: 17300: 17297: 17294: 17293: 17290:SF=1: "Sign" 17289: 17286: 17283: 17282: 17275: 17272: 17269: 17268: 17261: 17258: 17255: 17254: 17247: 17244: 17241: 17240: 17237:ZF=1: "Zero" 17236: 17233: 17230: 17229: 17222: 17219: 17216: 17215: 17211: 17208: 17205: 17204: 17197: 17194: 17191: 17190: 17186: 17183: 17180: 17179: 17175: 17171: 17168: 17165: 17164: 17160: 17154: 17146: 17138: 17123: 17122:Sierra Forest 17115: 17109: 17102: 17085: 17071: 17070: 17066: 17063: 17062: 17058: 17055: 17054: 17039: 17014: 17000: 16999: 16993: 16990: 16989: 16987: 16984: 16983: 16979: 16976: 16975: 16961: 16952: 16938: 16893: 16891: 16873: 16861: 16843: 16837: 16827: 16824: 16823: 16817: 16814: 16813: 16808: 16802: 16799: 16798: 16794: 16791: 16790: 16780: 16753: 16737: 16731: 16717: 16714: 16713: 16709: 16706: 16705: 16701: 16698: 16697: 16692: 16688: 16685: 16684: 16674: 16662: 16656: 16646: 16643: 16642: 16637: 16633: 16630: 16629: 16624: 16620: 16617: 16616: 16612: 16609: 16608: 16604: 16601: 16600: 16595: 16591: 16588: 16587: 16583: 16580: 16579: 16575: 16572: 16571: 16567: 16564: 16563: 16559: 16556: 16555: 16551: 16548: 16547: 16537: 16530: 16526: 16522: 16516: 16510: 16502: 16499: 16498: 16493: 16489: 16486: 16485: 16481: 16478: 16477: 16473: 16470: 16469: 16465: 16462: 16461: 16456: 16452: 16449: 16448: 16444: 16441: 16440: 16436: 16434:D (EAUG) 16433: 16432: 16427: 16423: 16420: 16419: 16415: 16412: 16411: 16407: 16404: 16403: 16399: 16396: 16395: 16391: 16389:8 (ELDU) 16388: 16387: 16383: 16381:7 (ELDB) 16380: 16379: 16375: 16372: 16371: 16367: 16364: 16363: 16359: 16356: 16355: 16351: 16348: 16347: 16343: 16340: 16339: 16335: 16333:1 (EADD) 16332: 16331: 16327: 16324: 16323: 16319: 16316: 16315: 16305: 16298: 16292: 16249: 16247: 16239: 16225: 16223: 16218: 16211: 16208: 16205: 16203: 16198: 16193: 16188: 16184: 16180: 16174: 16173: 16172: 16168: 16164: 16159: 16154: 16153: 16149: 16139: 16134: 16129: 16124: 16118: 16116: 16112: 16109: 16103: 16102:Sierra Forest 16099: 16096: 16081: 16073: 16063: 16056: 16041: 16034: 16033:fetch-and-add 16030: 16024: 16023: 16022: 16018: 16015: 16010: 16005: 16000: 15999: 15995: 15994:Sierra Forest 15984: 15979: 15974: 15967: 15963: 15957: 15955: 15951: 15947: 15946:Sierra Forest 15943: 15940: 15938: 15930: 15925: 15920: 15915: 15911: 15905: 15904: 15903: 15899: 15895: 15888: 15883: 15876: 15875: 15871: 15864: 15860: 15855: 15850: 15846: 15844: 15838: 15832: 15830: 15826: 15822: 15817: 15812: 15811: 15807: 15802: 15797: 15796: 15792: 15786: 15781: 15776: 15775: 15772: 15770: 15766: 15762: 15756: 15751: 15746: 15745: 15742: 15733: 15728: 15723: 15716: 15710: 15708: 15704: 15701: 15698: 15695: 15691: 15687: 15681: 15676: 15671: 15665: 15664: 15663: 15659: 15656: 15653: 15650: 15647: 15642: 15637: 15632: 15626: 15625: 15624: 15620: 15617: 15605: 15601: 15596: 15587: 15586: 15575: 15570: 15561: 15560: 15557: 15552: 15546: 15543: 15538: 15533: 15528: 15522: 15520: 15516: 15512: 15506: 15500: 15496: 15493: 15490: 15485: 15480: 15475: 15469: 15468: 15467: 15463: 15460: 15457: 15454: 15452: 15448: 15443: 15438: 15433: 15427: 15426: 15425: 15421: 15417: 15416:Goldmont Plus 15411: 15408: 15405: 15402: 15391: 15388:PTWRITE r/m64 15384:PTWRITE r/m32 15382: 15377: 15371: 15370: 15369: 15365: 15361: 15359: 15355: 15348: 15343: 15342: 15338: 15336: 15332: 15325: 15320: 15319: 15314: 15309: 15306: 15299: 15293: 15292:Goldmont Plus 15289: 15282: 15281:Goldmont Plus 15277: 15274: 15268: 15264: 15262: 15258: 15251: 15246: 15239: 15236: 15230: 15228: 15224: 15220: 15215: 15208: 15207: 15204: 15199: 15190: 15185: 15178: 15169: 15166: 15160: 15158: 15154: 15150: 15148: 15145: 15142: 15139: 15134: 15131: 15130: 15109:differs from 15093: 15072: 15063: 15048: 15041: 15035: 15033: 15031: 15022: 14989: 14973: 14962: 14944: 14937: 14923: 14913:instruction, 14906: 14900: 14892: 14889: 14888: 14884: 14881: 14880: 14876: 14873: 14872: 14868: 14865: 14864: 14860: 14857: 14856: 14846: 14831: 14818: 14809: 14799: 14785:instruction, 14778: 14753: 14751: 14737: 14731: 14723: 14720: 14719: 14715: 14712: 14711: 14707: 14704: 14703: 14699: 14696: 14695: 14691: 14688: 14687: 14683: 14680: 14679: 14675: 14672: 14671: 14667: 14664: 14663: 14659: 14656: 14655: 14645: 14628: 14622: 14620: 14619:ACPI C-states 14607: 14606: 14602: 14598: 14595: 14594: 14590: 14587: 14586: 14582: 14579: 14578: 14568: 14554: 14553: 14549: 14546: 14545: 14541: 14537: 14533: 14530: 14529: 14521: 14517: 14513: 14510: 14509: 14505: 14502: 14501: 14491: 14481:before using 14468: 14453: 14447: 14434: 14416: 14408:MWAIT EAX,ECX 14391: 14389: 14381: 14377: 14363: 14352: 14341: 14324: 14305: 14290: 14281: 14272: 14263: 14254: 14245: 14236: 14235: 14203: 14193:On AMD CPUs, 14174: 14150: 14132:On AMD CPUs, 14129: 14117: 14104: 14080: 14064:SFENCE+LFENCE 14012: 13991: 13989: 13987: 13972: 13970: 13968: 13966: 13964: 13962: 13960: 13952: 13948: 13944: 13938: 13936: 13934: 13929: 13922: 13917: 13914: 13911: 13908: 13903: 13898: 13893: 13887: 13886: 13885: 13881: 13878: 13873: 13868: 13865: 13862: 13859: 13854: 13847: 13842: 13836: 13835: 13834: 13830: 13827: 13822: 13817: 13814: 13811: 13808: 13797: 13788: 13783: 13777: 13776: 13775: 13771: 13768: 13763: 13758: 13752: 13751:Goldmont Plus 13748: 13745: 13742: 13737: 13732: 13727: 13721: 13720: 13719: 13715: 13712: 13707: 13702: 13697: 13694: 13691: 13688: 13681: 13676: 13671: 13665: 13664: 13663: 13659: 13655: 13650: 13645: 13644: 13641: 13636: 13631: 13626: 13621: 13612: 13607: 13602: 13597: 13591: 13589: 13585: 13582: 13576: 13572: 13569: 13566: 13561: 13556: 13551: 13545: 13544: 13543: 13539: 13536: 13531: 13526: 13523: 13520: 13511: 13506: 13502:CLFLUSHOPT m8 13499: 13494: 13488: 13487: 13486: 13482: 13474: 13469: 13464: 13463: 13460: 13455: 13450: 13445: 13432: 13427: 13422: 13411: 13408: 13402: 13400: 13396: 13388: 13377: 13366: 13365: 13362: 13357: 13352: 13347: 13330: 13319: 13308: 13303: 13300: 13295: 13293: 13289: 13285: 13280: 13273: 13272: 13269: 13264: 13259: 13253: 13246: 13237: 13232: 13225: 13220: 13214: 13212: 13208: 13205: 13200: 13195: 13190: 13187: 13184: 13182: 13178: 13173: 13168: 13163: 13159: 13155: 13149: 13148: 13147: 13143: 13135: 13132:MOVBE m64,r64 13130: 13129: 13120: 13117:MOVBE m32,r32 13113:MOVBE m16,r16 13111: 13110: 13102: 13099:MOVBE r64,m64 13097: 13096: 13093: 13088: 13083: 13078: 13073: 13059: 13056:MOVBE r32,m32 13052:MOVBE r16,m16 13050: 13045: 13041: 13035: 13033: 13029: 13025: 13016: 13007: 13006: 13002: 12993: 12984: 12983: 12979: 12970: 12961: 12960: 12957: 12952: 12947: 12942: 12933: 12924: 12915: 12908: 12902: 12900: 12896: 12890: 12885: 12884: 12878: 12869: 12868: 12865: 12860: 12855: 12845: 12836: 12831: 12826: 12823: 12818: 12816: 12812: 12806: 12801: 12800: 12797: 12792: 12787: 12773: 12764: 12759: 12756: 12750: 12748: 12744: 12741: 12736: 12731: 12726: 12723: 12720: 12715: 12710: 12705: 12700: 12696: 12690: 12689: 12688: 12684: 12681: 12676: 12670: 12666: 12662: 12659: 12654: 12647: 12642: 12637: 12631: 12625: 12624: 12623: 12619: 12605: 12600: 12597:MWAIT EAX,ECX 12591: 12590: 12587: 12582: 12577: 12572: 12567: 12556: 12551: 12540: 12535: 12529: 12527: 12523: 12520: 12515: 12512: 12509: 12503: 12498: 12491: 12486: 12480: 12479: 12478: 12474: 12468: 12463: 12458: 12457: 12453: 12444: 12435: 12434: 12430: 12427:NP 0F AE F0+x 12425: 12420: 12419: 12416: 12411: 12406: 12401: 12392: 12389:NP 0F AE E8+x 12387: 12382: 12377: 12374: 12369: 12367: 12363: 12360:Store Fence. 12359: 12356:NP 0F AE F8+x 12354: 12349: 12348: 12344: 12339: 12336:PREFETCHT2 m8 12334: 12333: 12329: 12324: 12321:PREFETCHT1 m8 12319: 12318: 12314: 12309: 12306:PREFETCHT0 m8 12304: 12303: 12300: 12295: 12289: 12282: 12276: 12264: 12259: 12254: 12249: 12246: 12241: 12239: 12235: 12231: 12229: 12226: 12223: 12220: 12215: 12212: 12211: 12196: 12174:), executing 12173: 12169: 12165: 12159: 12150: 12133: 12129: 12121: 12110: 12107:XRSTORS64 mem 12101: 12100: 12097: 12092: 12087: 12078: 12069: 12060: 12055: 12049: 12047: 12043: 12040: 12035: 12030: 12027: 12024: 12021: 12012: 12003: 11998: 11992: 11991: 11990: 11986: 11983: 11978: 11973: 11968: 11962: 11958: 11955: 11945:instruction, 11938: 11929: 11918: 11913: 11907: 11906: 11905: 11901: 11897: 11892: 11887: 11882: 11881: 11875: 11870: 11865: 11864: 11860: 11849: 11840: 11839: 11836: 11831: 11826: 11821: 11816: 11807: 11798: 11789: 11784: 11778: 11776: 11772: 11768: 11766: 11763: 11760: 11757: 11752: 11749: 11748: 11745: 11742: 11735: 11731: 11712: 11696: 11694: 11676: 11674: 11669: 11637: 11632: 11627: 11626: 11622: 11617: 11612: 11611: 11608: 11599: 11594: 11589: 11578: 11575: 11569: 11567: 11563: 11559: 11554: 11549: 11548: 11544: 11539: 11534: 11533: 11529: 11522: 11515: 11514: 11507: 11502: 11497: 11496: 11492: 11485: 11482:WRSSQ m64,r64 11480: 11479: 11475: 11470: 11467:WRSSD m32,r32 11465: 11464: 11460: 11455: 11450: 11449: 11445: 11440: 11435: 11434: 11430: 11425: 11420: 11419: 11415: 11410: 11405: 11404: 11398: 11393: 11392: 11389: 11383: 11368: 11363: 11353: 11350: 11344: 11342: 11338: 11334: 11332: 11329: 11326: 11323: 11320: 11317: 11316: 11313: 11311: 11307: 11303: 11296: 11285: 11278: 11273: 11272: 11268: 11261: 11254: 11249: 11244: 11238: 11236: 11232: 11224: 11219: 11214: 11213: 11208: 11202: 11196: 11186: 11181: 11176: 11171: 11165: 11163: 11159: 11153: 11148: 11141: 11136: 11135: 11131: 11124: 11119: 11118: 11114: 11111: 11106: 11101: 11100: 11096: 11092: 11088: 11084: 11080: 11075: 11069: 11065: 11057: 11052: 11041: 11037: 11033: 11027: 11025: 11021: 11017: 11014: 11011: 11008: 11005: 11004: 11000: 10973: 10956: 10923: 10898: 10891: 10887: 10853: 10849: 10841: 10832: 10827: 10826: 10822: 10813: 10808: 10807: 10785: 10776: 10771: 10770: 10766: 10761: 10754: 10747: 10746: 10731: 10722: 10717: 10716: 10697: 10688: 10683: 10682: 10658: 10649: 10644: 10643: 10640: 10635: 10629: 10623: 10601: 10594: 10589: 10584: 10578: 10576: 10572: 10564: 10559: 10554: 10553: 10545: 10540: 10535: 10534: 10526: 10521: 10516: 10515: 10492: 10487: 10482: 10481: 10474: 10469: 10464: 10463: 10455: 10450: 10449: 10446: 10441: 10436: 10431: 10426: 10409: 10400: 10395: 10389: 10387: 10383: 10375: 10370: 10369: 10354: 10345: 10344: 10338: 10333: 10332: 10329: 10324: 10319: 10314: 10309: 10303: 10295: 10284: 10279: 10275: 10270: 10268: 10264: 10260: 10257: 10254: 10249: 10246: 10245: 10242: 10240: 10234: 10205:Encodings of 10202: 10189: 10185: 10184:Xeon "Nocona" 10175: 10162: 10158: 10150: 10147: 10142: 10137: 10136: 10132: 10127: 10122: 10121: 10117: 10112: 10107: 10106: 10102: 10097: 10092: 10091: 10087: 10082: 10077: 10076: 10072: 10067: 10062: 10061: 10057: 10052: 10045: 10044: 10040: 10035: 10030: 10029: 10025: 10022: 10017: 10012: 10011: 10007: 10002: 9997: 9996: 9990: 9983: 9976: 9975: 9971: 9966: 9961: 9960: 9956: 9951: 9946: 9945: 9938: 9933: 9928: 9927: 9924: 9921: 9918: 9915: 9912: 9911: 9908: 9893: 9886: 9879: 9868: 9867: 9866: 9861: 9837:On Nehemiah, 9834: 9817: 9810: 9796: 9773: 9766: 9758: 9740: 9738: 9736: 9708: 9706: 9691: 9673: 9656: 9649: 9636:mnemonic for 9615: 9608: 9593:For both the 9590: 9588: 9564: 9557: 9553: 9529: 9527: 9503: 9496: 9458: 9453: 9451: 9443: 9427: 9418: 9386: 9379: 9375: 9369: 9363: 9353: 9350: 9349: 9343: 9340: 9339: 9333: 9330: 9329: 9323: 9320: 9319: 9313: 9310: 9309: 9303: 9300: 9299: 9293: 9290: 9289: 9283: 9280: 9279: 9275: 9272: 9271: 9265: 9255:forms of the 9240: 9229: 9225: 9208: 9190: 9187: 9184: 9183: 9179:"Not Greater" 9172: 9169: 9166: 9165: 9154: 9151: 9148: 9147: 9140: 9137: 9134: 9133: 9122: 9119: 9116: 9115: 9111:"Parity Even" 9108: 9105: 9102: 9101: 9094: 9091: 9088: 9087: 9084:SF=1: "Sign" 9083: 9080: 9077: 9076: 9069: 9066: 9063: 9062: 9051: 9048: 9045: 9044: 9033: 9030: 9027: 9026: 9022: 9019: 9016: 9015: 9000: 8997: 8994: 8993: 8986: 8983: 8980: 8979: 8972: 8969: 8966: 8965: 8961: 8958: 8955: 8954: 8950: 8946: 8943: 8940: 8939: 8935: 8929: 8922: 8914: 8901: 8892: 8882: 8867: 8857: 8847:8000_0007:EDX 8844: 8840: 8836: 8832: 8826: 8822: 8819:Invariant TSC 8814: 8810: 8806: 8802: 8798: 8794: 8790: 8784: 8780: 8774:) are needed. 8744: 8742: 8728: 8726: 8724: 8716: 8712: 8708: 8697: 8690: 8676: 8659: 8646: 8634: 8632: 8624: 8610: 8604: 8578: 8567: 8562: 8551: 8546: 8545: 8541: 8532: 8531: 8525: 8520: 8519: 8515: 8510: 8509: 8506:TSC_DEADLINE 8505: 8500: 8499: 8495: 8490: 8489: 8485: 8480: 8479: 8475: 8470: 8469: 8465: 8462: 8461: 8455: 8440: 8439:CPU microcode 8430: 8426: 8418: 8411: 8406: 8401: 8400: 8397: 8396:C3 "Nehemiah" 8390: 8383: 8377: 8371: 8364: 8361: 8357: 8352: 8347: 8346: 8342: 8335: 8330: 8325: 8324: 8321: 8316: 8309: 8306: 8302: 8297: 8292: 8291: 8287: 8283: 8278: 8273: 8269: 8259: 8244: 8243: 8237: 8225: 8224: 8221: 8215: 8206: 8202: 8193: 8183: 8182: 8179: 8172: 8168: 8161: 8157: 8154: 8152: 8148: 8144: 8137: 8127: 8126: 8122: 8119: 8118:C3 "Nehemiah" 8113: 8106: 8102: 8095: 8089: 8085: 8082: 8079: 8072: 8065: 8064: 8061: 8055: 8049: 8043: 8037: 8030: 8025: 8022: 8019: 8015: 8010: 8005: 8004: 8000: 7997: 7991: 7985: 7978: 7974: 7967: 7961: 7957: 7954: 7952: 7947: 7943: 7938: 7933: 7932: 7929: 7923: 7917: 7910: 7906: 7899: 7893: 7889: 7886: 7877: 7874: 7867: 7863:CMPXCHG8B m64 7860: 7859: 7856: 7850: 7844: 7838: 7832: 7826: 7820: 7814: 7810: 7807: 7805: 7799: 7790: 7786: 7781: 7778: 7774: 7773: 7770: 7764: 7758: 7752: 7746: 7740: 7733: 7730:Intel 386SL, 7728: 7721: 7717: 7713: 7708: 7703: 7702: 7699: 7695: 7691: 7686: 7681: 7680: 7677: 7671: 7664: 7660: 7653: 7647: 7641: 7631: 7627: 7622: 7617: 7616: 7612: 7608: 7606: 7603: 7600: 7597: 7594: 7593: 7590: 7588: 7580: 7576: 7550: 7537: 7518: 7516: 7498: 7477: 7446: 7444: 7436: 7432: 7421: 7417: 7409: 7402: 7397: 7396: 7392: 7387: 7382: 7381: 7375: 7371: 7367: 7360: 7355: 7354: 7348: 7339: 7338: 7335: 7327: 7317: 7312: 7311: 7303: 7290: 7289: 7286: 7270: 7260: 7255: 7254: 7248: 7237: 7230: 7225: 7224: 7221: 7218: 7215: 7212: 7209: 7208: 7203: 7189: 7172: 7170: 7138: 7136: 7126: 7107: 7094: 7082: 7064: 7041: 7028: 7026: 6996: 6995:memory paging 6992: 6972: 6966: 6949: 6947: 6945: 6943: 6931: 6917: 6895: 6893: 6891: 6889: 6887: 6885: 6877: 6855: 6844: 6834: 6816: 6813: 6810: 6809: 6805:"Not Greater" 6798: 6795: 6792: 6791: 6780: 6777: 6774: 6773: 6766: 6763: 6760: 6759: 6748: 6745: 6742: 6741: 6737:"Parity Even" 6734: 6731: 6728: 6727: 6720: 6717: 6714: 6713: 6710:SF=1: "Sign" 6709: 6706: 6703: 6702: 6695: 6692: 6689: 6688: 6677: 6674: 6671: 6670: 6659: 6656: 6653: 6652: 6648: 6645: 6642: 6641: 6626: 6623: 6620: 6619: 6612: 6609: 6606: 6605: 6598: 6595: 6592: 6591: 6587: 6584: 6581: 6580: 6576: 6572: 6569: 6566: 6565: 6561: 6556: 6548: 6540: 6533: 6525: 6523: 6496: 6494: 6462: 6444: 6442: 6423:differs from 6402: 6373: 6371: 6369: 6358: 6354: 6353: 6333: 6331: 6329: 6327: 6322: 6314: 6311: 6306: 6300: 6295: 6294: 6290: 6285: 6280: 6279: 6275: 6270: 6265: 6264: 6258: 6253: 6252: 6246: 6241: 6240: 6234: 6229: 6228: 6225: 6212: 6207: 6206: 6200: 6196: 6193: 6188: 6179: 6178: 6174: 6170: 6165: 6160: 6159: 6155: 6154:test register 6151: 6146: 6141: 6140: 6137: 6133: 6128: 6123: 6122: 6118: 6114: 6109: 6104: 6103: 6100: 6084: 6079: 6074: 6073: 6066: 6062: 6057: 6052: 6051: 6047: 6041: 6030: 6029: 6023: 6012: 6011: 6008: 6005:from memory. 6004: 5995: 5986: 5985: 5979: 5974: 5973: 5967: 5962: 5961: 5955: 5950: 5949: 5940: 5935: 5934: 5928: 5923: 5922: 5910: 5905: 5904: 5900: 5896: 5891: 5886: 5885: 5882: 5878: 5875: 5868: 5863: 5860: 5853: 5848: 5847: 5843: 5836: 5831: 5830: 5824: 5819: 5818: 5814: 5805: 5800: 5799: 5793: 5788: 5787: 5775: 5770: 5769: 5765: 5759: 5754: 5753: 5735: 5729: 5722: 5721: 5715: 5710: 5709: 5692: 5687: 5682: 5681: 5677: 5674: 5667: 5662: 5661: 5654: 5651: 5644: 5639: 5638: 5634: 5630: 5625: 5622:BTC r/m, imm8 5620: 5619: 5616: 5607: 5602: 5601: 5597: 5592: 5589:BTR r/m, imm8 5587: 5586: 5583: 5574: 5569: 5568: 5564: 5559: 5556:BTS r/m, imm8 5554: 5553: 5550: 5546: 5537: 5532: 5531: 5527: 5522: 5517: 5516: 5510: 5508: 5504: 5498: 5490: 5485: 5484: 5481: 5478: 5475: 5472: 5469: 5468: 5444: 5434: 5409: 5395: 5378: 5361: 5298: 5277: 5270: 5266: 5260: 5242: 5236:) holds true. 5169: 5148: 5144: 5134: 5132: 5128: 5124: 5116: 5111: 5106: 5105: 5099: 5096: 5091: 5086: 5085: 5076: 5073: 5070:Push 32-bit E 5069: 5064: 5059: 5058: 5052: 5049: 5044: 5039: 5038: 5032: 5029: 5024: 5019: 5018: 5012: 5009: 5005: 4999: 4992: 4991: 4985: 4983: 4975: 4970: 4965: 4964: 4955: 4952: 4949: 4944: 4939: 4935: 4931: 4925: 4919: 4914: 4909: 4908: 4899: 4893: 4888: 4883: 4882: 4876: 4870: 4865: 4860: 4859: 4853: 4847: 4842: 4837: 4836: 4830: 4824: 4819: 4814: 4813: 4807: 4801: 4796: 4791: 4790: 4781: 4775: 4770: 4765: 4761: 4758: 4755: 4752: 4749: 4746: 4743: 4740: 4739: 4733: 4715: 4704: 4703: 4702: 4699: 4697: 4693: 4689: 4662: 4648: 4647: 4646: 4636: 4631: 4629: 4625: 4618: 4600: 4598: 4590: 4580: 4567: 4556: 4552: 4542: 4523: 4517: 4505: 4502: 4495: 4492: 4488: 4481: 4480: 4463: 4461: 4459: 4426: 4419: 4404: 4390: 4378: 4372: 4365: 4339: 4337: 4335: 4333: 4331: 4323: 4282: 4280: 4278: 4276: 4271: 4259: 4254: 4249: 4248: 4234: 4229: 4226: 4221: 4220: 4216: 4212: 4207: 4202: 4201: 4197: 4190: 4185: 4184: 4180: 4175: 4170: 4169: 4162: 4152: 4148: 4143: 4138: 4137: 4130: 4124: 4120: 4115: 4108: 4107: 4103: 4099: 4094: 4089: 4088: 4081: 4076: 4071: 4070: 4066: 4061: 4056: 4055: 4051: 4046: 4041: 4040: 4030: 4025: 4018: 4017: 4013: 4010: 4008: 4002: 3997: 3993: 3989: 3988: 3981: 3976: 3971: 3970: 3966: 3961: 3956: 3955: 3951: 3946: 3941: 3940: 3936: 3932: 3928: 3922: 3917: 3910: 3909: 3899: 3895: 3890: 3885: 3884: 3880: 3877: 3874: 3871: 3868: 3865: 3862: 3861: 3858: 3856: 3852: 3845: 3834: 3833: 3795: 3788: 3785: 3781: 3780: 3777: 3662: 3658: 3651: 3648: 3644: 3643: 3618: 3614: 3607: 3548: 3545: 3542: 3537: 3536: 3477: 3474: 3471: 3466: 3465: 3461: 3460: 3410: 3404: 3400: 3397: 3394: 3389: 3388: 3384: 3383: 3336: 3330: 3326: 3323: 3321: 3317: 3312: 3311: 3307: 3304: 3302: 3298: 3293: 3292: 3288: 3285: 3282: 3279: 3278: 3273: 3269: 3230: 3223:r/m ^= r/imm; 3220: 3218: 3215: 3210: 3209: 3203: 3198:behaves like 3197: 3194: 3189: 3188: 3170: 3167: 3163: 3159: 3129: 3127:Exchange data 3126: 3121: 3120: 3114: 3111: 3107: 3104: 3099: 3098: 3072: 3062: 3059: 3056: 3052: 3051: 3024: 3017:r/m -= r/imm; 3014: 3011: 3006: 3005: 2999: 2926: 2915: 2910: 2909: 2903: 2830: 2819: 2814: 2813: 2807: 2802: 2799: 2796: 2792: 2791: 2785: 2780: 2777: 2772: 2771: 2765: 2760: 2757: 2752: 2751: 2733: 2731: 2728: 2723: 2722: 2704: 2702: 2699: 2696: 2691: 2690: 2684: 2682: 2667: 2662: 2661: 2655: 2653: 2638: 2633: 2632: 2605: 2602: 2592: 2589: 2584: 2583: 2565: 2555: 2552: 2547: 2546: 2528: 2518: 2515: 2512: 2507: 2506: 2500: 2498: 2495: 2490: 2489: 2471: 2469: 2466: 2461: 2460: 2442: 2440: 2437: 2432: 2431: 2421: 2419: 2416: 2411: 2410: 2400: 2398: 2395: 2390: 2389: 2386: 2383: 2380: 2375: 2374: 2364: 2357: 2354: 2349: 2348: 2330: 2328: 2325: 2320: 2319: 2301: 2299: 2296: 2291: 2290: 2284: 2265: 2262: 2257: 2256: 2250:(both 186+), 2218: 2193: 2190: 2185: 2184: 2178: 2173: 2170: 2166: 2161: 2160: 2130: 2116: 2114: 2110: 2105: 2104: 2086: 2068: 2065: 2060: 2059: 2032: 2012: 2010: 2007: 2002: 2001: 1991: 1969: 1967: 1963: 1958: 1957: 1951: 1948:XCHG EAX, EAX 1945: 1942: 1939: 1935: 1934: 1924: 1890: 1887: 1884: 1879: 1878: 1868: 1858: 1855: 1850: 1849: 1843: 1720: 1709: 1704: 1703: 1697: 1573: 1562: 1557: 1556: 1546: 1536: 1533: 1528: 1527: 1517: 1478: 1475: 1465: 1464: 1458: 1397: 1386: 1381: 1380: 1374: 1313: 1302: 1297: 1296: 1290: 1287: 1284: 1279: 1278: 1272: 1270: 1267: 1262: 1261: 1255: 1253: 1251: 1248: 1243: 1242: 1236: 1234: 1231: 1226: 1225: 1219: 1217: 1214: 1209: 1208: 1190: 1188: 1185: 1182: 1178: 1177: 1171: 1169: 1166: 1161: 1160: 1141: 1134: 1132: 1129: 1124: 1123: 1117: 1115: 1112: 1107: 1106: 1100: 1098: 1095: 1090: 1089: 1079: 1077: 1075: 1071: 1068: 1064: 1063: 1045: 1043: 1040: 1035: 1034: 1016: 998: 995: 990: 989: 974:(both 186+), 966: 963:AX = AL * r/m 956: 953: 948: 947: 937: 919: 917:Signed divide 916: 911: 910: 904: 902: 899: 896: 892: 891: 881: 879: 877: 873: 868: 867: 857: 839: 836: 833: 828: 827: 809: 807: 804: 799: 798: 792: 790: 787: 784: 780: 779: 773: 770: 766: 763: 760: 756: 755: 749: 747: 744: 739: 738: 732: 730: 715: 710: 709: 703: 701: 686: 681: 680: 653: 651: 648: 643: 642: 636: 631: 628: 623: 622: 616: 611: 609: 605: 602: 598: 597: 591: 586: 584: 580: 575: 574: 568: 563: 561: 557: 552: 551: 545: 540: 537: 532: 531: 513: 500: 498: 495: 490: 489: 462: 452: 450: 447: 442: 441: 414: 407:r/m += r/imm; 404: 401: 396: 395: 368: 365: 360: 357: 352: 351: 345: 343: 340: 335: 334: 328: 325: 322: 317: 316: 310: 307: 297: 293: 290: 285: 284: 278: 276: 272: 269: 266: 262: 257: 254: 251: 244: 243: 237: 235: 231: 227: 223: 219: 215: 205: 203: 199: 196:and (64-bit) 195: 191: 187: 183: 179: 175: 171: 167: 163: 159: 155: 151: 147: 141: 131: 129: 124: 122: 121:computer file 118: 114: 110: 106: 103: 91: 86: 84: 79: 77: 72: 71: 69: 68: 62: 59: 56: 55:Cryptographic 53: 50: 47: 44: 41: 38: 35: 34: 33: 32: 29: 26: 25: 21: 20: 26585: 26436:Machine code 26421:Disassembler 26313:. Retrieved 26309: 26272: 26260: 26248: 26236: 26222: 26209: 26196: 26183: 26170: 26157: 26144: 26131: 26125:CLZERO – x86 26119: 26102: 26092:– via 26087:. Retrieved 26072: 26062:– via 26057:. Retrieved 26042: 26029: 26013: 26000: 25983: 25952: 25939: 25914: 25905:Instlatx64, 25901: 25888: 25875: 25862: 25849: 25832: 25815: 25798: 25785: 25760: 25735: 25718: 25709:Hadi Brais, 25705: 25692: 25683:Hadi Brais, 25679: 25666: 25654: 25642: 25629: 25618: 25608: 25598:– via 25593:. Retrieved 25578: 25565: 25552: 25540: 25527: 25514: 25501: 25488: 25471: 25454: 25441: 25429: 25420: 25407: 25388: 25371: 25334:. Retrieved 25325: 25316: 25305:. Retrieved 25296: 25286: 25209: 25192: 25168: 25159: 25139: 25130: 25117: 25100: 25087: 25074: 25057: 25040: 25023: 25015: 25006: 24989: 24972: 24955: 24943: 24902: 24885: 24880:instruction) 24868: 24851: 24834: 24817: 24804: 24792: 24783: 24766: 24758:the original 24748: 24735: 24718: 24701: 24688: 24674: 24651: 24628: 24619: 24613:. Retrieved 24603: 24595: 24592:the original 24581: 24564: 24552: 24543: 24531: 24523:www.pcjs.org 24522: 24513: 24500: 24483: 24471: 24462: 24425: 24412: 24395: 24378: 24361: 24348:VCF Forums, 24344: 24325: 24308: 24295: 24283: 24266: 24250: 24233: 24216: 24179: 24171:eecs.wsu.edu 24170: 24158: 24147:. Retrieved 24138: 24083: 24041:instructions 24018: 23907: 23882:bits of the 23850: 23845:instruction. 23698: 23666: 23624: 22817:FUCOMP st(i) 22663: 22511: 22470: 22457: 22381: 22368: 22363:calculation. 22295: 22270: 22263: 22119: 22094: 22081: 22067: 21946: 21812: 21783: 21748: 21731: 21714:FFREEP st(i) 21427:Intel:  21064:80387:  20742:80387:  17998:instructions 17984: 17958: 17951: 17900: 17880: 17871: 17802: 17674: 17391: 17328:"Not Parity" 17158: 17152: 17144: 17137: 17108: 17084: 17038: 17013: 16960: 16937: 16872: 16860: 16842: 16835: 16779: 16752: 16736: 16723: 16673: 16661: 16652: 16536: 16515: 16508: 16413:B (EWB) 16405:A (EPA) 16304: 16291: 16201: 16182: 16071: 16061: 16013: 15932: 15840: 15758: 15725:SENDUIPI reg 15685: 15607: 15450: 15357: 15334: 15260: 15165:branch hints 15092: 15071: 15047: 15001:0F 0D /2../7 14972: 14943: 14922: 14905: 14898: 14845: 14830: 14821:Support for 14817: 14798: 14777: 14736: 14729: 14644: 14627: 14616: 14567: 14490: 14467: 14446: 14433: 14415: 14376:Athlon 64 X2 14362: 14340: 14323: 14304: 14251:XCHG R8D,EAX 14202: 14172: 14149: 14102: 14079: 14011: 13228:PREFETCHW m8 13180: 13013:WRGSBASE r64 13009:WRGSBASE r32 12990:WRFSBASE r64 12986:WRFSBASE r32 12967:RDGSBASE r64 12963:RDGSBASE r32 12921:RDFSBASE r64 12917:RDFSBASE r32 12158: 12149: 12132: 12066:XSAVES64 mem 12009:XSAVEC64 mem 11961:Sandy Bridge 11920:XSAVEOPT mem 11846:XRSTOR64 mem 11733: 11727: 11711: 11551:CLRSSBSY m64 11452:RSTORSSP m64 11352:Shadow stack 11306:shadow stack 11299: 11207:Cascade Lake 11109: 11063: 11055: 11048:XBEGIN rel32 11043:XBEGIN rel16 10972: 10955: 10922: 10897: 10852: 10759: 10556:BLSR reg,r/m 10518:BLSI reg,r/m 10236: 10201: 10174: 10161: 10020: 9897: 9864: 9833: 9816: 9795: 9772: 9690: 9672: 9655: 9624:opcode, the 9614: 9563: 9556:NEC V-series 9502: 9457:GNU Binutils 9426: 9417: 9385: 9380:feature bit. 9368: 9361: 9264: 9239: 9207: 9129:"Parity Odd" 9125:"Not Parity" 8933: 8927: 8920: 8913: 8900: 8881: 8856: 8787:Constant TSC 8779: 8696: 8675: 8658: 8645: 8603: 8577: 8561: 8454: 8449:on AMD CPUs. 8429: 8233:UD2B reg,r/m 8204: 8150: 8140:NFx 0F 1F /0 7949: 7944:Read 64-bit 7804:is present. 7792:Support for 7791: 7788: 7719: 7714:Resume from 7697: 7584: 7549: 7536: 7497: 7476: 7420: 7373: 7345:XADD r/m,r32 7341:XADD r/m,r16 7329: 7280: 7242: 7188: 7125: 7063: 7040: 6965: 6902:to/from the 6854: 6833: 6755:"Parity Odd" 6751:"Not Parity" 6559: 6554: 6546: 6538: 6531: 6461: 6401: 6219: 6198: 6197:breakpoint. 6183: INT01, 6181: ICEBP, 6135: 6086: 6006: 5880: 5873: 5866: 5858: 5851: 5733: 5690: 5670:NFx 0F BD /r 5647:NFx 0F BC /r 5628: 5614: 5595: 5581: 5562: 5548: 5545:Test-and-set 5525: 5519:BT r/m, imm8 5500: 5457:instruction. 5433: 5394: 5377: 5360: 5297: 5276: 5259: 5241: 5168: 5147: 5130: 5003: 4977: 4727: 4700: 4677: 4632: 4627: 4623: 4621: 4579: 4566: 4541: 4536:instruction. 4516: 4418: 4413:instruction. 4401:) without a 4371: 4004: 3848: 3783: 3775: 3660: 3646: 3616: 3319: 3300: 3217:Exclusive OR 2601:undocumented 2467:Rotate right 2118:r/m = *SP++; 1943:No operation 1476:Loop control 233: 229: 225: 221: 217: 213: 211: 165: 161: 157: 153: 143: 125: 111:-compatible 99: 61:Discontinued 36: 27: 26515:Programming 25776:mnemonics. 25569:Anandtech, 25531:CPU-World, 25518:CPU-World, 25492:Transmeta, 24976:CPU-World, 24495:on page 86. 24472:OS/2 Museum 24429:Can Bölük, 24365:rep lodsb, 24013:otherwise.) 23983:FXRSTOR(64) 23550:NP 0F AE /1 23524:NP 0F AE /0 23244:Pentium Pro 22799:FUCOM st(i) 22076:processors. 21815:26 DD 77 06 21800:26 DD 77 06 21659:FFREE st(i) 21232:8087:  21002:8087:  20914:, such that 20690:8087:  20393:square root 20171:compliant): 19597:FCOMP st(i) 17969:, then the 17819:MOV RDI,CR8 17813:44 0F 20 07 17782:NP 0F 01 FF 17757:NP 0F 01 FE 17711:F3 0F 01 FA 17665:NP 0F 01 FD 17626:NP 0F 01 FC 17580:NP 0F 01 FB 17553:NP 0F 01 FA 17521:F0 0F 22 /0 17514:MOV CR8,reg 17495:F0 0F 20 /0 17490:MOV reg,CR8 17448:Instruction 17425:PREFETCHIT1 17421:PREFETCHIT0 17225:"Not Below" 17172:Condition ( 17075:(Reserved) 17004:(Reserved) 16762:RTIT_STATUS 16602:5 (EACCEPT) 16581:3 (ERESUME) 16565:1 (EGETKEY) 16557:0 (EREPORT) 16521:Rocket Lake 16336:Add a page 16195:NP 0F 01 C7 16007:F3 0F 01 C6 15981:F2 0F 01 C6 15927:NP 0F 01 C6 15819:F3 0F 01 EF 15804:F3 0F 01 EE 15783:F3 0F 01 ED 15753:F3 0F 01 EC 15730:F3 0F C7 /6 15678:HRESET imm8 15644:NP 0F 01 E8 15598:66 0F AE /6 15572:F2 0F AE /6 15540:F3 0F AE /6 15487:NP 0F 1C /0 15482:CLDEMOTE m8 15459:Ice Lake-SP 15445:NP 0F 01 C5 15393:F3 0F AE /4 15351:NP 0F 01 C0 15328:NP 0F 01 D7 15308:Ice Lake-SP 15298:Ice Lake-SP 15254:NP 0F 01 CF 15203:Meteor Lake 15135:Instruction 14583:MWAIT Hint 14269:XCHG R8,RAX 14116:speculation 13975:All of the 13921:Ice Lake-SP 13739:F3 0F C7 /7 13652:NP 0F 01 EF 13609:NP 0F 01 EE 13548:PREFETCHWT1 13471:NP 0F 01 CB 13429:NP 0F 01 CA 13339:unchanged. 13276:PREFETCH m8 13160:entries by 13156:Invalidate 13087:Steamroller 13018:F3 0F AE /3 12995:F3 0F AE /2 12972:F3 0F AE /1 12946:Steamroller 12926:F3 0F AE /0 12842:Accumulate 12775:F3 0F B8 /r 12602:NP 0F 01 C9 12553:NP 0F 01 C8 12500:NP 0F AE /7 12446:NP 0F C3 /r 12275:Pentium III 12216:Instruction 12112:NP 0F C7 /3 12103:XRSTORS mem 12071:NP 0F C7 /5 12014:NP 0F C7 /4 11967:Steamroller 11931:NP 0F AE /6 11889:NP 0F 01 D1 11872:NP 0F 01 D0 11851:NP 0F AE /5 11800:NP 0F AE /4 11795:XSAVE64 mem 11753:Instruction 11619:F3 0F 1E FA 11596:F3 0F 1E FB 11556:F3 0F AE /6 11541:F3 0F 01 E8 11457:F3 0F 01 /5 11442:F3 0F 01 EA 11437:SAVEPREVSSP 11412:F3 0F 1E /1 11395:INCSSPQ r64 11370:F3 0F AE /5 11365:INCSSPD r32 11327:Description 11321:Instruction 11312:(CET_IBT). 11293:Added with 11281:F2 0F 01 E9 11257:F2 0F 01 E8 11201:Coffee Lake 11144:NP 0F 01 D6 11127:NP 0F 01 D5 11103:XABORT imm8 11091:Ice Lake-SP 11034:Restricted 11015:Description 11009:Instruction 10985:processors. 10411:F3 0F BC /r 10356:F3 0F BD /r 10297:F3 0F B8 /r 10250:Instruction 10239:VEX-encoded 10054:REX.W 63 /r 9913:Instruction 9858:Added with 9659:On K6, the 9442:Pentium Pro 9374:Pentium Pro 9305:0F 1F 40 00 9054:"Not Above" 9040:"Not Equal" 9007:"Not Below" 9003:"Not Carry" 8947:Condition ( 8932:, with the 8841:and later; 8829:Present in 8526:HWP_REQUEST 8360:System call 8305:System call 8256:UD0 reg,r/m 8227:UD1 reg,r/m 8160:Pentium Pro 8088:Pentium Pro 8036:Pentium Pro 8029:Pentium MMX 7601:Description 7595:Instruction 7314:XADD r/m,r8 7216:Description 7210:Instruction 7200:Added with 6973:, moves to 6920:CRx/DRx/TRx 6876:far pointer 6680:"Not Above" 6666:"Not Equal" 6633:"Not Below" 6629:"Not Carry" 6573:Condition ( 6308: 0F 07 6162:MOV TRx,reg 6143:MOV reg,TRx 6125:MOV DRx,reg 6106:MOV reg,DRx 6076:MOV CRx,reg 6054:MOV reg,CRx 6003:far pointer 5888:IMUL r, r/m 5476:Description 5232:, ZF=0 for 5153:EFLAGS.DF=1 4951:Sign-extend 4750:Description 4730:ADD EAX,EBX 4628:AddressSize 4624:OperandSize 4615:Added with 4501:Pentium Pro 4231: 0F 05 4172:LSL r,r/m16 4140:LAR r,r/m16 3896:Load GDTR ( 3863:Instruction 3842:Added with 3407:OUTSB/OUTSW 3280:Instruction 3266:Added with 3227:r ^= m/imm; 3021:r -= m/imm; 3012:Subtraction 2438:Rotate left 1966:logical NOT 449:Logical AND 411:r += r/imm; 26606:Categories 26534:Carry flag 26524:Call stack 26456:Assemblers 26123:Wikichip, 26089:2023-04-20 26059:2023-01-23 25595:2023-01-20 25336:2023-12-15 25307:2023-12-15 25277:byte) and 25179:and added 25044:JookWiki, 24669:encodings. 24646:encodings. 24615:2018-10-03 24222:UMIP – x86 24220:WikiChip, 24149:2013-04-21 24130:References 23979:FXSAVE(64) 23702:The 80387 23608:FISTTP m64 23596:FISTTP m32 23584:FISTTP m16 23491:Pentium II 23466:, then pop 23429:, then pop 22350:{C0,C3,C1} 21951:FSTP ST(0) 21794:FNSAVE ES: 21503:AMD:  19915:FICOMP m32 19897:FICOMP m16 19849:FIDIVR m32 19831:FIDIVR m16 19783:FISUBR m32 19765:FISUBR m16 19402:FCOM st(i) 18745:FXCH st(i) 18434:FSTP st(i) 18097:FNSTSW m16 18077:FNSTCW m16 17679:Usually 3 17620:CLZERO rAX 17353:"Not Less" 17303:"Not Sign" 17250:"Not Zero" 16610:6 (EMODPE) 16573:2 (EENTER) 16525:Tiger Lake 16238:Willamette 16210:Lunar Lake 16108:Lunar Lake 15700:Alder Lake 15655:Alder Lake 15589:TPAUSE r32 15583:Usually 3 15563:UMWAIT r32 15556:Alder Lake 15505:Alder Lake 14834:While the 14770:C000_0103h 14721:8 (WAKEUP) 14713:7 (SMCTRL) 14689:4 (SENTER) 14611:Not used. 14366:While the 14344:While the 14039:CLFLUSHOPT 13980:generated. 13867:Tiger Lake 13816:Tiger Lake 13706:Tiger Lake 13625:Comet Lake 13491:CLFLUSHOPT 13356:ZhangJiang 13268:ZhangJiang 13258:Silvermont 13252:Cedar Mill 13194:ZhangJiang 13092:ZhangJiang 12956:ZhangJiang 12941:Ivy Bridge 12864:ZhangJiang 12827:(non-SIMD) 12735:Silvermont 12721:Usually 3 12660:Usually 0 12562:Usually 0 12494:CLFLUSH m8 12378:(non-SIMD) 12250:(non-SIMD) 12062:XSAVES mem 12005:XSAVEC mem 11982:ZhangJiang 11842:XRSTOR mem 11835:ZhangJiang 11660:ENDBR32/64 11607:Tiger Lake 11583:ENDBR32/64 11422:RDSSPQ r64 11407:RDSSPD r32 11382:Tiger Lake 11318:CET Subset 11083:Comet Lake 11006:TSX Subset 10634:ZhangJiang 10440:ZhangJiang 10430:Piledriver 10323:ZhangJiang 10194:CMPXCHG16B 10180:CMPXCHG16B 10167:CMPXCHG16B 10014:JRCXZ rel8 9873:replacing 9567:While the 9430:While the 9157:"Not Less" 9097:"Not Sign" 9036:"Not Zero" 8609:Ivy Bridge 8548:C001_011Bh 8476:SPEC_CTRL 8447:C001_0020h 8380:Transmeta 8370:Pentium II 8277:Cyrix 6x86 8110:Transmeta 8023:Usually 3 7988:Transmeta 7955:Usually 3 7920:Transmeta 7835:Transmeta 7808:Usually 3 7761:Transmeta 7674:Transmeta 6985:if such a 6783:"Not Less" 6723:"Not Sign" 6662:"Not Zero" 6185: INT1 6115:Move from 6063:Move from 5833:SETcc r/m8 5664:BSR r, r/m 5641:BSF r, r/m 5604:BTC r/m, r 5571:BTR r/m, r 5534:BTS r/m, r 5082:Usually 3 5074:onto stack 4995:JECXZ rel8 4905:Usually 0 4572:0x00FFFF00 4520:In 64-bit 4489:in x86-64 4204:VERW r/m16 4187:VERR r/m16 4157:0x00FxFF00 4073:SLDT r/m16 4058:SMSW r/m16 4037:Usually 3 3973:LLDT r/m16 3943:LMSW r/m16 3793:immediate 3656:immediate 3612:immediate 2596:SBB AL, AL 2171:from stack 2083:port = AX; 2079:port = AX; 2075:port = AL; 2071:port = AL; 2009:Logical OR 1495:&& 1013:AX = port; 1009:AX = port; 1005:AL = port; 1001:AL = port; 932:resulting 924:resulting 874:Used with 852:resulting 844:resulting 560:carry flag 364:carry_flag 117:executable 26591:Registers 26554:Zero flag 25866:Vulners, 24812:, line 69 24713:, page 55 23826:≈ 23820:⌋ 23817:π 23814:∗ 23801:⌊ 23796:π 23793:∗ 23654:F(N)SETPM 23650:F(N)STENV 23630:Real Mode 23190:∗ 23179:⁡ 23173:← 23104:∗ 23093:⁡ 23087:← 22951:∗ 22940:⁡ 22891:∗ 22880:⁡ 22795:operands. 22746:FNSTSW AX 22714:mnemonic 22689:Mnemonic 22644:π 22641:± 22618:π 22615:± 22587:π 22410:≤ 22397:− 22199:Infinity 21883:FXRSTOR64 21843:F(N)STENV 21806:FSAVE ES: 21572:− 21528:− 21471:− 21370:⁡ 21357:∗ 21339:← 21297:∞ 21266:≤ 21161:⁡ 21155:← 21075:≤ 21046:π 21041:≤ 21013:≤ 20925:⁡ 20851:⁡ 20838:∗ 20820:← 20795:Logarithm 20774:≤ 20756:≤ 20750:− 20719:≤ 20701:≤ 20663:− 20638:← 20477:∗ 20459:← 20356:∗ 20338:− 20320:← 20182:← 20107:≤ 20048:∗ 19929:precision 19882:FICOM m32 19864:FICOM m16 19816:FIDIV m32 19798:FIDIV m16 19750:FISUB m32 19732:FISUB m16 19717:FIMUL m32 19699:FIMUL m16 19684:FIADD m32 19666:FIADD m16 19650:precision 19585:FCOMP m64 19567:FCOMP m32 19425:precision 19324:FDIVR m64 19306:FDIVR m32 19196:FSUBR m64 19178:FSUBR m32 18963:precision 18943:FBSTP m80 18907:FISTP m64 18895:FISTP m32 18877:FISTP m16 18783:precision 18703:⁡ 18654:⁡ 18598:⁡ 18542:⁡ 18365:FST st(i) 18320:FLD st(i) 18262:precision 18059:FLDCW m16 18030:mnemonic 18008:Mnemonic 17994:Original 17930:Register 17720:EFLAGS.CF 17568:Excavator 17476:AltMovCr8 17464:Added in 17450:mnemonics 17397:CMPccXADD 17157:with the 17098:UINT_MISC 17031:SERIALIZE 16926:RFLAGS.CF 16795:Function 16689:Function 16589:4 (EEXIT) 16552:Function 16320:Function 16271:0F 80..8F 16121:PREFETCHI 16027:CMPCCXADD 16002:WRMSRLIST 15976:RDMSRLIST 15639:SERIALIZE 15629:SERIALIZE 15410:Kaby Lake 15198:Pentium 4 15151:Added in 15137:mnemonics 14965:PREFETCHW 14961:Pentium 4 14953:PREFETCHW 14932:PREFETCHW 14861:Function 14768:MSR (MSR 14697:5 (SEXIT) 14660:Function 14353:supports 14142:C001_1029 14062:, and an 14049:to order 13977:PREFETCH* 13951:Geode GX2 13839:MOVDIR64B 13734:RDPID r32 13696:Skylake-X 13630:Gracemont 13620:Skylake-X 13477:EFLAGS.AC 13444:Broadwell 13435:EFLAGS.AC 13416:EFLAGS.AC 13391:EFLAGS.OF 13361:Gracemont 13346:Broadwell 13337:EFLAGS.CF 13263:Broadwell 13217:PREFETCHW 13204:Gracemont 12859:Bulldozer 12796:Nano 3000 12415:C7 Esther 12400:Pentium 4 12288:Geode GX2 12232:Added in 12218:mnemonics 11820:Bulldozer 11791:XSAVE mem 11769:Added in 11755:mnemonics 11335:Added in 11295:Intel CET 11275:XRESLDTRK 11251:XSUSLDTRK 11018:Added in 10639:Gracemont 10628:Excavator 10445:Gracemont 10328:Gracemont 10261:Added in 10252:mnemonics 9809:long mode 9757:Real mode 9646:to add a 9395:0F 18..1F 9197:"Greater" 8809:Transmeta 8760:(but not 8733:CMPXCHG8B 8685:CMPXCHG8B 8496:TSX_CTRL 8486:PRED_CMD 8389:Geode GX2 7855:Green CPU 7609:Added in 7573:Added in 7405:NFx 0F 09 7357:INVLPG m8 7277:EFLAGS.ZF 7273:EFLAGS.ZF 7227:BSWAP r32 7105:will not. 7093:will not. 6823:"Greater" 5732:0F AC /r 5689:0F A4 /r 5627:0F BA /7 5594:0F BA /6 5561:0F BA /5 5524:0F BA /4 5487:BT r/m, r 5335:(opcodes 4551:Real mode 4522:long mode 4491:long mode 4403:CPU reset 4397:nor with 4091:STR r/m16 4005:The TSS ( 3937:as well. 3935:real mode 3872:Real mode 3857:as well. 3855:real mode 3802:example: 3668:example: 3624:example: 3333:INSB/INSW 1074:interrupt 633:CF = !CF; 234:immediate 128:registers 26464:A86/A386 26112:Archived 26022:Archived 25993:Archived 25932:original 25853:Guru3D, 25842:Archived 25825:Archived 25808:Archived 25778:Archived 25753:Archived 25728:Archived 25481:Archived 25464:Archived 25434:Archived 25330:Archived 25301:Archived 25202:original 25185:Archived 25152:Archived 25110:Archived 25067:Archived 25050:Archived 25033:Archived 24999:Archived 24982:Archived 24965:Archived 24912:Archived 24895:original 24861:Archived 24844:Archived 24827:Archived 24776:Archived 24728:Archived 24666:0F B0/B1 24643:0F A6/A7 24574:original 24557:Archived 24476:Archived 24455:Archived 24435:Archived 24405:Archived 24388:Archived 24371:Archived 24354:Archived 24334:Archived 24318:Archived 24243:Archived 24226:Archived 24209:Archived 24189:Archived 24088:See also 24024:F(N)SAVE 24007:CR0.EM=1 23975:CR0.EM=1 23955:F(N)SAVE 23898:bits of 23685:For the 23638:F(N)SAVE 23509:prefix) 22844:IEEE 754 22756:FSTSW AX 22498:For the 22385:For the 22242:Denormal 22026:For the 21918:F(N)DISI 21903:F(N)DISI 21879:FXSAVE64 21856:F(N)SAVE 21851:F(N)SAVE 20169:IEEE 754 20088:, where 19936:control 19934:rounding 19657:control 19655:rounding 19432:control 19430:rounding 19390:FCOM m64 19372:FCOM m32 19260:FDIV m64 19242:FDIV m32 19132:FSUB m64 19114:FSUB m32 19068:FMUL m64 19050:FMUL m32 19004:FADD m64 18986:FADD m32 18970:control 18968:rounding 18922:FBLD m80 18862:FIST m32 18844:FIST m16 18829:FILD m64 18817:FILD m32 18799:FILD m16 18790:control 18788:rounding 18416:FSTP m80 18404:FSTP m64 18386:FSTP m32 18269:control 18267:rounding 17586:MONITORX 17548:MONITORX 17538:MONITORX 17094:UINTR_TT 17090:SENDUIPI 16896:For the 16878:UMONITOR 16865:cleared. 16848:CLDEMOTE 16766:RTIT_CTL 16297:NetBurst 16161:0F 18 /6 16136:0F 18 /7 16083:aligned. 15578:UMONITOR 15472:CLDEMOTE 15113:in that 15111:WBNOINVD 15098:WBNOINVD 15077:MOVDIR64 15021:Xeon Phi 15009:0F 0D /2 14995:0F 0D /0 14983:0F 0D /0 14978:PREFETCH 14957:0F 0D /r 14949:PREFETCH 14928:PREFETCH 14631:For the 14520:NetBurst 14452:Xeon Phi 14394:For the 14351:Geode LX 14292:F3 4F 90 14283:F3 41 90 13994:For the 13905:F3 0F 09 13900:WBNOINVD 13890:WBNOINVD 13767:LuJiaZui 13762:Ice Lake 13640:LuJiaZui 13581:YongFeng 13563:0F 0D /2 13530:Goldmont 13459:LuJiaZui 13449:Goldmont 13282:0F 0D /0 13234:0F 0D /1 12951:Goldmont 12905:FSGSBASE 12712:0F 01 F9 12675:WuDaoKou 12650:NP 0F 37 12566:Prescott 12519:Geode LX 12410:Efficeon 12341:0F 18 /3 12326:0F 18 /2 12311:0F 18 /1 12299:Efficeon 12294:Nehemiah 12261:0F 18 /0 12168:Goldmont 12091:Goldmont 12034:Goldmont 11977:Goldmont 11947:XSAVEOPT 11910:XSAVEOPT 11830:Goldmont 11536:SETSSBSY 11241:TSXLDTRK 11216:XRELEASE 11178:XACQUIRE 11079:Ice Lake 10890:VIA Nano 10144:0F 01 F8 10129:REX.W AB 10114:REX.W AF 10069:REX.W A5 10037:REX.W AD 10004:REX.W CF 9968:REX.W A7 9953:REX.W 99 9935:REX.W 98 9916:Encoding 9839:SYSENTER 9822:SYSENTER 9801:SYSENTER 9782:SYSENTER 9761:SYSENTER 9749:SYSENTER 9711:For the 9618:For the 9481:Neither 9444:onwards. 9405:0F 1F /0 9390:0F 1F /0 9295:0F 1F 00 9249:but not 8998:NC,NB,AE 8839:Saltwell 8813:VIA Nano 8797:Prescott 8568:and the 8414:SYSENTER 8387:NatSemi 8349:SYSENTER 8266:0F FF /r 8239:0F B9 /r 8134:NOPL r/m 8105:MediaGXm 8075:0F 4x /r 7977:MediaGXm 7909:MediaGXm 7884:prefix. 7870:0F C7 /1 7663:MediaGXm 7563:WBNOINVD 7468:0F B0/B1 7462:0F A7 /r 7456:0F A6 /r 7363:0F 01 /7 7350:0F C1 /r 7334:prefix. 7320:0F C0 /r 7306:0F B1 /r 7285:prefix. 7263:0F B0 /r 7114:but not 6624:NC,NB,AE 6472:0F BD /r 6431:but not 6427:in that 6412:0F BC /r 6336:For the 6190: F1 6167:0F 26 /r 6148:0F 24 /r 6130:0F 23 /r 6111:0F 21 /r 6081:0F 22 /r 6059:0F 20 /r 6043:0F B2 /r 6025:0F B5 /r 5997:0F B4 /r 5893:0F AF /r 5839:0F 9x /0 5826:0F BF /r 5807:0F BE /r 5795:0F B7 /r 5777:0F B6 /r 5761:0F AD /r 5717:0F A5 /r 5676:Bit scan 5653:Bit scan 5609:0F BB /r 5576:0F B3 /r 5539:0F AB /r 5497:Bit Test 5492:0F A3 /r 5370:PUSHA(D) 5366:PUSHA(D) 5305:opcode ( 5301:For the 5265:CPL≤IOPL 5247:INSB/W/D 5245:For the 5198:prefix ( 4209:0F 00 /5 4193:0F 00 /4 4177:0F 03 /r 4145:0F 02 /r 4096:0F 00 /1 4078:0F 00 /0 4063:0F 01 /4 4048:0F 01 /1 4027:0F 01 /0 3999:0F 00 /3 3978:0F 00 /2 3948:0F 01 /6 3919:0F 01 /3 3892:0F 01 /2 3200:MOV AL, 3166:coma bug 3158:spinlock 2741:(186+), 2712:(186+), 2573:(186+), 2536:(186+), 2479:(186+), 2450:(186+), 2338:(186+), 2309:(186+), 1888:negation 1543:r = r/m; 1539:r/m = r; 1072:Call to 835:Unsigned 218:register 26315:21 June 26289:FSINCOS 26187:Intel, 26174:Intel, 26161:Intel, 26148:Intel, 26135:Intel, 26106:Intel, 26094:Twitter 26064:Twitter 26033:Intel, 26017:Intel, 26004:Intel, 25987:Intel, 25974:Intel, 25956:Intel, 25943:Intel, 25918:Intel, 25879:Intel, 25836:Intel, 25789:Intel, 25770:MONITOR 25745:MONITOR 25739:Intel, 25696:Intel, 25633:Intel, 25600:Twitter 25445:Intel, 25375:Intel, 25366:opcode. 25352:Cyrix, 25297:x86.lol 25265:Intel, 25213:Intel, 25196:Intel, 25121:Intel, 25027:Intel, 24926:Intel, 24855:Intel, 24838:Intel, 24739:Intel, 24692:Intel, 24661:CMPXCHG 24638:CMPXCHG 24487:Intel, 24312:Intel, 24299:Intel, 24203:Intel, 24109:AVX-512 23951:FXRSTOR 23941:FXRSTOR 23917:FXRSTOR 23868:FUCOMIP 23762:FSINCOS 23722:. Like 23659:FNSETPM 23477:DF E8+i 23456:DB E8+i 23438:DF F0+i 23419:DB F0+i 23385:DB D8+i 23368:DB D0+i 23351:DB C8+i 23336:DB C0+i 23321:DA D8+i 23304:DA D0+i 23289:DA C8+i 23274:DA C0+i 22997:FSINCOS 22832:FUCOMPP 22822:DD E8+i 22804:DD E0+i 22726:FNSETPM 22712:Waiting 22692:Opcode 22504:FYL2XP1 22484:Pentium 22276:FXTRACT 22244:number 22100:Pentium 21914:F(N)ENI 21907:F(N)ENI 21720:DF C0+i 21703:D9 D8+i 21665:DD C0+i 21644:FINCSTP 21629:FDECSTP 21417:FYL2XP1 20793:Base-2 20419:FRNDINT 20150:FXTRACT 19931:control 19652:control 19619:DE D0+i 19610:DC D8+i 19602:D8 D8+i 19551:DE F0+i 19530:DE F8+i 19509:DE E0+i 19488:DE E8+i 19467:DE C8+i 19446:DE C0+i 19427:control 19415:DC D0+i 19407:D8 D0+i 19353:DC F0+i 19341:D8 F8+i 19289:DC F8+i 19277:D8 F0+i 19225:DC E0+i 19213:D8 E8+i 19161:DC E8+i 19149:D8 E0+i 19097:DC C8+i 19085:D8 C8+i 19033:DC C0+i 19021:D8 C0+i 18965:control 18785:control 18773:DF C8+i 18764:DD C8+i 18750:D9 C8+i 18455:DF D8+i 18448:DF D0+i 18440:DD D8+i 18370:DD D0+i 18353:FST m64 18335:FST m32 18325:D9 C0+i 18308:FLD m80 18296:FLD m64 18278:FLD m32 18264:control 18208:(none) 18146:(none) 18068:(none) 18028:Waiting 18011:Opcode 17965:CR4.TSD 17895:clears. 17790:INVLPGB 17777:TLBSYNC 17752:INVLPGB 17742:INVLPGB 17706:MCOMMIT 17696:MCOMMIT 17559:MONITOR 17351:SF=OF: 16951:CR4.TSD 16785:PCONFIG 16772:PTWRITE 16758:PTWRITE 16079:  16054:  15960:MSRLIST 15922:WRMSRNS 15908:WRMSRNS 15551:Tremont 15525:WAITPKG 15499:Tremont 15440:PCONFIG 15430:PCONFIG 15374:PTWRITE 15313:Tremont 15303:OVERSUB 15276:Skylake 15085:prefix. 15062:CR4.TSD 15040:Zhaoxin 14915:INVPCID 14851:INVPCID 14808:CR4.TSD 14766:TSC_AUX 14599:Target 14540:Skylake 14479:MONITOR 14456:MONITOR 14439:MONITOR 14421:MONITOR 14396:MONITOR 14368:MONITOR 14355:CLFLUSH 14346:CLFLUSH 14051:CLFLUSH 14035:CLFLUSH 13872:Tremont 13821:Tremont 13780:MOVDIRI 13711:Tremont 13678:CLWB m8 13525:Skylake 13516:CLFLUSH 13189:Haswell 13152:INVPCID 13077:Haswell 13072:Bonnell 12854:Nehalem 12791:Nehalem 12730:Nehalem 12680:Tremont 12608:MONITOR 12576:Bonnell 12542:MONITOR 12532:MONITOR 12516:(SSE2), 12164:Skylake 12142:XRSTOR* 12086:Skylake 12029:Skylake 11738:EAX=0Dh 11704:ENDBR64 11700:ENDBR32 11629:NOTRACK 11614:ENDBR64 11591:ENDBR32 11572:CET_IBT 11357:issued. 11195:Haswell 11074:Haswell 10886:Nehalem 10622:Haswell 10425:Haswell 10318:Haswell 10276:(LZCNT) 9919:Meaning 9843:SYSEXIT 9826:SYSEXIT 9805:SYSEXIT 9786:SYSEXIT 9753:SYSEXIT 9717:SYSEXIT 9699:issues. 9677:SYSCALL 9661:SYSCALL 9246:reg,reg 9155:SF=OF: 8984:C,B,NAE 8891:CR4.PCE 8866:CR4.TSD 8843:Zhaoxin 8835:Nehalem 8831:AMD K10 8805:Bonnell 8711:Pentium 8681:CMPXCHG 8403:SYSEXIT 8338:SYSCALL 8294:SYSCALL 8220:Pentium 8129:NOP r/m 8054:WinChip 7984:WinChip 7960:Pentium 7916:WinChip 7892:Pentium 7847:NexGen 7831:WinChip 7813:Pentium 7757:WinChip 7739:Pentium 7670:WinChip 7646:Pentium 7553:If the 7482:CMPXCHG 7451:CMPXCHG 7233:0F C8+r 7033:MOV TRx 6993:and/or 6971:Pentium 6781:SF=OF: 6610:C,B,NAE 6465:If the 6405:If the 6356:index.) 6299:LOADALL 5964:PUSH GS 5937:PUSH FS 5443:segment 5267:or the 5163:prefix. 4688:control 4605:LOADALL 4427:.UMIP=1 4399:LOADALL 4364:Pentium 4225:LOADALL 3286:Meaning 3254:(186+) 3048:(186+) 2804:IF = 1; 2782:DF = 1; 2762:CF = 1; 2629:(186+) 2056:(186+) 1157:(386+) 986:(386+) 677:(186+) 613:IF = 0; 588:DF = 0; 565:CF = 0; 486:(186+) 438:(186+) 392:(186+) 306:NEC V20 258:Opcode 252:Meaning 26566:Opcode 26517:issues 26507:(WASM) 26501:(TASM) 26495:(NASM) 26489:(MASM) 26471:(FASM) 26404:Topics 26360:(from 26213:Intel 26200:Intel 25620:GitHub 25556:Intel 25326:GitHub 25275:ModR/M 25273:(with 25078:Intel 25046:"nopl" 24709:  24655:Intel 24632:Intel 24621:prefix 24382:LKML, 24274:  24099:RDRAND 24028:FXSAVE 23999:D8..DF 23995:D8..DF 23959:FRSTOR 23947:FXSAVE 23937:FXSAVE 23913:FXSAVE 23900:EFLAGS 23884:EFLAGS 23864:FUCOMI 23860:FCOMIP 23728:FPREM1 23704:FPREM1 23691:FUCOMP 23646:FLDENV 23642:FRSTOR 23495:AMD K7 23464:EFLAGS 23446:EFLAGS 23427:EFLAGS 23407:EFLAGS 23396:EFLAGS 23261:EFLAGS 22983:  22850:FPREM1 22736:FSETPM 22667:While 22517:FPATAN 22463:FSCALE 22387:FSCALE 22227:Empty 22112:FPATAN 22048:FDIVRP 22036:FSUBRP 21860:FRSTOR 21847:FRSTOR 21839:FLDENV 21768:FNCLEX 21223:FPATAN 21158:arctan 20582:FSCALE 19630:FCOMPP 18730:FLDLN2 18681:FLDLG2 18625:FLDL2E 18569:FLDL2T 18237:FNDISI 18167:FSTENV 18117:FNCLEX 18039:FNINIT 17892:CLZERO 17886:CLZERO 17609:CLZERO 17591:MWAITX 17575:MWAITX 17453:Opcode 17326:PF=0: 17301:SF=0: 17248:ZF=0: 17223:CF=0: 17198:OF=0: 17174:EFLAGS 17059:Usage 17044:HRESET 16980:Usage 16970:TPAUSE 16966:UMWAIT 16946:UMWAIT 16942:TPAUSE 16922:TPAUSE 16918:UMWAIT 16914:TPAUSE 16910:UMWAIT 16902:TPAUSE 16898:UMWAIT 16495:Other 16266:70..7F 16190:PBNDKB 16177:PBNDKB 15891:ENQCMD 15835:ENQCMD 15793:.CF . 15791:EFLAGS 15778:TESTUI 15765:RFLAGS 15668:HRESET 15614:TPAUSE 15610:UMWAIT 15140:Opcode 15115:WBINVD 15107:WBINVD 15102:WBINVD 15053:RDTSCP 15012:being 14988:3DNow! 14936:3DNow! 14911:INVLPG 14836:POPCNT 14823:RDTSCP 14803:RDTSCP 14791:RDTSCP 14787:RDTSCP 14758:RDTSCP 14742:GETSEC 14650:GETSEC 14633:GETSEC 14516:EFLAGS 14426:CPUID. 14380:VIA C7 14195:MFENCE 14189:LFENCE 14185:MFENCE 14181:LFENCE 14177:MFENCE 14169:MFENCE 14163:MFENCE 14159:MFENCE 14155:MFENCE 14138:LFENCE 14134:LFENCE 14128:x2apic 14126:) and 14112:LFENCE 14107:LFENCE 14099:LFENCE 14093:LFENCE 14089:LFENCE 14085:LFENCE 14068:MFENCE 14060:LFENCE 14056:SFENCE 14047:MFENCE 14031:SFENCE 14025:SFENCE 14021:SFENCE 14017:SFENCE 14004:MFENCE 14000:LFENCE 13996:SFENCE 13943:Athlon 13647:WRPKRU 13604:RDPKRU 13433:Clear 13082:Jaguar 12822:SSE4.2 12753:POPCNT 12707:RDTSCP 12693:RDTSCP 12665:Conroe 12644:GETSEC 12422:MFENCE 12384:LFENCE 12351:SFENCE 12221:Opcode 12190:XGETBV 12176:XGETBV 12138:XSAVE* 11995:XSAVEC 11951:XRSTOR 11884:XSETBV 11867:XGETBV 11825:Jaguar 11815:Penryn 11758:Opcode 11685:RDSSPQ 11681:RDSSPD 11347:CET_SS 11324:Opcode 11152:EFLAGS 11108:C6 F8 11062:C7 F8 11054:C7 F8 11012:Opcode 10892:3000.) 10882:POPCNT 10876:POPCNT 10870:POPCNT 10858:POPCNT 10435:Jaguar 10313:Bobcat 10255:Opcode 10207:MOVSXD 10188:AMD K8 10139:SWAPGS 10094:PUSHFQ 9882:SWAPGS 9871:MOVSXD 9860:x86-64 9811:(#UD). 9745:SYSRET 9713:SYSRET 9696:SYSRET 9681:SYSRET 9665:SYSRET 9648:ModR/M 9607:ModR/M 9495:ModR/M 9273:Length 9257:CMOVcc 9232:CMOVcc 9219:CMOVcc 9213:CMOVcc 9123:PF=0: 9095:SF=0: 9034:ZF=0: 9001:CF=0: 8973:OF=0: 8949:EFLAGS 8768:LFENCE 8713:CPUs ( 8689:EFLAGS 8463:Number 8382:Crusoe 8368:Intel 8327:SYSRET 8320:x86-64 8282:AMD K5 8218:Intel 8171:x86-64 8158:Intel 8112:Crusoe 8101:6x86MX 8099:Cyrix 8086:Intel 8048:6x86MX 8046:Cyrix 8034:Intel 8027:Intel 7990:Crusoe 7973:6x86MX 7970:Cyrix 7958:Intel 7922:Crusoe 7902:Cyrix 7890:Intel 7837:Crusoe 7823:Cyrix 7811:Intel 7798:EFLAGS 7763:Crusoe 7751:486SLC 7749:Cyrix 7737:Intel 7726:(SMM) 7692:Write 7676:Crusoe 7659:6x86MX 7657:Cyrix 7644:Intel 7640:386SLC 7598:Opcode 7527:WBINVD 7507:INVLPG 7502:INVLPG 7486:EFLAGS 7424:Using 7399:WBINVD 7243:Using 7213:Opcode 6930:ModR/M 6916:ModR/M 6843:ModR/M 6749:PF=0: 6721:SF=0: 6660:ZF=0: 6627:CF=0: 6599:OF=0: 6575:EFLAGS 6297:  5976:POP GS 5952:POP FS 5872:0F 8x 5865:0F 8x 5503:EFLAGS 5473:Opcode 5400:PUSHFD 5333:LOOPNE 5220:) and 5212:, the 5194:, the 5061:PUSHFD 5021:PUSHAD 4937:Other 4747:Opcode 4672:CS.D=1 4668:CS.D=0 4658:CS.D=1 4654:CS.D=0 4534:MOVSXD 4524:, the 4302:table. 4223:  4161:EFLAGS 3866:Opcode 3289:Notes 3283:Opcode 3252:0x83/6 3244:0x81/6 3094:0xF7/0 3090:0xF6/0 3046:0x83/5 3038:0x81/5 2924:times. 2828:times. 2747:0xD3/5 2739:0xC1/5 2718:0xD3/4 2710:0xC1/4 2680:times. 2651:times. 2627:0x83/3 2619:0x81/3 2579:0xD3/7 2571:0xC1/7 2542:0xD3/4 2534:0xC1/4 2485:0xD3/1 2477:0xC1/1 2456:0xD3/0 2448:0xC1/0 2344:0xD3/3 2336:0xC1/3 2315:0xD3/2 2307:0xC1/2 2252:0xFF/6 2156:0x8F/0 2054:0x83/1 2046:0x81/1 1997:0xF7/2 1993:0xF6/2 1930:0xF7/3 1926:0xF6/3 1874:0xF6/4 1870:0xF7/4 1718:times. 1571:times. 1395:times. 1311:times. 1204:0xFF/5 1200:0xFF/4 1155:0x0F8F 1151:0x0F80 1059:0xFF/0 1055:0xFE/0 984:0x0FAF 980:0xF6/5 976:0xF7/5 943:0xF6/7 939:0xF7/7 863:0xF6/6 859:0xF7/6 837:divide 823:0xFF/1 819:0xFE/1 728:times. 699:times. 675:0x83/7 667:0x81/7 606:Clear 581:Clear 558:Clear 527:0xFF/3 523:0xFF/2 484:0x83/4 476:0x81/4 436:0x83/0 432:0x82/0 428:0x81/0 424:0x80/0 390:0x83/2 382:0x81/2 296:opcode 247:struc- 232:means 224:means 216:means 198:x86-64 26529:Flags 26483:(HLA) 26477:(GAS) 26310:Intel 26293:FPTAN 26083:Tweet 26053:Tweet 25802:AMD, 25774:MWAIT 25749:MWAIT 25722:AMD, 25670:AMD, 25589:Tweet 25505:VIA, 25475:AMD, 25411:AMD, 25399:0F FF 25392:AMD, 25363:0F FF 25241:AMD, 25226:0F B9 25220:0F 0B 25091:AMD, 24936:RDTSC 24932:RDTSC 24878:CPUID 24872:AMD, 24722:AMD, 24663:with 24640:with 24504:AMD, 24167:(PDF) 24119:CPUID 24094:CLMUL 23856:FCOMI 23843:FPTAN 23732:FPREM 23724:FPREM 23720:FPREM 23712:D9 F8 23708:FPREM 23687:FUCOM 23613:DD /1 23601:DB /1 23589:DF /1 23507:REX.W 23267:FCMOV 23230:D9 FF 23144:D9 FE 23002:D9 FB 22855:D9 F5 22837:DA E9 22770:80387 22751:DF E0 22731:DB E4 22708:80287 22500:FYL2X 22374:FPREM 22342:to 1. 22336:FPREM 22301:FPREM 22213:Zero 22108:FPREM 22056:FCOMP 22044:FDIVP 22040:FMULP 22032:FSUBP 22028:FADDP 21998:FBSTP 21875:REX.W 21786:DB E2 21778:FCLEX 21773:DB E2 21681:FWAIT 21649:D9 F7 21634:D9 F6 21619:D9 D0 21422:D9 F9 21228:D9 F3 20998:D9 F2 20993:FPTAN 20897:D9 F1 20892:FYL2X 20686:D9 F0 20681:F2XM1 20587:D9 FD 20424:D9 FC 20403:D9 FA 20398:FSQRT 20379:D9 F8 20374:FPREM 20155:D9 F4 20015:D9 E5 19992:D9 E4 19971:D9 E1 19950:D9 E0 19920:DE /3 19902:DA /3 19887:DE /2 19869:DA /2 19854:DE /7 19836:DA /7 19821:DE /6 19803:DA /6 19788:DE /5 19770:DA /5 19755:DE /4 19737:DA /4 19722:DE /1 19704:DA /1 19689:DE /0 19671:DA /0 19635:DE D9 19590:DC /3 19572:D8 /3 19395:DC /2 19377:D8 /2 19329:DC /7 19311:D8 /7 19265:DC /6 19247:D8 /6 19201:DC /5 19183:D8 /5 19137:DC /4 19119:D8 /4 19073:DC /1 19055:D8 /1 19009:DC /0 18991:D8 /0 18948:DF /6 18927:DF /4 18912:DF /7 18900:DB /3 18882:DF /3 18867:DB /2 18849:DF /2 18834:DF /5 18822:DB /0 18804:DF /0 18735:D9 ED 18692:Push 18686:D9 EC 18636:Push 18630:D9 EA 18580:Push 18574:D9 E9 18524:Push 18512:D9 EB 18507:FLDPI 18497:Push 18491:D9 E8 18470:D9 EE 18421:DB /7 18409:DD /3 18391:D9 /3 18358:DD /2 18340:D9 /2 18313:DB /5 18301:DD /0 18283:D9 /0 18247:FDISI 18242:DB E1 18222:DB E0 18217:FNENI 18204:DD /4 18189:FSAVE 18184:DD /6 18162:D9 /6 18142:D9 /4 18127:FCLEX 18122:DB E2 18107:FSTSW 18102:DD /7 18087:FSTCW 18082:D9 /7 18064:D9 /5 18049:FINIT 18044:DB E3 17971:RDPRU 17920:RDPRU 17914:WRMSR 17910:RDMSR 17906:RDPRU 17864:REX.R 17838:REX.R 17824:REX.R 17808:REX.R 17770:Zen 3 17729:Zen 2 17718:Sets 17683:Zen 2 17660:RDPRU 17650:RDPRU 17637:Zen 1 17595:MWAIT 17430:NOPs. 17126:UIRET 17118:UIRET 17101:MSRs. 17027:CPUID 17019:CPUID 16853:well. 16745:VMXON 16741:ENCLV 16728:ENCLV 16679:ENCLV 16666:ENCLU 16542:ENCLU 16310:ENCLS 15986:for. 15935:WRMSR 15759:Pops 15748:UIRET 15713:UINTR 15345:ENCLV 15322:ENCLU 15248:ENCLS 15163:SSE2 15057:RDPID 14858:Value 14783:RDTSC 14762:RDPID 14637:REX.W 14573:MWAIT 14524:MWAIT 14496:MWAIT 14483:MWAIT 14473:MWAIT 14460:MWAIT 14400:MWAIT 14372:MWAIT 14333:PAUSE 14329:PAUSE 14316:PAUSE 14310:PAUSE 14296:PAUSE 14287:PAUSE 14278:PAUSE 14274:F3 90 14265:49 90 14256:4E 90 14247:41 90 14224:PAUSE 14216:REX.R 14208:PAUSE 14130:MSRs. 14124:RDPMC 14120:RDTSC 13916:Zen 2 13877:Zen 5 13826:Zen 5 13757:Zen 2 13724:RDPID 13701:Zen 2 13635:Zen 3 13535:Zen 1 13454:Zen 1 13351:Zen 1 13199:Zen 3 13038:MOVBE 12697:Read 12669:Merom 12614:MWAIT 12593:MWAIT 12571:Yonah 12483:CLFSH 12465:F3 90 12460:PAUSE 12195:CPUID 12172:Zen 1 12096:Zen 1 12039:Zen 1 11943:XSAVE 11781:XSAVE 11741:CPUID 11655:FF /4 11649:FF /2 11388:Zen 3 11138:XTEST 10961:BEXTR 10944:TZCNT 10940:TZCNT 10928:TZCNT 10915:LZCNT 10903:LZCNT 10866:LZCNT 10862:LZCNT 10671:. If 10419:TZCNT 10364:LZCNT 10216:8B /r 10124:STOSQ 10109:SCASQ 10079:POPFQ 10064:MOVSQ 10032:LODSQ 9999:IRETQ 9963:CMPSQ 9904:REX.W 9900:REX.W 9889:JRCXZ 9778:CPUID 9727:REX.W 9721:REX.W 9639:0F B9 9621:0F FF 9609:byte. 9602:0F FF 9596:0F B9 9570:0F B9 9552:80186 9547:0F FF 9541:0F B9 9535:0F 0B 9513:0F 0B 9476:0F B9 9470:0F 0B 9440:from 9433:0F 0B 9378:CPUID 9285:66 90 9188:NLE,G 9170:LE,NG 9152:NL,GE 9138:L,NGE 9120:NP,PO 9067:A,NBE 9049:NA,BE 9031:NZ,NE 8906:RDPMC 8886:RDPMC 8874:RDTSC 8861:RDTSC 8801:Yonah 8772:CPUID 8762:RDTSC 8758:RDPMC 8753:RDPMC 8749:RDTSC 8707:hangs 8668:CPUID 8664:CPUID 8651:CPUID 8638:CPUID 8623:Zen 4 8619:CPUID 8613:CPUID 8596:CPUID 8587:CPUID 8583:CPUID 8516:PKRS 8466:Name 8435:WRMSR 8408:0F 35 8358:Fast 8354:0F 34 8332:0F 07 8303:Fast 8299:0F 05 8272:80186 8261:0F FF 8214:80186 8195:0F 0B 8016:Read 8012:0F 33 8007:RDPMC 7994:Rise 7940:0F 31 7935:RDTSC 7926:Rise 7905:6x86L 7849:Nx586 7841:Rise 7802:CPUID 7794:CPUID 7783:0F A2 7777:CPUID 7767:Rise 7732:486SL 7710:0F AA 7688:0F 30 7683:WRMSR 7628:Read 7624:0F 32 7619:RDMSR 7559:0F 09 7431:Bochs 7426:BSWAP 7389:0F 08 7245:BSWAP 7202:80486 7157:CPUID 7111:CD 01 7098:CD 01 7086:CD 01 7078:CD 01 7073:ICEBP 7050:ICEBP 6872:REX.W 6847:SETcc 6839:SETcc 6814:NLE,G 6796:LE,NG 6778:NL,GE 6764:L,NGE 6746:NP,PO 6693:A,NBE 6675:NA,BE 6657:NZ,NE 6481:LZCNT 6477:LZCNT 6429:TZCNT 6421:TZCNT 6417:TZCNT 6360:test. 6001:Load 5981:0F A9 5969:0F A8 5957:0F A1 5942:0F A0 5859:rel32 5852:rel16 5455:IRETQ 5451:IRETD 5447:IRETD 5439:IRETD 5426:IRETD 5414:PUSHF 5404:POPFD 5387:POPAD 5353:JECXZ 5329:LOOPE 5311:JECXZ 5234:REPNE 5222:REPNE 5210:SCASD 5206:CMPSD 5192:OUTSD 5184:MOVSD 5180:STOSD 5176:LODSD 5108:IRETD 5088:POPFD 5078:PUSHF 5041:POPAD 5034:PUSHA 4927:OUTSW 4911:OUTSD 4878:SCASW 4862:SCASD 4855:CMPSW 4839:CMPSD 4832:MOVSW 4816:MOVSD 4809:STOSW 4793:STOSD 4783:LODSW 4767:LODSD 4722:SETcc 4711:LODSD 4692:debug 4617:80386 4530:63 /r 4117:63 /r 3994:r/m16 3963:0F 06 3929:) in 3844:80286 3784:/r iw 3771:1200h 3729:1200h 3693:1200h 3661:/r ib 3637:1200h 3539:PUSHA 3391:LEAVE 3320:iw ib 3314:ENTER 3295:BOUND 3272:80188 3268:80186 2912:STOSW 2816:STOSB 2698:Shift 2674:REPNE 2664:SCASW 2645:REPNE 2635:SCASB 2351:REPxx 2277:FLAGS 2259:PUSHF 2113:stack 1706:MOVSW 1559:MOVSB 1472:LOOPx 1383:LODSW 1299:LODSB 722:REPNE 712:CMPSW 693:REPNE 683:CMPSB 255:Notes 202:AMD64 26317:2022 26291:and 26285:FCOS 26281:FSIN 25924:HWNT 25747:and 25223:and 25177:UD2B 25148:UD2B 25146:and 25144:UD2A 24707:ISBN 24493:INT1 24272:ISBN 24039:SIMD 23991:WAIT 23981:and 23939:and 23935:The 23915:and 23911:The 23894:and 23878:and 23866:and 23854:The 23760:and 23758:FCOS 23754:FSIN 23689:and 23648:and 23572:SSE3 23497:and 23402:FCOM 23225:FCOS 23139:FSIN 23038:< 22923:and 22793:qNaN 22789:FCOM 22669:FNOP 22515:For 22502:and 22461:For 22428:< 22299:For 22274:For 22125:FXAM 22123:The 22110:and 22087:FBLD 22073:FXCH 22060:FXCH 22058:and 22052:FCOM 21982:SDM. 21939:FSTP 21916:and 21905:and 21865:CS.D 21849:and 21758:WAIT 21738:WAIT 21676:WAIT 21614:FNOP 21557:< 21539:< 21460:< 21294:< 21103:< 20975:The 20910:and 20594:Yes 20431:Yes 20410:Yes 20121:< 20031:and 20010:FXAM 19987:FTST 19966:FABS 19945:FCHS 19843:Yes 19810:Yes 19777:Yes 19744:Yes 19711:Yes 19678:Yes 19558:Yes 19537:Yes 19516:Yes 19495:Yes 19474:Yes 19453:Yes 19318:Yes 19254:Yes 19190:Yes 19126:Yes 19062:Yes 18998:Yes 18955:387 18889:Yes 18856:Yes 18519:387 18486:FLD1 18465:FLDZ 18398:Yes 18347:Yes 18227:FENI 17996:8087 17985:The 17890:The 17884:For 17860:LOCK 17834:LOCK 17671:MSRs 17460:Ring 17423:and 17401:LOCK 17147:XADD 17096:and 17072:31:1 17023:IRET 17021:and 17001:31:1 16977:Bits 16968:and 16944:and 16920:and 16900:and 16876:For 16846:For 16770:The 16756:For 16726:The 16529:Xeon 16278:and 16268:and 16256:and 16252:The 16232:and 16230:HWNT 16012:for. 15814:STUI 15799:CLUI 15767:and 15612:and 15286:SGX2 15271:SGX1 15181:HWNT 15147:Ring 15096:The 15075:For 14976:The 14951:and 14930:and 14926:The 14760:and 14740:For 14608:31:8 14580:Bits 14555:31:3 14503:Bits 14458:and 14419:For 14406:and 14398:and 14378:and 14370:and 14222:nor 14153:The 14083:The 14072:LOCK 14043:CLWB 14041:and 14015:The 14002:and 13941:AMD 13668:CLWB 13475:Set 13466:STAC 13424:CLAC 13405:SMAP 13245:K6-2 12740:Nano 12586:Nano 12373:SSE2 12228:Ring 12184:XCR0 12180:XCR1 12170:and 12140:and 11972:Puma 11765:Ring 11702:and 11683:and 11679:The 11652:and 11640:CALL 11331:Ring 11304:: a 11204:and 11121:XEND 11087:Xeon 10982:PDEP 10980:and 10978:PEXT 10959:For 10926:The 10901:The 10888:and 10860:and 10798:SHLX 10796:and 10794:SHRX 10790:SARX 10788:For 10675:and 10581:BMI2 10392:BMI1 10178:The 9930:CDQE 9923:Ring 9875:ARPL 9841:and 9824:and 9803:and 9776:The 9751:and 9743:The 9715:and 9679:and 9599:and 9544:and 9506:The 9491:UD2B 9487:UD2B 9485:nor 9483:UD2A 9473:and 9465:UD2B 9463:and 9461:UD2A 9252:reg, 9228:EVEX 9217:For 9106:P,PE 8926:0F 4 8919:CMOV 8904:The 8811:and 8803:and 8751:and 8747:The 8538:83Fh 8534:802h 8522:774h 8512:6E1h 8502:6E0h 8492:122h 8394:VIA 8374:AMD 8313:AMD 8209:(3) 8190:UD2A 8176:VIA 8165:AMD 8116:VIA 8092:AMD 8060:Nano 8058:VIA 8052:IDT 8040:AMD 7982:IDT 7964:AMD 7914:IDT 7896:AMD 7882:LOCK 7853:UMC 7829:IDT 7825:5x86 7819:5x86 7817:AMD 7755:IDT 7745:5x86 7743:AMD 7668:IDT 7650:AMD 7638:IBM 7605:Ring 7542:INVD 7525:and 7523:INVD 7521:The 7480:The 7435:QEMU 7384:INVD 7332:LOCK 7283:LOCK 7220:Ring 7181:IBTS 7179:and 7177:XBTS 7175:For 7161:XBTS 7153:XBTS 7147:IBTS 7145:and 7143:XBTS 7141:The 7046:INT1 7044:The 7031:The 6956:and 6910:and 6898:For 6866:and 6858:For 6837:For 6732:P,PE 6553:0F 8 6551:and 6545:0F 9 6541:near 6535:and 6514:SHRD 6512:and 6510:SHLD 6505:SHRD 6503:and 6501:SHLD 6499:For 6450:and 6390:LOCK 6384:and 6376:The 6348:and 6095:and 5857:Jcc 5850:Jcc 5543:Bit 5480:Ring 5424:and 5422:IRET 5418:POPF 5412:The 5402:and 5398:The 5383:POPA 5381:For 5364:For 5349:JCXZ 5325:LOOP 5307:JCXZ 5282:CWDE 5280:The 5230:REPE 5214:REPE 5208:and 5204:For 5190:and 5188:INSD 5174:For 5136:IRET 5119:IRET 5101:POPF 5054:POPA 5014:JCXZ 4980:IDIV 4941:CWDE 4901:INSW 4885:INSD 4757:Ring 4741:Type 4718:SHLD 4707:CWDE 4694:and 4682:and 4626:and 4585:VERW 4553:and 4547:ARPL 4545:The 4526:ARPL 4497:SLDT 4483:SMSW 4474:and 4472:SLDT 4468:SMSW 4466:The 4445:and 4443:SMSW 4439:SLDT 4435:SIDT 4431:SGDT 4395:LMSW 4385:LMSW 4381:LMSW 4358:and 4356:LMSW 4352:LLDT 4348:LIDT 4344:LGDT 4342:The 4318:SIDT 4316:and 4314:SGDT 4310:LIDT 4308:and 4306:LGDT 4304:For 4299:SIDT 4297:and 4295:SGDT 4291:LIDT 4287:LGDT 4262:800h 4242:Yes 4237:800h 4166:#UD 4131:#UD 4085:#UD 4034:Yes 3985:#UD 3958:CLTS 3903:Yes 3876:Ring 3762:word 3753:IMUL 3741:word 3732:IMUL 3714:IMUL 3696:IMUL 3684:IMUL 3672:IMUL 3654:IMUL 3634:PUSH 3628:PUSH 3610:PUSH 3598:PUSH 3592:PUSH 3586:PUSH 3577:PUSH 3571:PUSH 3565:PUSH 3559:PUSH 3553:PUSH 3468:POPA 3248:0x82 3240:0x80 3236:0x35 3232:0x30 3225:(2) 3221:(1) 3205:0xD7 3191:XLAT 3184:0x97 3180:0x91 3176:0x87 3172:0x86 3123:XCHG 3116:0x9B 3101:WAIT 3086:0xA9 3082:0xA8 3078:0x85 3074:0x84 3067:(2) 3063:(1) 3055:TEST 3042:0x82 3034:0x80 3030:0x2D 3026:0x28 3019:(2) 3015:(1) 3001:0xAB 2971:else 2905:0xAA 2875:else 2809:0xFB 2787:0xFD 2767:0xF9 2743:0xD0 2735:0xC0 2714:0xD0 2706:0xC0 2686:0xAF 2670:REPE 2657:0xAE 2641:REPE 2623:0x82 2615:0x80 2611:0x1D 2607:0x18 2575:0xD0 2567:0xC0 2560:(2) 2556:(1) 2538:0xD0 2530:0xC0 2523:(2) 2519:(1) 2502:0x9E 2492:SAHF 2481:0xD0 2473:0xC0 2452:0xD0 2444:0xC0 2427:0xCB 2423:0xCA 2413:RETF 2406:0xC3 2402:0xC2 2392:RETN 2370:0xF3 2366:0xF2 2340:0xD0 2332:0xC0 2311:0xD0 2303:0xC0 2286:0x9C 2248:0x6A 2244:0x68 2240:0x57 2236:0x50 2232:0x1E 2228:0x16 2224:0x0E 2220:0x06 2187:PUSH 2180:0x9D 2167:Pop 2163:POPF 2152:0x5F 2148:0x58 2144:0x1F 2140:0x17 2136:0x0F 2132:0x07 2126:0x0F 2122:0x0F 2100:0xEF 2096:0xEE 2092:0xE7 2088:0xE6 2081:(4) 2077:(3) 2073:(2) 2069:(1) 2050:0x82 2042:0x80 2038:0x0D 2034:0x08 2025:(2) 2013:(1) 1953:0x90 1863:(2) 1859:(1) 1845:0xA5 1823:word 1799:word 1790:else 1772:word 1748:word 1699:0xA4 1676:byte 1652:byte 1643:else 1625:byte 1601:byte 1552:0xA3 1548:0xA0 1541:(2) 1534:Move 1523:0xE2 1519:0xE0 1507:goto 1467:LOOP 1460:0xAD 1436:else 1376:0xAC 1352:else 1292:0xF0 1281:LOCK 1274:0xC4 1257:0x8D 1238:0xC5 1221:0x9F 1211:LAHF 1196:0xEB 1192:0xE9 1186:Jump 1173:0xE3 1163:JCXZ 1147:0x7F 1143:0x70 1119:0xCF 1109:IRET 1102:0xCE 1092:INTO 1085:0xCD 1081:0xCC 1051:0x47 1047:0x40 1030:0xED 1026:0xEC 1022:0xE5 1018:0xE4 1011:(4) 1007:(3) 1003:(2) 999:(1) 972:0x6B 968:0x69 961:(2) 957:(1) 950:IMUL 928:(2) 920:(1) 913:IDIV 906:0xF4 887:0xDF 883:0xD8 848:(2) 840:(1) 815:0x4F 811:0x48 794:0x2F 775:0x27 751:0x99 734:0xA7 718:REPE 705:0xA6 689:REPE 671:0x82 663:0x80 659:0x3D 655:0x38 638:0xF5 618:0xFA 593:0xFC 570:0xF8 547:0x98 519:0xE8 515:0x9A 503:push 492:CALL 480:0x82 472:0x80 468:0x25 464:0x20 457:(2) 453:(1) 420:0x05 416:0x00 409:(2) 405:(1) 386:0x82 378:0x80 374:0x15 370:0x10 347:0x3F 330:0xD4 312:0xD5 302:0x0A 299:0xD5 280:0x37 249:tion 228:and 190:i686 186:i586 182:i486 178:i386 174:i286 170:i186 150:8088 146:8086 100:The 43:SIMD 37:Main 25928:HST 25381:UD0 25358:OIO 25279:UD0 25271:UD1 25251:UD1 25247:UD0 25181:UD0 25173:UD1 24258:or 24011:#UD 24005:if 24003:#NM 23987:#NM 23632:or 23499:SSE 23176:cos 23090:sin 22937:cos 22877:sin 22482:on 22480:ulp 22170:NaN 21935:FST 21899:IRQ 21869:66h 21361:log 20922:tan 20842:log 20407:Yes 19840:Yes 19807:Yes 19774:Yes 19741:Yes 19708:Yes 19675:Yes 19555:Yes 19534:Yes 19513:Yes 19492:Yes 19471:Yes 19450:Yes 19315:Yes 19251:Yes 19187:Yes 19123:Yes 19059:Yes 18995:Yes 18754:No 18645:log 18589:log 18533:log 17987:x87 17962:If 17927:ECX 17854:11b 17405:F0h 17376:NLE 17273:NBE 17143:CMP 17112:On 17056:Bit 16882:67h 16792:EAX 16686:EAX 16549:EAX 16317:EAX 16284:Jcc 16280:DS: 16276:CS: 16262:Jcc 16234:HST 16091:is: 15769:RSP 15761:RIP 15233:SGX 15211:HST 15172:Jcc 15083:67h 15018:on 14657:EAX 14596:7:4 14588:3:0 14536:TSC 14526:.) 14294:is 14285:is 14276:is 14267:is 14260:NOP 14258:is 14249:is 14242:NOP 14240:is 14228:REX 14220:NOP 14212:NOP 14173:not 14171:is 14122:or 13594:PKU 13333:ADC 13299:ADX 13158:TLB 12844:CRC 12786:K10 12628:SMX 12581:K10 12245:SSE 12052:XSS 11644:JMP 11168:HLE 11154:.ZF 11097:)) 11030:RTM 10965:r/m 10948:BSF 10936:BSF 10932:BSF 10911:BSR 10907:BSR 10734:r/m 10704:r/m 10661:r/m 10604:r/m 10503:r/m 10308:K10 10274:ABM 10211:MOV 10019:E3 9948:CQO 9759:. ( 9644:UD0 9634:UD1 9630:UD0 9626:OIO 9579:UD1 9575:UD1 9518:UD2 9508:UD2 9438:UD2 9410:NOP 9400:NOP 9224:APX 9020:Z,E 8570:RSM 8536:to 8482:49h 8472:48h 8443:79h 8251:UD0 8246:OIO 8185:UD2 8147:NOP 8056:C6, 7996:mP6 7986:C6, 7928:mP6 7918:C6, 7843:mP6 7833:C6, 7769:mP6 7759:C6, 7753:/e, 7705:RSM 7672:C6, 7490:CMP 7370:TLB 7017:CR8 7015:to 7013:MOV 7004:CR2 7002:to 7000:MOV 6987:MOV 6983:CR0 6981:to 6979:MOV 6975:CR0 6958:DRx 6954:CRx 6934:11b 6912:TRx 6908:DRx 6904:CRx 6900:MOV 6868:LSS 6864:LGS 6860:LFS 6646:Z,E 6530:SET 6485:BSR 6452:BSR 6448:BSF 6433:BSR 6425:BSF 6386:BTR 6382:BTC 6378:BTS 6350:BTC 6346:BTR 6342:BTS 6222:MOV 6097:CR4 6093:CR3 6089:CR0 5925:GS: 5907:FS: 5746:is: 5702:is: 5437:If 5319:ECX 5317:or 5290:CWD 5286:CWD 5251:ES: 5196:REP 5127:IDT 5123:CPL 5002:E3 4987:CWD 4967:CDQ 4957:CBW 4664:67h 4650:66h 4643:D=1 4639:D=0 4507:STR 4487:CR0 4476:STR 4452:VM. 4447:STR 4425:CR4 4422:If 4411:CR0 4409:to 4407:MOV 4360:LTR 3992:LTR 3835:C1 3818:SHR 3806:ROL 3796:C0 3782:69 3765:ptr 3750:12h 3744:ptr 3711:12h 3681:12h 3659:6B 3645:68 3631:12h 3615:6A 3527:POP 3521:POP 3515:POP 3509:POP 3500:POP 3494:POP 3488:POP 3482:POP 3462:6F 3448:INC 3436:OUT 3421:MOV 3411:6E 3385:6D 3371:INC 3359:MOV 3337:6C 3318:C8 3299:62 3250:... 3242:... 3234:... 3212:XOR 3182:... 3164:. ( 3044:... 3036:... 3028:... 3008:SUB 2918:REP 2822:REP 2795:STI 2774:STD 2754:STC 2745:... 2737:... 2725:SHR 2716:... 2708:... 2693:SHL 2672:or 2643:or 2625:... 2617:... 2609:... 2586:SBB 2577:... 2569:... 2549:SAR 2540:... 2532:... 2509:SAL 2483:... 2475:... 2463:ROR 2454:... 2446:... 2434:ROL 2377:RET 2342:... 2334:... 2322:RCR 2313:... 2305:... 2293:RCL 2268:*-- 2238:... 2196:*-- 2150:... 2107:POP 2062:OUT 2052:... 2044:... 2036:... 1995:... 1960:NOT 1938:NOP 1928:... 1881:NEG 1852:MUL 1712:REP 1565:REP 1550:... 1530:MOV 1521:... 1510:lbl 1389:REP 1305:REP 1264:LES 1245:LEA 1228:LDS 1194:... 1181:JMP 1153:... 1145:... 1126:Jcc 1067:INT 1049:... 1037:INC 895:HLT 870:ESC 830:DIV 813:... 801:DEC 783:DAS 759:DAA 741:CWD 720:or 691:or 673:... 665:... 657:... 645:CMP 625:CMC 601:CLI 577:CLD 554:CLC 534:CBW 506:eip 482:... 474:... 466:... 444:AND 434:... 426:... 418:... 402:Add 398:ADD 388:... 380:... 372:... 354:ADC 337:AAS 319:AAM 287:AAD 265:AAA 245:In- 230:imm 204:). 194:x86 158:ebx 154:eax 109:x86 102:x86 26608:: 26308:. 26287:, 26283:, 25965:^ 25617:. 25428:, 25345:^ 25328:. 25324:. 25299:. 25295:. 25258:^ 25234:^ 25183:. 25167:, 25138:, 25065:. 25014:, 24919:^ 24618:. 24555:. 24551:, 24521:. 24470:, 24442:^ 24241:. 24224:. 24207:. 24196:^ 24169:. 23977:, 23966:^ 23928:^ 23896:OF 23892:AF 23890:, 23888:SF 23880:PF 23876:CF 23874:, 23872:ZF 23862:, 23858:, 23809:66 23788:66 23756:, 23739:^ 23726:, 23678:^ 23644:, 23640:, 23493:, 23046:63 22491:^ 22436:15 22405:15 22346:C2 22340:C2 22320:63 22138:C0 22135:C2 22132:C3 22054:, 22050:, 22046:, 22042:, 22038:, 22034:, 22030:, 22005:^ 21989:^ 21958:^ 21925:^ 21890:^ 21845:, 21841:, 21826:^ 21813:9B 21784:9B 21762:9B 21754:FN 21686:9B 21111:63 20591:No 20428:No 20386:— 20383:No 20162:— 20159:No 20022:— 20019:No 19999:— 19996:No 19978:— 19975:No 19957:— 19954:No 19909:— 19906:No 19876:— 19873:No 19642:— 19639:No 19579:— 19576:No 19384:— 19381:No 18952:No 18934:— 18931:No 18886:No 18853:No 18811:— 18808:No 18757:— 18700:ln 18649:10 18549:10 18516:No 18477:— 18474:No 18428:— 18425:No 18395:No 18377:— 18374:No 18344:No 18290:— 18287:No 17967:=1 17845:^ 17830:F0 17766:0 17725:3 17633:3 17564:3 17506:K8 17502:0 17412:^ 17362:LE 17348:NL 17323:NP 17298:NS 17259:BE 17245:NZ 17220:NB 17195:NO 17176:) 17169:cc 17155:/r 17145:cc 16953:=0 16889:^ 16523:, 16258:3E 16254:2E 16245:^ 16221:^ 16206:0 16143:3 16097:3 16074:/r 16064:/r 15989:0 15941:0 15896:0 15865:3 15763:, 15737:3 15696:0 15686:ib 15651:3 15547:3 15507:), 15501:), 15494:3 15455:0 15406:3 15362:0 15339:3 15265:0 15217:3E 15213:) 15194:3 15187:2E 15183:) 15064:=1 15029:^ 14810:=0 14749:^ 14621:. 14387:^ 14238:90 14232:90 14070:, 14053:.) 14037:, 13998:, 13985:^ 13958:^ 13932:^ 13912:0 13863:3 13812:3 13746:3 13692:3 13616:3 13570:3 13521:3 13479:. 13440:0 13437:. 13342:3 13254:), 13241:3 13185:0 13068:3 12937:3 12850:3 12782:3 12725:K8 12513:3 12405:K8 12396:3 12290:), 12283:), 12281:K7 12271:3 12166:, 12082:0 12025:3 11956:3 11953:. 11898:0 11811:3 11692:^ 11672:^ 11634:3E 11603:3 11511:0 11377:3 11227:F3 11221:F3 11189:F2 11183:F2 11110:ib 11093:, 11081:, 11064:cd 11056:cw 10802:rb 10792:, 10760:ib 10738:rb 10708:ra 10700:rb 10677:rb 10673:ra 10669:rb 10665:ra 10612:rd 10608:rb 10507:ra 10499:rb 10495:rb 10219:). 10151:0 10099:9C 10084:9D 10021:cb 9942:3 9767:.) 9747:, 9734:^ 9704:^ 9586:^ 9538:, 9525:^ 9449:^ 9195:, 9177:, 9159:, 9127:, 9092:NS 9056:, 9038:, 9009:, 9005:, 8970:NO 8951:) 8944:cc 8930:/r 8921:cc 8893:=1 8868:=0 8849:). 8799:, 8793:C2 8740:^ 8722:^ 8717:). 8630:^ 8419:0 8416:. 8376:K7 8365:3 8362:. 8343:0 8340:. 8315:K6 8310:3 8307:. 8274:), 8216:), 8178:C7 8169:, 8167:K7 8155:3 8149:. 8094:K7 8083:3 8042:K7 7966:K5 7898:K5 7887:3 7724:-2 7718:. 7652:K5 7635:0 7579:P6 7575:P5 7555:F3 7514:^ 7442:^ 7378:0 7251:3 7168:^ 7134:^ 7116:F1 7103:F1 7091:F1 7069:F1 7054:F1 7024:^ 6941:^ 6906:, 6883:^ 6862:, 6821:, 6803:, 6785:, 6753:, 6718:NS 6682:, 6664:, 6635:, 6631:, 6596:NO 6577:) 6570:cc 6549:/0 6539:cc 6532:cc 6521:^ 6492:^ 6467:F3 6440:^ 6407:F3 6394:F0 6380:, 6367:^ 6344:, 6340:, 6338:BT 6325:^ 6315:0 6301:D, 6203:3 6091:, 6070:0 5930:65 5919:3 5912:64 5874:cd 5867:cw 5815:. 5784:3 5734:ib 5691:ib 5658:3 5629:ib 5596:ib 5563:ib 5547:. 5526:ib 5513:3 5509:. 5507:CF 5499:. 5420:, 5416:, 5345:E2 5341:E1 5337:E0 5315:CX 5303:E3 5226:F2 5218:F3 5200:F3 5186:, 5182:, 5178:, 5161:67 5113:CF 5093:9D 5066:9C 5046:61 5026:60 5004:cb 4972:99 4961:3 4946:98 4916:6F 4890:6D 4867:AF 4844:A7 4821:A5 4798:AB 4787:3 4772:AD 4720:, 4709:, 4698:. 4690:, 4684:GS 4680:FS 4596:^ 4559:63 4470:, 4457:^ 4441:, 4437:, 4433:, 4354:, 4350:, 4346:, 4329:^ 4293:, 4289:, 4274:^ 4245:0 4134:3 3906:0 3821:BL 3809:AX 3756:SI 3735:DI 3723:SI 3717:BX 3705:DX 3699:CX 3687:DX 3675:BX 3647:iw 3617:ib 3601:DI 3595:SI 3589:BP 3580:SP 3574:BX 3568:DX 3562:CX 3556:AX 3543:60 3530:AX 3524:CX 3518:DX 3512:BX 3503:AX 3497:BP 3491:SI 3485:DI 3472:61 3451:SI 3445:AL 3439:DX 3430:DS 3424:AL 3395:C9 3374:DI 3368:AL 3365::, 3362:ES 3356:DX 3350:AL 3347:IN 3301:/r 3246:, 3238:, 3178:, 3174:, 3168:). 3156:A 3092:, 3088:, 3084:, 3080:, 3076:, 3040:, 3032:, 2992:AX 2986:-- 2983:DI 2977:ES 2965:AX 2959:++ 2956:DI 2950:ES 2938:== 2935:DF 2929:if 2922:CX 2896:AL 2890:-- 2887:DI 2881:ES 2869:AL 2863:++ 2860:DI 2854:ES 2842:== 2839:DF 2833:if 2826:CX 2678:CX 2649:CX 2621:, 2613:, 2425:, 2404:, 2368:, 2271:SP 2246:, 2242:, 2234:, 2230:, 2226:, 2222:, 2199:SP 2154:, 2146:, 2142:, 2134:, 2098:, 2094:, 2090:, 2048:, 2040:, 2004:OR 1984:-1 1981:^= 1872:, 1835:-- 1832:SI 1811:-- 1808:DI 1784:++ 1781:SI 1760:++ 1757:DI 1733:== 1730:DF 1724:if 1716:CX 1688:-- 1685:SI 1664:-- 1661:DI 1637:++ 1634:SI 1613:++ 1610:DI 1586:== 1583:DF 1577:if 1569:CX 1501:CX 1498:-- 1486:if 1483:) 1451:-- 1448:SI 1439:AX 1430:++ 1427:SI 1418:AX 1409:== 1406:DF 1400:if 1393:CX 1367:-- 1364:SI 1355:AL 1346:++ 1343:SI 1334:AL 1325:== 1322:DF 1316:if 1309:CX 1202:, 1198:, 1149:, 1083:, 1057:, 1053:, 1028:, 1024:, 1020:, 992:IN 982:, 978:, 970:, 941:, 885:.. 861:, 821:, 817:, 726:CX 697:CX 669:, 661:, 525:, 521:, 517:, 478:, 470:, 430:, 422:, 384:, 376:, 220:, 184:, 180:, 176:, 172:, 166:bx 164:, 162:ax 156:, 26391:e 26384:t 26377:v 26364:) 26319:. 26230:. 26096:. 26085:) 26081:( 26066:. 26055:) 26051:( 25926:/ 25772:/ 25623:. 25602:. 25591:) 25587:( 25339:. 25310:. 25253:. 25229:. 25175:/ 24682:. 24525:. 24173:. 24152:. 23957:/ 23949:/ 23805:2 23784:2 23776:= 23772:k 23750:k 23716:Q 23710:( 23505:( 23398:. 23209:) 23205:) 23202:0 23199:( 23196:t 23193:s 23187:k 23183:( 23170:) 23167:0 23164:( 23161:t 23158:s 23123:) 23119:) 23116:0 23113:( 23110:t 23107:s 23101:k 23097:( 23084:) 23081:0 23078:( 23075:t 23072:s 23042:2 23034:| 23030:) 23027:0 23024:( 23021:t 23018:s 23014:| 22991:C 22987:S 22970:) 22966:) 22963:0 22960:( 22957:t 22954:s 22948:k 22944:( 22934:= 22931:C 22910:) 22906:) 22903:0 22900:( 22897:t 22894:s 22888:k 22884:( 22874:= 22871:S 22630:. 22604:. 22590:4 22574:: 22559:) 22556:0 22553:( 22550:t 22547:s 22542:) 22539:1 22536:( 22533:t 22530:s 22432:2 22425:) 22422:1 22419:( 22416:t 22413:s 22401:2 22360:Q 22356:. 22354:Q 22316:2 22305:Q 22288:E 22284:E 22280:M 22255:1 22252:1 22249:1 22238:0 22235:1 22232:1 22224:1 22221:0 22218:1 22210:0 22207:0 22204:1 22196:1 22193:1 22190:0 22182:0 22179:1 22176:0 22166:1 22163:0 22160:0 22152:0 22149:0 22146:0 22114:. 21937:/ 21881:/ 21858:/ 21854:( 21789:. 21678:, 21579:) 21575:1 21567:2 21561:( 21554:) 21551:0 21548:( 21545:t 21542:s 21535:) 21531:1 21522:2 21519:1 21512:( 21487:) 21480:2 21477:1 21468:1 21464:( 21456:| 21452:) 21449:0 21446:( 21443:t 21440:s 21436:| 21400:) 21396:1 21393:+ 21390:) 21387:0 21384:( 21381:t 21378:s 21374:( 21365:2 21354:) 21351:1 21348:( 21345:t 21342:s 21336:) 21333:1 21330:( 21327:t 21324:s 21290:| 21286:) 21283:0 21280:( 21277:t 21274:s 21270:| 21262:| 21258:) 21255:1 21252:( 21249:t 21246:s 21242:| 21206:) 21200:) 21197:0 21194:( 21191:t 21188:s 21183:) 21180:1 21177:( 21174:t 21171:s 21165:( 21152:) 21149:1 21146:( 21143:t 21140:s 21107:2 21099:| 21095:) 21092:0 21089:( 21086:t 21083:s 21079:| 21072:0 21049:4 21037:| 21033:) 21030:0 21027:( 21024:t 21021:s 21017:| 21010:0 20987:X 20981:X 20977:Y 20961:X 20958:Y 20953:= 20949:) 20945:) 20942:0 20939:( 20936:t 20933:s 20929:( 20912:Y 20908:X 20875:) 20871:) 20868:0 20865:( 20862:t 20859:s 20855:( 20846:2 20835:) 20832:1 20829:( 20826:t 20823:s 20817:) 20814:1 20811:( 20808:t 20805:s 20797:: 20777:1 20771:) 20768:0 20765:( 20762:t 20759:s 20753:1 20727:2 20724:1 20716:) 20713:0 20710:( 20707:t 20704:s 20698:0 20666:1 20658:) 20655:0 20652:( 20649:t 20646:s 20642:2 20635:) 20632:0 20629:( 20626:t 20623:s 20564:) 20560:) 20557:1 20554:( 20551:t 20548:s 20544:( 20538:o 20535:r 20532:e 20529:Z 20526:o 20523:T 20520:d 20517:n 20514:u 20511:o 20508:R 20505:r 20502:e 20499:g 20496:e 20493:t 20490:n 20487:I 20481:2 20474:) 20471:0 20468:( 20465:t 20462:s 20456:) 20453:0 20450:( 20447:t 20444:s 20359:Q 20353:) 20350:1 20347:( 20344:t 20341:s 20335:) 20332:0 20329:( 20326:t 20323:s 20317:) 20314:0 20311:( 20308:t 20305:s 20285:) 20279:) 20276:1 20273:( 20270:t 20267:s 20262:) 20259:0 20256:( 20253:t 20250:s 20244:( 20238:o 20235:r 20232:e 20229:Z 20226:o 20223:T 20220:d 20217:n 20214:u 20211:o 20208:R 20205:r 20202:e 20199:g 20196:e 20193:t 20190:n 20187:I 20179:Q 20144:M 20140:E 20124:2 20117:| 20114:M 20111:| 20104:1 20094:M 20090:E 20076:) 20073:0 20070:( 20067:t 20064:s 20061:= 20056:E 20052:2 20045:M 20033:M 20029:E 18713:) 18710:2 18707:( 18664:) 18661:2 18658:( 18608:) 18605:e 18602:( 18593:2 18552:) 18546:( 18537:2 18500:π 17943:1 17935:0 17916:. 17912:/ 17856:. 17832:( 17816:( 17588:. 17484:. 17403:( 17373:F 17359:E 17345:D 17337:L 17334:C 17320:B 17312:P 17309:A 17295:9 17287:S 17284:8 17270:7 17256:6 17242:5 17234:Z 17231:4 17217:3 17209:B 17206:2 17192:1 17184:O 17181:0 17166:x 17159:x 17153:x 17132:. 17103:) 17064:0 16985:0 16955:. 16912:/ 16825:2 16815:1 16800:0 16286:. 16104:, 16072:x 16062:x 15968:. 15916:. 15553:, 15503:( 15497:( 15412:, 15310:, 15294:, 15278:, 15240:. 15209:( 15200:, 15179:( 15066:. 14980:( 14955:( 14890:3 14882:2 14874:1 14866:0 14812:. 14547:2 14531:1 14511:0 14191:. 14165:. 14144:. 14095:. 13918:, 13874:, 13869:, 13823:, 13818:, 13764:, 13759:, 13753:, 13708:, 13703:, 13698:, 13637:, 13632:, 13627:, 13622:, 13577:, 13532:, 13527:, 13456:, 13451:, 13446:, 13412:. 13358:, 13353:, 13348:, 13265:, 13260:, 13250:( 13247:, 13201:, 13196:, 13191:, 13164:. 13089:, 13084:, 13079:, 13074:, 13046:. 12953:, 12948:, 12943:, 12861:, 12856:, 12793:, 12788:, 12760:. 12737:, 12732:, 12727:, 12677:, 12671:, 12667:/ 12638:. 12610:. 12583:, 12578:, 12573:, 12568:, 12412:, 12407:, 12402:, 12296:, 12286:( 12279:( 12277:, 12093:, 12088:, 12036:, 12031:, 11979:, 11974:, 11969:, 11963:, 11832:, 11827:, 11822:, 11817:, 11642:/ 11579:. 11384:, 11354:. 11209:) 10636:, 10630:, 10624:, 10442:, 10437:, 10432:, 10427:, 10325:, 10320:, 10315:, 10310:, 10213:( 9891:) 9884:) 9877:) 9784:/ 9663:/ 9510:( 9351:9 9341:8 9331:7 9321:6 9311:5 9301:4 9291:3 9281:2 9185:F 9167:E 9149:D 9135:C 9117:B 9103:A 9089:9 9081:S 9078:8 9064:7 9046:6 9028:5 9017:4 8995:3 8981:2 8967:1 8959:O 8956:0 8941:x 8934:x 8928:x 8895:. 8870:. 8837:/ 8589:. 8391:, 8384:, 8378:, 8372:, 8317:, 8279:, 8270:( 8263:, 8253:, 8248:, 8229:, 8212:( 8187:, 8173:, 8162:, 8131:, 8114:, 8107:, 8103:, 8096:, 8090:, 8050:, 8044:, 8038:, 8031:, 7992:, 7979:, 7975:, 7968:, 7962:, 7924:, 7911:, 7907:, 7900:, 7894:, 7851:, 7845:, 7839:, 7827:, 7821:, 7815:, 7765:, 7747:, 7741:, 7734:, 7665:, 7661:, 7654:, 7648:, 7642:, 7577:/ 7437:. 7433:/ 7118:. 7071:( 7052:( 7048:/ 6997:. 6936:. 6811:F 6793:E 6775:D 6761:C 6743:B 6729:A 6715:9 6707:S 6704:8 6690:7 6672:6 6654:5 6643:4 6621:3 6607:2 6593:1 6585:O 6582:0 6567:x 6560:x 6555:x 6547:x 6537:J 6392:( 5505:. 5385:/ 5351:/ 5343:, 5339:, 5331:, 5327:, 5309:/ 5224:( 5216:( 4724:) 4713:) 4674:. 4660:. 4574:. 4391:. 4153:. 3827:3 3824:, 3815:3 3812:, 3768:, 3759:, 3747:, 3738:, 3726:, 3720:, 3708:, 3702:, 3690:, 3678:, 3442:, 3433:: 3427:, 3353:, 3270:/ 3153:; 3150:m 3147:/ 3144:r 3141:: 3138:= 3135:: 3132:r 3112:) 2995:; 2989:= 2980:: 2974:* 2968:; 2962:= 2953:: 2947:* 2944:) 2941:0 2932:( 2899:; 2893:= 2884:: 2878:* 2872:; 2866:= 2857:: 2851:* 2848:) 2845:0 2836:( 2362:) 2358:( 2280:; 2274:= 2214:; 2211:m 2208:/ 2205:r 2202:= 2028:r 2022:m 2019:/ 2016:r 1987:; 1978:m 1975:/ 1972:r 1920:; 1917:m 1914:/ 1911:r 1908:– 1905:0 1902:= 1899:m 1896:/ 1893:r 1838:; 1829:) 1826:* 1820:( 1817:* 1814:= 1805:) 1802:* 1796:( 1793:* 1787:; 1778:) 1775:* 1769:( 1766:* 1763:= 1754:) 1751:* 1745:( 1742:* 1739:) 1736:0 1727:( 1695:. 1691:; 1682:) 1679:* 1673:( 1670:* 1667:= 1658:) 1655:* 1649:( 1646:* 1640:; 1631:) 1628:* 1622:( 1619:* 1616:= 1607:) 1604:* 1598:( 1595:* 1592:) 1589:0 1580:( 1513:; 1504:) 1492:x 1489:( 1479:( 1469:/ 1454:; 1445:* 1442:= 1433:; 1424:* 1421:= 1415:) 1412:0 1403:( 1370:; 1361:* 1358:= 1349:; 1340:* 1337:= 1331:) 1328:0 1319:( 1139:) 1135:( 771:) 222:m 214:r 188:/ 148:/ 89:e 82:t 75:v

Index

x86 instruction listings
Main
SIMD
Virtualization
Cryptographic
Discontinued
v
t
e
x86
instruction set
x86
microprocessors
executable
computer file
registers
x86 assembly language
8086
8088
i186
i286
i386
i486
i586
i686
x86
x86-64
AMD64
AAA
binary-coded decimal

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