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HyperTransport

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466: 29: 2318: 141:. Intel technologies require each speed range of RAM to have its own interface, resulting in a more complex motherboard layout but with fewer bottlenecks. HTX 3.1 at 26 GB/s can serve as a unified bus for as many as four DDR4 sticks running at the fastest proposed speeds. Beyond that DDR4 RAM may require two or more HTX 3.1 buses diminishing its value as unified transport. 180:/s (3.2 GHz × 2 transfers per clock cycle × 32 bits per link) per direction, or 51.2 GB/s aggregated throughput, making it faster than most existing bus standard for PC workstations and servers as well as making it faster than most bus standards for high-performance computing and networking. 421:
router needs a maximum 8000 Mbit/s of internal bandwidth (1000 Mbit/s × 4 ports × 2 directions)—HyperTransport greatly exceeds the bandwidth this application requires. However a 4 + 1 port 10 Gb router would require 100 Gbit/s of internal bandwidth. Add to that 802.11ac 8 antennas
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words, regardless of the physical width of the link. The first word in a packet always contains a command field. Many packets contain a 40-bit address. An additional 32-bit control packet is prepended when 64-bit addressing is required. The data payload is sent after the control packet. Transfers are
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CPUs, the "SDF" data interconnects are run at the same frequency as the DRAM memory clock (MEMCLK), a decision made to remove the latency caused by different clock speeds. As a result, using a faster RAM module makes the entire bus faster. The links are 32-bit wide, as in HT, but 8 transfers are
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specification. This means that changes in processor sleep states (C states) can signal changes in device states (D states), e.g. powering off disks when the CPU goes to sleep. HyperTransport 3.0 added further capabilities to allow a centralized power management controller to implement power
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use up to three 16-bit HyperTransport links. Common clock rates for these processor links are 800 MHz to 1 GHz (older single and multi socket systems on 754/939/940 links) and 1.6 GHz to 2.0 GHz (newer single socket systems on AM2+/AM3 links—most newer CPUs using
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HyperTransport packets enter the interconnect in segments known as bit times. The number of bit times required depends on the link width. HyperTransport also supports system management messaging, signaling interrupts, issuing probes to adjacent devices or processors,
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GHz). While HyperTransport itself is capable of 32-bit width links, that width is not currently utilized by any AMD processors. Some chipsets though do not even utilize the 16-bit width used by the processors. Those include the Nvidia
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CPUs, the IF bus is on a separate clock, either in a 1:1 or 2:1 ratio to the DRAM clock, because of Zen's early problems with high-speed DRAM affecting IF speed, and therefore system stability. The bus width has also been doubled. On
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transactions, and general data transactions. There are two kinds of write commands supported: posted and non-posted. Posted writes do not require a response from the target. This is usually used for high bandwidth devices such as
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transfers. Non-posted writes require a response from the receiver in the form of a "target done" response. Reads also require a response, containing the read data. HyperTransport supports the PCI consumer/producer ordering model.
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In August 2008, the HyperTransport Consortium released HTX3, which extends the clock rate of HTX to 2.6 GHz (5.2 GT/s, 10.7 GTi, 5.2 real GHz data rate, 3 MT/s edit rate) and retains backwards compatibility.
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as appropriate. It also supports link splitting, where a single 16-bit link can be divided into two 8-bit links. The technology also typically has lower latency than other solutions due to its lower overhead.
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In contrast, HyperTransport is an open specification, published by a multi-company consortium. A single HyperTransport adapter chip will work with a wide spectrum of HyperTransport enabled microprocessors.
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A connector specification that allows a slot-based peripheral to have direct connection to a microprocessor using a HyperTransport interface was released by the HyperTransport Consortium. It is known as
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HyperTransport supports an autonegotiated bit width, ranging from 2 to 32 bits per link; there are two unidirectional links per HyperTransport bus. With the advent of version 3.1, using full
1037:) is a superset of HyperTransport announced by AMD in 2016 as an interconnect for its GPUs and CPUs. It is also usable as interchip interconnect for communication between CPUs and GPUs (for 169:. This allows for a maximum data rate of 6400 MT/s when running at 3.2 GHz. The operating frequency is autonegotiated with the motherboard chipset (North Bridge) in current computing. 128: 446:
available. Companies such as XtremeData, Inc. and DRC take these FPGAs (Xilinx in DRC's case) and create a module that allows FPGAs to plug directly into the Opteron socket.
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bus directly, but must first go through an adapter to expand the system. The proprietary front-side bus must connect through adapters for the various standard buses, like
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The issue of latency and bandwidth between CPUs and co-processors has usually been the major stumbling block to their practical implementation. Co-processors such as
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and the WiGig 60 GHz standard (802.11ad) and HyperTransport becomes more feasible (with anywhere between 20 and 24 lanes used for the needed bandwidth).
413:. Routers and switches have multiple network interfaces, and must forward data between these ports as fast as possible. For example, a four-port, 1000  1527: 1494: 1145: 434:
have appeared that can access the HyperTransport bus and become integrated on the motherboard. Current generation FPGAs from both main manufacturers (
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and later CPUs, the IF bus is able to run at an asynchronous clock to the DRAM, to allow the higher clock speeds that DDR5 is capable of.
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Interfaces are listed by their speed in the (roughly) ascending order, so the interface at the end of each section should be the fastest.
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extends this concept to larger clusters. The Aqua device from 3Leaf Systems virtualizes and interconnects CPUs, memory, and I/O.
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links and utilizing the full HyperTransport 3.1 specification's operating frequency, the theoretical transfer rate is 25.6 
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slot (plus an x1 connector for power pins), HTX allows development of plug-in cards that support direct access to a CPU and
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done per cycle (128-bit packets) compared to the original 2. Electrical changes are made for higher power efficiency. On
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M1689—which use a 16-bit HyperTransport downstream link but limit the HyperTransport upstream link to 8 bits.
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The "DUT" test connector is defined to enable standardized functional test system interconnection.
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or PCI Express. These are typically included in the respective controller functions, namely the
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The current specification HTX 3.1 remained competitive for 2014 high-speed (2666 and 3200 
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on September 21, 2006, to further promote the usage of HyperTransport for plug-in cards and
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Links of various widths can be mixed together in a single system configuration as in one
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flash RAM) technology—a wider range of RAM speeds on a common CPU bus than any Intel
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always padded to a multiple of 32 bits, regardless of their actual length.
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HyperTransport comes in four versions—1.x, 2.0, 3.0, and 3.1—which run from 200
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Connectors from top to bottom: HTX, PCI-Express for riser card, PCI-Express
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link to a peripheral device, which allows for a wider interconnect between
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series and later use one 16-bit HyperTransport link. AMD Athlon 64 FX (
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Computer processor interconnection technology first introduced in 2001
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is in charge of promoting and developing HyperTransport technology.
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The primary use for HyperTransport is to replace the Intel-defined
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Holden, Brian; Meschke, Mike; Abu-Lebdeh, Ziad; D'Orfani, Renato.
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extension as part of their Direct Connect Architecture in their
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nForce Professional MCPs (Media and Communication Processor)
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There has been some marketing confusion between the use of
414: 386: 124: 1045:. The company said the Infinity Fabric would scale from 30 442:) directly support the HyperTransport interface, and have 2173: 1798: 1793: 1549: 959: 645: 551: 542: 499: 358:
Another use for HyperTransport is as an interconnect for
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microprocessors. Hyper-Threading is officially known as
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computers. AMD used HyperTransport with a proprietary
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Emberson, David; Holden, Brian (December 12, 2007).
400: 47:, is a technology for interconnection of computer 389:server CPUs is a superset of HyperTransport. The 2332: 998:-based and the newer Nehalem and Westmere-based 1916:Coherent Accelerator Processor Interface (CAPI) 1061:GPUs which were subsequently released in 2017. 223:-based, where each packet consists of a set of 123:/s or about 10.4 GB/s and 12.8 GB/s) 100:chipsets. HyperTransport has also been used by 1194: 1152:(Press release). April 2, 2001. Archived from 379:Dual Socket Direct Connect (DSDC) Architecture 353: 1579: 678:series (link between North and South Bridges) 271: 425: 405:HyperTransport can also be used as a bus in 1397:"AMD's CPU-to-GPU Infinity Fabric Detailed" 762: 203:Electrically, HyperTransport is similar to 70:that was introduced on April 2, 2001. The 23:, which is also sometimes abbreviated "HT". 1586: 1572: 1336: 548:and Direct Connect Architecture based CPUs 513:The original HTX standard is limited to 16 260:Advanced Configuration and Power Interface 502:. The initial card for this slot was the 1231: 464: 195:, and a lower bandwidth interconnect to 112:machines, as well as a number of modern 27: 1545:Center of Excellence for HyperTransport 1464: 1438: 1363: 621:) HyperTransport SystemI/O controllers 2333: 1394: 161:to 3.2 GHz. It is also a DDR or " 1567: 1305: 32:Logo of the HyperTransport Consortium 461:Add-on card connector (HTX and HTX3) 382: 77:HyperTransport is best known as the 1548:(in German), Uni HD, archived from 1364:Merritt, Rick (December 13, 2016). 506:InfiniPath InfiniBand HCA. IBM and 314:used HyperTransport to replace the 127:RAM and slower (around 1 GB/s 13: 1465:Killian, Zak (September 1, 2022). 1025: 536: 214: 205:low-voltage differential signaling 149: 14: 2362: 1487: 1232:Emberson, David (June 25, 2008). 1039:Heterogeneous System Architecture 2317: 2316: 784:Max. aggregate bandwidth (GB/s) 449:AMD started an initiative named 401:Router or switch bus replacement 254:HyperTransport also facilitates 249: 1458: 1432: 1414: 266: 1439:Cutress, Ian (June 10, 2019). 1395:Alcorn, Paul (March 5, 2020). 1388: 1366:"AMD Clocks Ryzen at 3.4 GHz+" 1357: 1330: 1299: 1262: 1225: 1188: 1160: 1138: 982:ransport and the later use of 958:150, nForce3 Pro 150, and the 1: 1911:Intel Ultra Path Interconnect 1132: 350:families of microprocessors. 1889:Intel QuickPath Interconnect 1879:Direct Media Interface (DMI) 1422:"Infinity Fabric (IF) - AMD" 1107:Intel QuickPath Interconnect 258:as it is compliant with the 187:link to another CPU and one 7: 1243:. p. 4. Archived from 1206:. p. 4. Archived from 1112:List of interface bit rates 1085: 1041:), an arrangement known as 354:Multiprocessor interconnect 144: 10: 2367: 1874:Compute Express Link (CXL) 1528:"Technical Specifications" 528: 272:Front-side bus replacement 18: 2310: 2269: 2248: 2197: 2111:IEEE-1284 (parallel port) 2033: 2026:logical device interface) 1929: 1681: 1615: 1496:HyperTransport Consortium 1278:HyperTransport Consortium 1241:HyperTransport Consortium 1204:HyperTransport Consortium 1175:HyperTransport Consortium 1150:HyperTransport Consortium 1053:GB/s, and be used in the 783: 780: 777: 774: 769: 426:Co-processor interconnect 284:cannot be plugged into a 72:HyperTransport Consortium 51:. It is a bidirectional 763:Frequency specifications 650:PowerPC 970 northbridges 86:central processing units 45:Lightning Data Transport 19:Not to be confused with 1339:"AMD_presentation_EPYC" 1306:Apple (June 25, 2003). 965: 795:32-bit unidirectional* 1673:List of bus bandwidths 1499:(home), archived from 792:16-bit unidirectional 635:QuantumFlow Processors 470: 381:) line of processors. 33: 1092:Elastic interface bus 1043:Infinity Architecture 642:project (MPL licence) 468: 263:management policies. 239:uniform memory access 43:), formerly known as 31: 2116:IEEE-1394 (FireWire) 1854:PCI Extended (PCI-X) 1287:on September 3, 2006 1234:"HTX3 specification" 1156:on October 10, 2006. 752:TM8000 Efficeon CPUs 243:direct memory access 130:similar to high end 2346:Macintosh internals 1957:Parallel ATA (PATA) 1552:on October 29, 2008 1308:"WWDC 2003 Keynote" 1197:"HTX specification" 648:CPC925 and CPC945 ( 96:and the associated 68:point-to-point link 1864:PCI Express (PCIe) 1538:on August 22, 2008 1503:on August 22, 2008 1345:on August 21, 2017 778:Max. HT frequency 758:chipsets K8 series 607:Radeon Xpress 3200 471: 391:HORUS interconnect 219:HyperTransport is 34: 2328: 2327: 2314: 2041:Apple Desktop Bus 2018:PCI Express (via 1977:Serial ATA (SATA) 1663:Network on a chip 1376:on August 8, 2019 1184:on July 16, 2011. 914: 913: 736:Thread Processors 712:nForce 900 series 707:nForce 700 series 702:nForce 600 series 697:nForce 500 series 609:for AMD processor 602:for AMD processor 600:Radeon Xpress 200 2358: 2320: 2319: 2312: 1774:HP Precision Bus 1588: 1581: 1574: 1565: 1564: 1560: 1559: 1557: 1539: 1534:, archived from 1522: 1511: 1510: 1508: 1482: 1481: 1479: 1477: 1462: 1456: 1455: 1453: 1451: 1436: 1430: 1429: 1418: 1412: 1411: 1409: 1407: 1392: 1386: 1385: 1383: 1381: 1372:. Archived from 1361: 1355: 1354: 1352: 1350: 1341:. Archived from 1334: 1328: 1327: 1325: 1323: 1314:. Archived from 1303: 1297: 1296: 1294: 1292: 1286: 1280:. Archived from 1275: 1266: 1260: 1259: 1257: 1255: 1250:on March 8, 2012 1249: 1238: 1229: 1223: 1222: 1220: 1218: 1213:on March 8, 2012 1212: 1201: 1192: 1186: 1185: 1183: 1177:. Archived from 1172: 1164: 1158: 1157: 1142: 1057:-based CPUs and 1052: 1048: 994:feature on some 952: 920:, Athlon 64 FX, 781:Max. link width 767: 766: 668:nForce chipsets 520: 516: 256:power management 163:double data rate 157: 81:architecture of 2366: 2365: 2361: 2360: 2359: 2357: 2356: 2355: 2331: 2330: 2329: 2324: 2315: 2306: 2265: 2244: 2193: 2106:IEEE-488 (GPIB) 2029: 1925: 1904:Infinity Fabric 1734:Europe Card Bus 1677: 1611: 1592: 1555: 1553: 1542: 1526: 1514: 1506: 1504: 1493: 1490: 1485: 1475: 1473: 1463: 1459: 1449: 1447: 1437: 1433: 1420: 1419: 1415: 1405: 1403: 1393: 1389: 1379: 1377: 1362: 1358: 1348: 1346: 1335: 1331: 1321: 1319: 1318:on July 8, 2012 1304: 1300: 1290: 1288: 1284: 1273: 1267: 1263: 1253: 1251: 1247: 1236: 1230: 1226: 1216: 1214: 1210: 1199: 1193: 1189: 1181: 1170: 1166: 1165: 1161: 1144: 1143: 1139: 1135: 1088: 1050: 1046: 1031:Infinity Fabric 1028: 1026:Infinity Fabric 992:Hyper-Threading 968: 950: 789:bi-directional 771: 765: 638:ht_tunnel from 557:AMD-8000 series 539: 537:Implementations 531: 518: 514: 463: 428: 403: 383:Infinity Fabric 367:cache coherency 356: 274: 269: 252: 217: 215:Packet-oriented 155: 152: 150:Links and rates 147: 24: 21:Hyper-Threading 17: 12: 11: 5: 2364: 2354: 2353: 2348: 2343: 2341:Computer buses 2326: 2325: 2311: 2308: 2307: 2305: 2304: 2299: 2294: 2284: 2279: 2273: 2271: 2267: 2266: 2264: 2263: 2258: 2252: 2250: 2246: 2245: 2243: 2242: 2237: 2232: 2227: 2222: 2217: 2215:Intel HD Audio 2212: 2207: 2205:ADAT Lightpipe 2201: 2199: 2195: 2194: 2192: 2191: 2186: 2181: 2176: 2171: 2166: 2161: 2156: 2151: 2146: 2128: 2123: 2118: 2113: 2108: 2103: 2098: 2093: 2088: 2083: 2078: 2073: 2068: 2063: 2058: 2053: 2048: 2043: 2037: 2035: 2031: 2030: 2028: 2027: 2016: 2011: 2006: 2001: 1996: 1995: 1994: 1989: 1979: 1974: 1969: 1964: 1959: 1954: 1949: 1944: 1939: 1933: 1931: 1927: 1926: 1924: 1923: 1918: 1913: 1908: 1907: 1906: 1899:HyperTransport 1896: 1891: 1886: 1881: 1876: 1871: 1866: 1861: 1856: 1851: 1846: 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760: 759: 753: 747: 737: 731: 726: 716: 715: 714: 709: 704: 699: 694: 688: 682: 679: 663: 653: 643: 636: 630: 629: 628: 625: 612: 611: 610: 603: 590: 589: 588: 586:AMD 900 series 583: 581:AMD 800 series 578: 576:AMD 700 series 573: 571:AMD 690 series 568: 566:AMD 580 series 563: 561:AMD 480 series 558: 549: 538: 535: 530: 527: 498:to the system 462: 459: 427: 424: 402: 399: 385:used with the 363:multiprocessor 355: 352: 316:front-side bus 278:front-side bus 273: 270: 268: 265: 251: 248: 216: 213: 151: 148: 146: 143: 139:front-side bus 37:HyperTransport 15: 9: 6: 4: 3: 2: 2363: 2352: 2349: 2347: 2344: 2342: 2339: 2338: 2336: 2323: 2309: 2303: 2300: 2298: 2295: 2292: 2288: 2285: 2283: 2280: 2278: 2277:Multidrop bus 2275: 2274: 2272: 2268: 2262: 2259: 2257: 2254: 2253: 2251: 2247: 2241: 2238: 2236: 2233: 2231: 2228: 2226: 2223: 2221: 2218: 2216: 2213: 2211: 2208: 2206: 2203: 2202: 2200: 2196: 2190: 2187: 2185: 2184:External PCIe 2182: 2180: 2177: 2175: 2172: 2170: 2167: 2165: 2164:Parallel SCSI 2162: 2160: 2157: 2155: 2152: 2150: 2147: 2144: 2140: 2136: 2132: 2129: 2127: 2124: 2122: 2119: 2117: 2114: 2112: 2109: 2107: 2104: 2102: 2099: 2097: 2094: 2092: 2089: 2087: 2084: 2082: 2079: 2077: 2074: 2072: 2069: 2067: 2064: 2062: 2059: 2057: 2056:Commodore bus 2054: 2052: 2049: 2047: 2044: 2042: 2039: 2038: 2036: 2032: 2025: 2021: 2017: 2015: 2012: 2010: 2007: 2005: 2004:Fibre Channel 2002: 2000: 1997: 1993: 1990: 1988: 1985: 1984: 1983: 1980: 1978: 1975: 1973: 1970: 1968: 1965: 1963: 1960: 1958: 1955: 1953: 1950: 1948: 1945: 1943: 1940: 1938: 1935: 1934: 1932: 1928: 1922: 1919: 1917: 1914: 1912: 1909: 1905: 1902: 1901: 1900: 1897: 1895: 1892: 1890: 1887: 1885: 1882: 1880: 1877: 1875: 1872: 1870: 1867: 1865: 1862: 1860: 1857: 1855: 1852: 1850: 1847: 1845: 1842: 1840: 1837: 1835: 1832: 1830: 1827: 1825: 1822: 1820: 1817: 1815: 1812: 1810: 1807: 1805: 1802: 1800: 1797: 1795: 1792: 1790: 1787: 1785: 1782: 1780: 1777: 1775: 1772: 1770: 1767: 1765: 1762: 1760: 1757: 1755: 1752: 1750: 1747: 1745: 1742: 1740: 1737: 1735: 1732: 1730: 1727: 1725: 1722: 1720: 1717: 1715: 1712: 1710: 1707: 1705: 1702: 1700: 1697: 1695: 1692: 1690: 1687: 1686: 1684: 1680: 1674: 1671: 1669: 1668:Plug and play 1666: 1664: 1661: 1659: 1658:Bus mastering 1656: 1654: 1651: 1649: 1646: 1644: 1641: 1639: 1636: 1634: 1633:Back-side bus 1631: 1629: 1626: 1624: 1621: 1620: 1618: 1614: 1610: 1607: 1603: 1601: 1596: 1589: 1584: 1582: 1577: 1575: 1570: 1569: 1566: 1551: 1547: 1546: 1541: 1537: 1533: 1529: 1525: 1521: 1517: 1513: 1502: 1498: 1497: 1492: 1491: 1472: 1468: 1461: 1446: 1442: 1435: 1427: 1423: 1417: 1402: 1398: 1391: 1375: 1371: 1367: 1360: 1344: 1340: 1333: 1317: 1313: 1309: 1302: 1283: 1279: 1272: 1265: 1246: 1242: 1235: 1228: 1209: 1205: 1198: 1191: 1180: 1176: 1169: 1163: 1155: 1151: 1147: 1141: 1137: 1128: 1125: 1123: 1120: 1118: 1115: 1113: 1110: 1108: 1105: 1103: 1100: 1098: 1097:Fibre Channel 1095: 1093: 1090: 1089: 1083: 1081: 1076: 1072: 1067: 1062: 1060: 1056: 1044: 1040: 1036: 1032: 1023: 1021: 1020:HT Technology 1017: 1013: 1009: 1005: 1001: 997: 993: 989: 985: 981: 977: 974:referring to 973: 963: 961: 957: 947: 943: 939: 935: 931: 927: 924:, Athlon X2, 923: 919: 909: 906: 903: 900: 898:3.2 GHz 897: 894: 891: 890: 886: 883: 880: 877: 875:2.6 GHz 874: 871: 868: 867: 863: 860: 857: 854: 852:1.4 GHz 851: 848: 845: 844: 840: 837: 834: 831: 829:800 MHz 828: 825: 822: 821: 817: 814: 811: 808: 806:800 MHz 805: 802: 799: 798: 794: 791: 788: 787: 768: 757: 754: 751: 748: 746: 742: 738: 735: 732: 730: 727: 724: 720: 717: 713: 710: 708: 705: 703: 700: 698: 695: 692: 689: 686: 683: 680: 677: 673: 670: 669: 667: 664: 661: 657: 654: 651: 647: 644: 641: 637: 634: 631: 626: 623: 622: 620: 616: 613: 608: 604: 601: 597: 596: 594: 591: 587: 584: 582: 579: 577: 574: 572: 569: 567: 564: 562: 559: 556: 555: 553: 550: 547: 544: 541: 540: 534: 526: 522: 511: 509: 505: 501: 497: 493: 489: 485: 481: 477: 467: 458: 456: 452: 447: 445: 441: 437: 433: 423: 420: 416: 412: 408: 398: 396: 392: 388: 384: 380: 376: 372: 368: 364: 361: 351: 349: 345: 341: 337: 333: 329: 325: 321: 317: 313: 309: 305: 303: 302: 297: 296: 291: 287: 283: 279: 264: 261: 257: 250:Power-managed 247: 244: 240: 235: 229: 226: 222: 212: 210: 206: 201: 198: 194: 190: 186: 181: 179: 175: 170: 168: 164: 160: 142: 140: 136: 133: 129: 126: 122: 117: 115: 111: 107: 103: 99: 95: 91: 87: 84: 80: 75: 73: 69: 66: 62: 58: 54: 50: 46: 42: 38: 30: 26: 22: 2351:Serial buses 1898: 1809:TURBOchannel 1599: 1556:September 4, 1554:, retrieved 1550:the original 1544: 1536:the original 1531: 1519: 1516:"Technology" 1505:, retrieved 1501:the original 1495: 1474:. Retrieved 1470: 1460: 1450:November 12, 1448:. Retrieved 1444: 1434: 1425: 1416: 1406:November 12, 1404:. Retrieved 1400: 1390: 1378:. Retrieved 1374:the original 1369: 1359: 1347:. Retrieved 1343:the original 1332: 1320:. Retrieved 1316:the original 1311: 1301: 1291:November 12, 1289:. Retrieved 1282:the original 1277: 1264: 1252:. Retrieved 1245:the original 1240: 1227: 1215:. Retrieved 1208:the original 1203: 1190: 1179:the original 1174: 1162: 1154:the original 1149: 1140: 1063: 1042: 1034: 1030: 1029: 1019: 1015: 1011: 1007: 1003: 986:to refer to 983: 979: 975: 971: 969: 922:Athlon 64 X2 915: 729:Power Mac G5 532: 523: 517:bits and 800 512: 487: 483: 479: 475: 472: 455:coprocessors 448: 429: 404: 375:Athlon 64 FX 357: 310: 306: 299: 293: 275: 267:Applications 253: 230: 218: 202: 182: 171: 167:clock signal 153: 118: 110:Power Mac G5 88:(CPUs) from 76: 44: 40: 36: 35: 25: 2282:CoreConnect 2261:ExpressCard 2189:Thunderbolt 2179:Camera Link 1962:Bus and Tag 1648:Address bus 1643:Control bus 1638:Daisy chain 1507:November 2, 1471:HotHardware 1380:January 17, 1322:October 16, 1217:January 30, 1117:PCI Express 1064:On Zen and 1049:GB/s to 512 1014:echnology ( 619:ServerWorks 492:PCI Express 301:southbridge 295:northbridge 286:PCI Express 241:traffic or 197:peripherals 98:motherboard 2335:Categories 2135:ACCESS.bus 2034:Peripheral 1834:InfiniBand 1829:HP GSC bus 1623:System bus 1254:August 17, 1168:"Overview" 1133:References 1000:Intel Core 928:, Phenom, 743:CPUs from 719:PMC-Sierra 652:) chipsets 482:ransport e 332:Sempron 64 209:deemphasis 135:ULLtraDIMM 79:system bus 49:processors 2096:Lightning 2046:Atari SIO 1921:SpaceWire 1754:Zorro III 1694:S-100 bus 1689:SS-50 bus 1682:Standards 1602:standards 1595:Technical 1445:AnandTech 1010:hreading 996:Pentium 4 930:Phenom II 926:Athlon II 918:Athlon 64 750:Transmeta 721:RM9000X2 662:processor 640:OpenCores 595:chipsets 554:chipsets 486:pansion ( 344:Phenom II 336:Turion 64 328:Athlon II 324:Athlon 64 318:in their 132:PCIe SSDs 116:systems. 90:Athlon 64 61:bandwidth 2322:Category 2297:Wishbone 2270:Embedded 2249:Portable 2169:Profibus 2101:DMX512-A 1987:Parallel 1839:Ethernet 1749:Zorro II 1699:Multibus 1600:de facto 1476:April 4, 1426:WikiChip 1370:EE Times 1086:See also 772:version 745:Broadcom 691:nForce 4 685:nForce 3 656:Loongson 615:Broadcom 451:Torrenza 444:IP Cores 419:Ethernet 411:switches 145:Overview 108:for the 92:through 57:parallel 2302:SLIMbus 2256:PC Card 2240:TOSLINK 1930:Storage 1884:RapidIO 1764:FASTBUS 1719:STD Bus 1616:General 1349:May 24, 1312:YouTube 1122:RapidIO 956:nForce3 946:Opteron 934:Sempron 901:32-bit 878:32-bit 855:32-bit 832:32-bit 809:32-bit 739:SiByte 676:nForce2 627:HT-2100 624:HT-2000 529:Testing 407:routers 395:Newisys 371:Opteron 320:Opteron 282:Pentium 65:latency 2235:S/PDIF 2126:1-Wire 2091:RS-485 2086:RS-423 2081:RS-422 2076:RS-232 1937:ST-506 1894:NVLink 1744:STEbus 1704:Unibus 1051:  1047:  951:  938:Turion 916:* AMD 693:series 687:series 672:nForce 666:Nvidia 617:(then 519:  515:  504:QLogic 440:Xilinx 436:Altera 340:Phenom 225:32-bit 221:packet 185:16-bit 174:32-bit 156:  94:AMD FX 63:, low- 53:serial 2230:McASP 2198:Audio 2143:SMBus 2139:PMBus 2121:UNI/O 2061:HP-IL 2014:SATAe 1999:ESCON 1972:HIPPI 1804:NuBus 1759:CAMAC 1729:Q-Bus 1724:SMBus 1709:VAXBI 1606:wired 1337:AMD. 1285:(PDF) 1274:(PDF) 1248:(PDF) 1237:(PDF) 1211:(PDF) 1200:(PDF) 1182:(PDF) 1171:(PDF) 1127:AGESA 1080:Zen 4 1075:Zen 3 1071:Zen 2 1018:) or 1006:yper- 988:Intel 910:25.6 907:12.8 904:51.2 895:2008 887:20.8 884:10.4 881:41.6 872:2006 864:11.2 858:22.4 849:2004 835:12.8 826:2002 812:12.8 803:2001 775:Year 633:Cisco 546:AMD64 521:MHz. 432:FPGAs 393:from 189:8-bit 106:Apple 59:high- 2287:AMBA 2225:MADI 2210:AES3 2071:MIDI 2024:NVMe 2020:AHCI 1982:SCSI 1967:DSSI 1942:ESDI 1819:SBus 1779:EISA 1714:MBus 1604:for 1597:and 1558:2008 1509:2002 1478:2024 1452:2022 1408:2022 1382:2017 1351:2017 1324:2009 1293:2022 1256:2008 1219:2008 1073:and 1066:Zen+ 1059:Vega 978:yper 966:Name 942:1207 892:3.1 869:3.0 861:5.6 846:2.0 841:6.4 838:3.2 823:1.1 818:6.4 815:3.2 800:1.0 741:MIPS 734:Raza 723:MIPS 674:and 660:MIPS 605:ATI 598:ATI 478:yper 438:and 415:Mbit 409:and 387:EPYC 373:and 360:NUMA 346:and 298:and 193:CPUs 125:DDR4 114:MIPS 104:and 2291:AXI 2220:I²S 2174:USB 2159:D²B 2154:SPI 2149:I3C 2131:I²C 2066:HIL 2051:DCB 2022:or 2009:SSA 1992:SAS 1952:SMD 1947:IPI 1869:AGP 1859:PXI 1849:PCI 1844:UPA 1824:VLB 1814:MCA 1799:VPX 1794:VXS 1789:VXI 1784:VME 1769:LPC 1739:ISA 1055:Zen 1016:HTT 990:'s 960:ULi 949:2.0 944:), 756:VIA 725:CPU 658:-3 646:IBM 593:ATI 552:AMD 543:AMD 500:RAM 496:DMA 488:HTX 417:/s 312:AMD 290:AGP 234:I/O 159:MHz 102:IBM 83:AMD 2337:: 2141:, 2137:, 1530:, 1518:, 1469:. 1443:. 1424:. 1399:. 1368:. 1310:. 1276:. 1239:. 1202:. 1173:. 1148:. 1035:IF 984:HT 972:HT 936:, 932:, 508:HP 348:FX 342:, 338:, 334:, 330:, 326:, 322:, 304:. 178:GB 121:MT 41:HT 2293:) 2289:( 2145:) 2133:( 1587:e 1580:t 1573:v 1523:. 1480:. 1454:. 1428:. 1410:. 1384:. 1353:. 1326:. 1295:. 1258:. 1221:. 1033:( 1012:T 1008:T 1004:H 980:T 976:H 484:X 480:T 476:H 377:( 55:/ 39:(

Index

Hyper-Threading

processors
serial
parallel
bandwidth
latency
point-to-point link
HyperTransport Consortium
system bus
AMD
central processing units
Athlon 64
AMD FX
motherboard
IBM
Apple
Power Mac G5
MIPS
MT
DDR4

PCIe SSDs
ULLtraDIMM
front-side bus
MHz
double data rate
clock signal
32-bit
GB

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