130:
73:. In a single read or write operation, only one bank is accessed, therefore the number of bits in a column or a row, per bank and per chip, equals the memory bus width in bits (single channel). The size of a bank is further determined by the number of bits in a column and a row, per chip, multiplied by the number of chips in a bank.
177:
190:
118:
The number of memory modules needed to have the same number of data bits as the bus. A bank can consist of one or more memory modules.
115:. When data is stored or retrieved consecutively each bank has enough time to recover before the next request for that bank arrives.
62:
17:
69:(DDR SDRAM), a bank consists of multiple rows and columns of storage units, and is usually spread out across several
84:
computers have (at least) two very different banks of memory, one for program storage and another for data storage.
222:
253:
179:
MCS-4 Assembly
Language Programming Manual - The INTELLEC 4 Microcomputer System Programming Manual
35:
66:
31:
112:. Cache memory is divided in banks to evade the effects of the bank cycle time (see above)
81:
8:
163:
148:
135:
96:
that is addressed consecutively in the total set of memory banks, i.e., when data item
70:
186:
93:
58:
46:
158:
54:
143:
77:
247:
61:
along with physical organization of the hardware memory slots. In a typical
153:
129:
76:
Some computers have several identical memory banks of RAM, and use
50:
189:. December 1973. pp. 2-5–2-6. MCS-030-1273-1. Archived from
185:(Preliminary ed.). Santa Clara, California, USA:
45:
is a logical unit of storage in electronics, which is
125:
245:
27:Logical unit of storage in computer architecture
63:synchronous dynamic random-access memory
14:
246:
176:"2.3.3 Data Random Access Memory".
24:
169:
25:
265:
227:Overview of Recent Supercomputers
128:
215:
57:bank may be determined by the
13:
1:
208:
87:
7:
121:
92:A memory bank is a part of
10:
270:
29:
80:to switch between them.
30:Not to be confused with
36:Block (computer memory)
67:double data rate SDRAM
32:Page (computer memory)
18:Bank (computer memory)
82:Harvard architecture
164:Memory organisation
149:Interleaved memory
136:Electronics portal
108:is stored in bank
100:is stored in bank
187:Intel Corporation
59:memory controller
49:-dependent. In a
16:(Redirected from
261:
238:
237:
235:
233:
219:
204:
202:
201:
195:
184:
138:
133:
132:
111:
107:
103:
99:
21:
269:
268:
264:
263:
262:
260:
259:
258:
254:Computer memory
244:
243:
242:
241:
231:
229:
221:
220:
216:
211:
199:
197:
193:
182:
175:
172:
170:Further reading
159:Memory geometry
134:
127:
124:
109:
105:
101:
97:
90:
39:
28:
23:
22:
15:
12:
11:
5:
267:
257:
256:
240:
239:
213:
212:
210:
207:
206:
205:
171:
168:
167:
166:
161:
156:
151:
146:
144:Bank switching
140:
139:
123:
120:
89:
86:
78:bank switching
26:
9:
6:
4:
3:
2:
266:
255:
252:
251:
249:
228:
224:
218:
214:
196:on 2020-03-01
192:
188:
181:
180:
174:
173:
165:
162:
160:
157:
155:
152:
150:
147:
145:
142:
141:
137:
131:
126:
119:
116:
114:
95:
85:
83:
79:
74:
72:
68:
64:
60:
56:
52:
48:
44:
37:
33:
19:
230:. Retrieved
226:
217:
198:. Retrieved
191:the original
178:
117:
113:
104:, data item
94:cache memory
91:
75:
42:
40:
154:Memory rank
65:(SDRAM) or
43:memory bank
223:"Glossary"
209:References
200:2020-03-02
88:In caching
232:26 August
248:Category
122:See also
106:a(n + 1)
51:computer
47:hardware
55:memory
53:, the
194:(PDF)
183:(PDF)
110:b + 1
71:chips
234:2011
98:a(n)
34:or
250::
225:.
41:A
236:.
203:.
102:b
38:.
20:)
Text is available under the Creative Commons Attribution-ShareAlike License. Additional terms may apply.
