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822:) EEPROM address space. The same two-byte addressing is also used by larger EEPROMs, like the 24C512 which stores 512 kbits (or 64 kB). Writing data to and reading from these EEPROMs uses a simple protocol: the address is written, and then data is transferred until the end of the message. The data transfer part of the protocol can cause trouble on the SMBus, since the data bytes are not preceded by a count, and more than 32 bytes can be transferred at once. IC EEPROMs smaller than 32 kbit, like the 2 kbit 24C02, are often used on the SMBus with inefficient single-byte data transfers to overcome this problem. 796: 364: 1137:(3.4 Mbit/s) is compatible with normal IC devices on the same bus, but requires the controller have an active pull-up on the clock line which is enabled during high speed transfers. The first data bit is transferred with a normal open-drain rising clock edge, which may be stretched. For the remaining seven data bits, and the ACK, the controller drives the clock high at the appropriate time and the target may not stretch it. All high-speed transfers are preceded by a single-byte "controller code" at fast or standard speed. This code serves three purposes: 1285:
a low on the other. One method for preventing latch-up is for a buffer to have carefully selected input and output levels such that the output level of its driver is higher than its input threshold, preventing it from triggering itself. For example, a buffer may have an input threshold of 0.4 V for detecting a low, but an output low level of 0.5 V. This method requires that all other devices on the bus have thresholds which are compatible and often means that multiple buffers implementing this scheme cannot be put in series with one another.
4315:, which cannot reliably be distinguished from either (without changing device state, which might not be allowed). The only reliable configuration mechanisms available to hosts involve out-of-band mechanisms such as tables provided by system firmware, which list the available devices. Again, this issue can partially be addressed by ARP in SMBus systems, especially when vendor and product identifiers are used; but that has not really caught on. The Rev. 3 version of the IC specification adds a device ID mechanism. 1032:
node to notice such a difference is the one that loses arbitration: it stops driving SDA. If it is a controller, it also stops driving SCL and waits for a STOP; then it may try to reissue its entire message. In the meantime, the other node has not noticed any difference between the expected and actual levels on SDA and therefore continues transmission. It can do so without problems because so far the signal has been exactly as it expected; no other transmitter has disturbed its message.
2472: 380: 6552: 42: 352:(SMBus), defined by Intel and Duracell in 1994, is a subset of IC, defining a stricter usage. One purpose of SMBus is to promote robustness and interoperability. Accordingly, modern IC systems incorporate some policies and rules from SMBus, sometimes supporting both IC and SMBus, requiring only minimal reconfiguration either by commanding or output pin use. System management for PC systems uses SMBus whose pins are allocated in both conventional 4628: 829:), then sends the two-byte address of data within the EEPROM and then sends data bytes to be written starting at that address, followed by a STOP. When writing multiple bytes, all the bytes must be in the same 32-byte page. While it is busy saving those bytes to memory, the EEPROM will not respond to further IC requests. (That is another incompatibility with SMBus: SMBus devices must always respond to their bus addresses.) 1203: 840:). The EEPROM will then respond with the data bytes beginning at the specified EEPROM data address — a combined message: first a write, then a read. The controller issues an ACK after each read byte except the last byte, and then issues a STOP. The EEPROM increments the address after each data byte transferred; multi-byte reads can retrieve the entire contents of the EEPROM using one combined message. 5537: 1222:. IC does not employ a standardized connector, however, board designers have created various wiring schemes for IC interconnections. To minimize the possible damage due to plugging 0.1-inch headers in backwards, some developers have suggested using alternating signal and power connections of the following wiring schemes: (GND, SCL, VCC, SDA) or (VCC, SDA, GND, SCL). 849: 5606: 4319:
SMBus does not yet support it). IC nodes implemented in software (instead of dedicated hardware) may not even support the 100 kbit/s speed; so the whole range defined in the specification is rarely usable. All devices must at least partially support the highest speed used or they may spuriously detect their device address.
1028:) that use random back-off delays before issuing a retry, IC has a deterministic arbitration policy. Each transmitter checks the level of the data line (SDA) and compares it with the levels it expects; if they do not match, that transmitter has lost arbitration and drops out of this protocol interaction. 1281:
fact that IC lines are specified to be bidirectional. Multiplexers can be implemented with analog switches, which can tie one segment to another. Analog switches maintain the bidirectional nature of the lines but do not isolate the capacitance of one segment from another or provide buffering capability.
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Because of these limits (address management, bus configuration, potential faults, speed), few IC bus segments have even a dozen devices. Instead, it is common for systems to have several smaller segments. One might be dedicated to use with high-speed devices, for low-latency power management. Another
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Because IC is a shared bus, there is the potential for any device to have a fault and hang the entire bus. For example, if any device holds the SDA or SCL line low, it prevents the controller from sending START or STOP commands to reset the bus. Thus it is common for designs to include a reset signal
1288:
Alternatively, other types of buffers exist that implement current amplifiers or keep track of the state (i.e. which side drove the bus low) to prevent latch-up. The state method typically means that an unintended pulse is created during a hand-off when one side is driving the bus low, then the other
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or must be guaranteed never to be issued by two controllers at the same time. (For example, a command which is issued by only one controller need not be idempotent, nor is it necessary for a specific command to be idempotent when some mutual exclusion mechanism ensures that only one controller can be
1031:
If one transmitter sets SDA to 1 (not driving a signal) and a second transmitter sets it to 0 (pull to ground), the result is that the line is low. The first transmitter then observes that the level of the line is different from that expected and concludes that another node is transmitting. The first
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Many IC devices do not distinguish between a combined transaction and the same messages sent as separate transactions, but not all. The device ID protocol requires a single transaction; targets are forbidden from responding if they observe a stop symbol. Configuration, calibration or self-test modes
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Buffers can be used to isolate capacitance on one segment from another and/or allow IC to be sent over longer cables or traces. Buffers for bi-directional lines such as IC must use one of several schemes for preventing latch-up. IC is open-drain, so buffers must drive a low on one side when they see
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to split large bus segments into smaller ones. This can be necessary to keep the capacitance of a bus segment below the allowable value or to allow multiple devices with the same address to be separated by a multiplexer. Many types of multiplexers and buffers exist and all must take into account the
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One of the more significant features of the IC protocol is clock stretching. An addressed target device may hold the clock line (SCL) low after receiving (or sending) a byte, indicating that it is not yet ready to process more data. The controller that is communicating with the target may not finish
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The vast majority of applications use IC in the way it was originally designed—peripheral ICs directly wired to a processor on the same printed circuit board, and therefore over relatively short distances of less than 1 foot (30 cm), without a connector. However using a differential driver, an
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is essentially a write-only IC subset, which is incompatible with other modes except in that it is easy to add support for it to an existing IC interface hardware design. Only one controller is permitted, and it actively drives data lines at all times to achieve a 5 Mbit/s transfer rate. Clock
1035:
If the two controllers are sending a message to two different targets, the one sending the lower target address always "wins" arbitration in the address stage. Since the two controllers may send messages to the same target address, and addresses sometimes refer to multiple targets, arbitration must
990:
Although the controller may also hold the SCL line low for as long as it desires (this is not allowed since Rev. 6 of the protocol – subsection 3.1.1), the term "clock stretching" is normally used only when targets do it. Although in theory any clock pulse may be stretched, generally it is the
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On very low-power systems, the pull-up resistors can use more power than the entire rest of the design combined. On these, the resistors are often powered by a switchable voltage source, such as a DIO from a microcontroller. The pull-ups also limit the speed of the bus and have a small additional
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Devices are allowed to stretch clock cycles to suit their particular needs, which can starve bandwidth needed by faster devices and increase latencies when talking to other device addresses. Bus capacitance also places a limit on the transfer speed, especially when current sources are not used to
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i386/amd64 hardware during boot without any configuration by the user nor a noticeable probing delay; the matching procedures of the individual drivers then only has to rely on a string-based "friendly-name" for matching; as a result, most IC sensor drivers are automatically enabled by default in
1073:
An alternative target notification system uses the separate SMBALERT# signal to request attention. In this case, the host performs a 1-byte read from the reserved "SMBus Alert Response Address" (0x0C), which is a kind of broadcast address. All alerting targets respond with a data bytes containing
1047:
In the extremely rare case that two controllers simultaneously send identical messages, both will regard the communication as successful, but the target will only see one message. For this reason, when a target can be accessed by multiple controllers, every command recognized by the target either
477:
Note that the bit rates are quoted for the transfers between controller (master) and target (slave) without clock stretching or other hardware overhead. Protocol overheads include a target address and perhaps a register address within the target device, as well as per-byte ACK/NACK bits. Thus the
4318:
IC supports a limited range of speeds. Hosts supporting the multi-megabit speeds are rare. Support for the Fm+ 1 Mbit/s speed is more widespread, since its electronics are simple variants of what is used at lower speeds. Many devices do not support the 400 kbit/s speed (in part because
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When having a single controller, it is possible to have multiple IC buses share the same SCL line. The packets on each bus are either sent one after the other or at the same time. This is possible, because the communication on each bus can be subdivided in alternating short periods with high SCL
1090:
version 1.3 extends the SMBus alert response protocol in its "zone read" protocol. Targets may be grouped into "zones", and all targets in a zone may be addressed to respond, with their responses masked (omitting unwanted information), inverted (so wanted information is sent as 0 bits, which win
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Although conceptually a single-controller bus, a target device that supports the "host notify protocol" acts as a controller to perform the notification. It seizes the bus and writes a 3-byte message to the reserved "SMBus Host" address (0x08), passing its address and two bytes of data. When two
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protocol, allowing multiple such SMBus transactions to be sent in one combined message. The terminating STOP indicates when those grouped actions should take effect. For example, one PMBus operation might reconfigure three power supplies (using three different IC target addresses), and their new
4411:
In some cases, use of the term "two-wire interface" indicates incomplete implementation of the IC specification. Not supporting arbitration or clock stretching is one common limitation, which is still useful for a single controller communicating with simple targets that never stretch the clock.
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The assignment of target addresses is a weakness of IC. Seven bits is too few to prevent address collisions between the many thousands of available devices. What alleviates the issue of address collisions between different vendors and also allows to connect to several identical devices is that
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Every controller monitors the bus for start and stop bits and does not start a message while another controller is keeping the bus busy. However, two controllers may start transmission at about the same time; in this case, arbitration occurs. Target transmit mode can also be arbitrated, when a
4122:
are tools that collect, analyze, decode, and store signals, so people can view the high-speed waveforms at their leisure. Logic analyzers display time stamps of each signal level change, which can help find protocol problems. Most logic analyzers have the capability to decode bus signals into
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Each message is a read or a write. A transaction consisting of a single message is called either a read or a write transaction. A transaction consisting of multiple messages is called a combined transaction. The most common form of the latter is a write message providing intra-device address
786:
In practice, most targets adopt request-response control models, where one or more bytes following a write command are treated as a command or address. Those bytes determine how subsequent written bytes are treated or how the target responds on subsequent reads. Most SMBus operations involve
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After every 8 data bits in one direction, an "acknowledge" bit is transmitted in the other direction. The transmitter and receiver switch roles for one bit, and the original receiver transmits a single "0" bit (ACK) back. If the transmitter sees a "1" bit (NACK) instead, it learns that:
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While SCL is low, the transmitter (initially the controller) sets SDA to the desired value and (after a small delay to let the value propagate) lets SCL float high. The controller then waits for SCL to actually go high; this will be delayed by the finite rise time of the SCL signal (the
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their own address. When the target successfully transmits its own address (winning arbitration against others) it stops raising that interrupt. In both this and the preceding case, arbitration ensures that one target's message will be received, and the others will know they must retry.
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If the controller wishes to read from the target, then it repeatedly receives a byte from the target, the controller sending an ACK bit after every byte except the last one. (In this situation, the controller is in controller receive mode, and the target is in target transmit mode.)
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One case which must be handled carefully in multi-controller IC implementations is that of the controllers talking to each other. One controller may lose arbitration to an incoming message, and must change its role from controller to target in time to acknowledge its own address.
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IC lends itself to a "bus driver" software design. Software for attached devices is written to call a "bus driver" that handles the actual low-level IC hardware. This permits the driver code for attached devices to port easily to other hardware, including a bit-banging design.
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An IC transaction may consist of multiple messages. The controller terminates a message with a STOP condition if this is the end of the transaction or it may send another START condition to retain control of the bus for another message (a "combined format" transaction).
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because it identifies the controller (there are eight controller codes, and each controller must use a different one), it ensures that arbitration is complete before the high-speed portion of the transfer, and so the high-speed portion need not make allowances for that
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The controller is initially in controller transmit mode by sending a START followed by the 7-bit address of the target it wishes to communicate with, which is finally followed by a single bit representing whether it wishes to write (0) to or read (1) from the target.
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When idle, both lines are high. To start a transaction, SDA is pulled low while SCL remains high. It is illegal to transmit a stop marker by releasing SDA to float high again (although such a "void message" is usually harmless), so the next step is to pull SCL low.
489:, which restricts practical communication distances to a few meters. The relatively high impedance and low noise immunity requires a common ground potential, which again restricts practical use to communication within the same PC board or small system of boards. 814:, which uses two request bytes that are called Address High and Address Low. (Accordingly, these EEPROMs are not usable by pure SMBus hosts, which support only single-byte commands or addresses.) These bytes are used for addressing bytes within the 32  478:
actual transfer rate of user data is lower than those peak bit rates alone would imply. For example, if each interaction with a target inefficiently allows only 1 byte of data to be transferred, the data rate will be less than half the peak bit rate.
4298:
10-bit IC addresses are not yet widely used, and many host operating systems do not support them. Neither is the complex SMBus "ARP" scheme for dynamically assigning addresses (other than for PCI cards with SMBus presence, for which it is required).
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bit (active low for acknowledged) for that address. The controller then continues in either transmit or receive mode (according to the read/write bit it sent), and the target continues in the complementary mode (receive or transmit, respectively).
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and other vendors. Vendors use the name TWI, even though IC is not a registered trademark as of 2014-11-07. Trademark protection only exists for the respective logo (see upper right corner), and patents on IC have now lapsed. According to
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Arbitration occurs very rarely, but is necessary for proper multi-controller support. As with clock stretching, not all devices support arbitration. Those that do, generally label themselves as supporting "multi-controller" communication.
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Clock stretching is the only time in IC where the target drives SCL. Many targets do not need to clock stretch and thus treat SCL as strictly an input with no circuitry to drive it. Some controllers, such as those found inside custom
892:) so that the pull-up resistor pulls it high. A line is never actively driven high. This wiring allows multiple nodes to connect to the bus without short circuits from signal contention. High-speed systems (and some others) may use a 705:
If the controller wishes to write to the target, then it repeatedly sends a byte with the target sending an ACK bit. (In this situation, the controller is in controller transmit mode, and the target is in target receive mode.)
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With only a few exceptions, neither IC nor SMBus define message semantics, such as the meaning of data bytes in messages. Message semantics are otherwise product-specific. Those exceptions include messages addressed to the IC
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first. The start condition is indicated by a high-to-low transition of SDA with SCL high; the stop condition is indicated by a low-to-high transition of SDA with SCL high. All other transitions of SDA take place with SCL low.
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manufacturers dedicate pins that can be used to set the target address to one of a few address options per device. Two or three pins is typical, and with many devices, there are three or more wiring options per address pin.
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that provides an external method of resetting the bus devices. However many devices do not have a dedicated reset pin, forcing the designer to put in circuitry to allow devices to be power-cycled if they need to be reset.
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Automatic bus configuration is a related issue. A given address may be used by a number of different protocol-incompatible devices in various systems, and hardly any device types can be detected at runtime. For example,
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SMBus also supports an "address resolution protocol", wherein devices return a 16-byte "Unique Device Identifier" (UDID). Multiple devices may respond; the one with the lowest UDID will win arbitration and be
922:
Except for the start and stop signals, the SDA line only changes while the clock is low; transmitting a data bit consists of pulsing the clock line high while holding the data line steady at the desired level.
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node is driving the line low, it will be low. Nodes that are trying to transmit a logical one (i.e. letting the line float high) can detect this and conclude that another node is active at the same time.
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The data is sampled (received) when SCL rises for the first bit (B1). For a bit to be valid, SDA must not change between a rising edge of SCL and the subsequent falling edge (the entire green bar time).
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places limits on how far clocks may be stretched. Hosts and targets adhering to those limits cannot block access to the bus for more than a short time, which is not a guarantee made by pure IC systems.
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In order to avoid false marker detection, there is a minimum delay between the SCL falling edge and changing SDA, and between changing SDA and the SCL rising edge. Note that an IC message containing
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Once SCL is high, the controller waits a minimum time (4 μs for standard-speed IC) to ensure that the receiver has seen the bit, then pulls it low again. This completes transmission of one bit.
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The bus is a multi-controller bus, which means that any number of controller nodes can be present. Additionally, controller and target roles may be changed between messages (after a STOP is sent).
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might be used to control a few devices where latency and throughput are not important issues; yet another segment might be used only to read EEPROM chips describing add-on cards (such as the
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the transmission of the current bit, but must wait until the clock line actually goes high. If the target is clock-stretching, the clock line will still be low (because the connections are
984:). The same is true if a second, slower, controller tries to drive the clock at the same time. (If there is more than one controller, all but one of them will normally lose arbitration.) 2451:. Each message begins with a start symbol, and the transaction ends with a stop symbol. Start symbols after the first, which begin a message but not a transaction, are referred to as 987:
The controller must wait until it observes the clock line going high, and an additional minimal time (4 μs for standard 100 kbit/s IC) before pulling the clock low again.
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To read starting at a particular address in the EEPROM, a combined message is used. After a START, the controller first writes that chip's bus address with the direction bit clear (
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arbitration), or reordered (so the most significant information is sent first). Arbitration ensures that the highest priority response is the one first returned to the controller.
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In addition to 0 and 1 data bits, the IC bus allows special START and STOP signals which act as message delimiters and are distinct from the data bits. (This is in contrast to the
5604:, "Two-Wire Bus-System Comprising A Clock Wire And A Data Wire For Interconnecting A Number Of Stations", issued 1987-08-25, assigned to U.S. Philips Corporation 4909: 5628: 5049: 2217:
In addition, the remaining 112 addresses are designated for specific classes of device, and some of them are further reserved by either related standards or common usage.
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Advantages are using targets devices with the same address at the same time and saving connections or a faster throughput by using several data lines at the same time.
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IC protocol analyzers are tools that sample an IC bus and decode the electrical signals to provide a higher-level view of the data being transmitted on the bus.
4016:, there are about two dozen IC kernel extensions that communicate with sensors for reading voltage, current, temperature, motion, and other physical status. 950:(If controller transmitting to target) The target is unable to accept the data. No such target, command not understood, or unable to accept any more data. 5792: 5587: 3965:
applicable architectures without ill effects on stability; individual sensors, both IC and otherwise, are exported to the userland through the sysctl
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In all modes, the clock frequency is controlled by the controller(s), and a longer-than-normal bus may be operated at a slower-than-nominal speed by
5206: 4851: 3992:. On general-purpose hardware, each driver has to do its own probing, hence all drivers for the IC targets are disabled by default in NetBSD in 1117:
is widely supported by IC target devices, so a controller may use it as long as it knows that the bus capacitance and pull-up strength allow it.
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TWI (Two-Wire Interface) or TWSI (Two-Wire Serial Interface) is essentially the same bus implemented on various system-on-chip processors from
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devices (with 3 mA pull-down capability) can be achieved if there is some way to reduce the strength of the pull-ups when talking to them.
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In a combined transaction, each read or write begins with a START and the target address. The START conditions after the first are also called
5652: 5520: 452:, but arbitrarily low clock frequencies are also allowed. Later revisions of IC can host more nodes and run at faster speeds (400 kbit/s 1123:
achieves up to 1 Mbit/s using more powerful (20 mA) drivers and pull-ups to achieve faster rise and fall times. Compatibility with
995:, its IC interface could stretch the clock after each byte, until the software decides whether to send a positive acknowledgment or a NACK. 970:
Send a "Repeated start": Set SDA high, let SCL go high, then pull SDA low again. This starts a new IC bus message without releasing the bus.
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bits. Repeated STARTs are not preceded by STOP conditions, which is how targets know that the next message is part of the same transaction.
836:) and then the two bytes of EEPROM data address. It then sends a (repeated) START and the EEPROM's bus address with the direction bit set ( 267:
IC bus can be found in a wide range of electronics applications where simplicity and low manufacturing cost are more important than speed.
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weighting scheme and a local caching function for reading register values from the IC targets; this makes it possible to probe sensors on
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is needed for each line. A logic "0" is output by pulling the line to ground, and a logic "1" is output by letting the line float (output
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Interfaces are listed by their speed in the (roughly) ascending order, so the interface at the end of each section should be the fastest.
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The 100 kbit/s IC system was created as a simple internal bus system for building control electronics with various Philips chips.
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it ensures that fast or normal speed devices will not try to participate in the transfer (because it does not match their address), and
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There may be four potential modes of operation for a given bus device, although most devices only use a single role and its two modes:
6520: 5459: 5117: 4882: 4375: 4203: 4082:
There are a number of IC host adapter hardware solutions for making a IC controller or target connection to host computers, running
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uses arbitration in three additional contexts, where multiple targets respond to the controller, and one gets its message through.
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instead of a resistor to pull-up only SCL or both SCL and SDA, to accommodate higher bus capacitance and enable faster rise times.
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A single message writes to the EEPROM. After the START, the controller sends the chip's bus address with the direction bit clear (
6012: 639:(SCL) and data (SDA) lines with 7-bit addressing. The bus has two roles for nodes, either controller (master) or target (slave): 5775: 5697: 5620: 5440: 5046: 3969:
framework. As of March 2019, OpenBSD has over two dozen device drivers on IC that export some kind of a sensor through the
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Updated Table 5 assigned manufacturer IDs. Added Section 9 overview of I3C bus. This is the current standard (login required).
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has two pins for address selection, each of which can be tied high or low or left unconnected, offering 9 different addresses.
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pinout ("type 6", the I2C variant): unused/GPIO/interrupt from slave to master, unused/GPIO/reset, SCL, SDA, GND, Vcc (3.3V)
6200: 5871: 3984:, over two dozen IC target devices exist that feature hardware monitoring sensors, which are accessible through the sysmon 284: 5478: 5030: 5011: 5466:
has a single pin for address selection to be tied high or low or connected to SDA or SCL, offering 4 different addresses.
4785: 5906: 4692: 6253: 6092: 6022: 5067: 4651: 4415: 5266: 6082: 4993: 4960: 4099: 679: 353: 189: 183: 5641: 2550:. It illustrates all of the IC features described before (clock stretching, arbitration, start/stop bit, ack/nack). 2493:
This process repeats, SDA transitioning while SCL is low, and the data being read while SCL is high (B2 through Bn).
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When developing or troubleshooting systems using IC, visibility at the level of hardware signals can be important.
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stretching, arbitration, read transfers, and acknowledgements are all omitted. It is mainly intended for animated
1106:
may always be used, but combining devices of different capabilities on the same bus can cause issues, as follows:
5504: 4396:) use 2-way redundant IC for shelf management. Multi-controller IC capability is a requirement in these systems. 4056: 2463:
which cause the target to respond unusually are also often automatically terminated at the end of a transaction.
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followed by short periods with low SCL. And the clock can be stretched, if one bus needs more time in one state.
732:
Combined format, where a controller (master) issues at least two reads or writes to one or more targets (slaves).
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There are several possible operating modes for IC communication. All are compatible in that the 100 kbit/s
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The number of nodes which can exist on a given IC bus is limited by the address space and also by the total bus
5972: 4929: 6524: 6175: 6144: 5579: 957:
Only the SDA line changes direction during acknowledge bits; the SCL is always controlled by the controller.
207: 5797: 1113:
is highly compatible and simply tightens several of the timing parameters to achieve 400 kbit/s speed.
1003:
may not support clock stretching; often these devices will be labeled as a "two-wire interface" and not IC.
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in 2018, is mutually compatible with Qwiic; device board size is standardized, boards have 3.3v regulators
4048:, IC is provided with a generic IC interface from the IO controller and supported from the OS module system 320: 4483:
and a 10-bit addressing mode to increase capacity to 1008 nodes. This was the first standardized version.
4118:
When developing and/or troubleshooting the IC bus, examination of hardware signals can be very important.
2427:
Although MSB 1111 is reserved for Device ID and 10-bit target (slave) addressing, it is also used by VESA
643:
Controller (master) node: Node that generates the clock and initiates communication with targets (slaves).
6448: 6387: 6242: 5195: 4842: 4344: 4258: 2355: 2351: 1207: 1177:
a ninth clock pulse is sent per byte transmitted marking the position of the unused acknowledgement bits.
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Target (slave) node: Node that receives the clock and responds when addressed by the controller (master).
392: 388: 312: 308: 6047: 5812: 4023:, IC is implemented by the respective device drivers of much of the industry's available hardware. For 4009:) adapter to which it is connected. Hundreds of such drivers are part of current Linux kernel releases. 3958: 953:(If target transmitting to controller) The controller wishes the transfer to stop after this data byte. 280: 6417: 2487:
SCL is pulled low, and SDA sets the first data bit level while keeping SCL low (during blue bar time).
2228:
is the "SMBus alert response address" which is polled by the host after an out-of-band interrupt, and
964:
Begin transferring another byte of data: the transmitter sets SDA, and the controller pulses SCL high.
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cost. Therefore, some designers are turning to other serial buses that do not need pull-ups, such as
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targets try to notify the host at the same time, one of them will lose arbitration and need to retry.
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Effects of Varying IC Pullup Resistors (Scope Captures of 5V IC with 9 Different Pullup Resistances)
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These tables show the various atomic states and bit operations that may occur during an IC message.
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An important consequence of this is that multiple nodes may be driving the lines simultaneously. If
5517: 3961: 2547: 2471: 1241: 743:
Any given target will only respond to certain messages, as specified in its product documentation.
4038:, IC is implemented by the respective device drivers of much of the industry's available hardware. 2496:
The final bit is followed by a clock pulse, during which SDA is pulled low in preparation for the
1024:
controller addresses multiple targets, but this is less common. In contrast to protocols (such as
6555: 6530: 6422: 6077: 5426: 2232:
is the default address which is initially used by devices capable of dynamic address assignment.
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intervals before or after the acknowledgment bit which are used. For example, if the target is a
5561: 960:
After the acknowledge bit, the clock line is low and the controller may do one of three things:
795: 722:
IC defines basic types of transactions, each of which begins with a START and ends with a STOP:
6112: 5350: 5124: 4332: 4024: 1248:
to instead carry differential-encoded IC signals or boosted single-ended IC signals; and every
316: 272: 222: 211: 74: 6574: 6376: 6329: 6185: 5957: 5805: 5083: 4661: 4641: 4559: 4367: 4006: 936: 912: 349: 5404: 5161: 4041:
Unison OS, a POSIX RTOS for IoT, supports IC for several MCU and MPU hardware architectures.
967:
Send a "Stop": Set SDA low, let SCL go high, then let SDA go high. This releases the IC bus.
6372: 6225: 6107: 5456: 4884:
NXP Application note AN11075: Driving I2C-bus signals over twisted pair cables with PCA9605
4721: 4656: 4549: 4408:, TWI and I2C have a few differences. One of them is that TWI does not support START byte. 4405: 4371: 4363: 4095: 3931:
also provide an IC framework, with support for a number of common controllers and sensors.
2428: 2317: 1289:
drives it low, then the first side releases (this is common during an IC acknowledgement).
698: 619: 367: 328: 257: 215: 142: 52: 5485:
uses two ADC channels discriminating twelve levels each to select any valid 7-bit address.
5236:. Document Revision 1.1. Intel, NEC, Hewlett-Packard & Dell. 2013-10-01. p. 563. 5128: 4891: 4850:(Application Note). Revision 1.0.1. System Management Interface Forum. 2016-01-07. AN001. 8: 6284: 5839: 4777: 4005:, IC is handled with a device driver for the specific device, and another for the IC (or 339: 226: 203: 4806: 3973:
framework, and the majority of these drivers are fully enabled by default in i386/amd64
1226:
alternate version of IC can communicate up to 20 meters (possibly over 100 meters) over
363: 5828: 5704: 4756: 4633: 4378:). These variants have differences in voltage and clock frequency ranges, and may have 799: 249: 70: 4869:"Is there any definitive I2C pin-out guidance out there? Not looking for a "STANDARD"" 1214:
IC is popular for interfacing peripheral circuits to prototyping systems, such as the
6274: 5896: 5832: 5754: 5734: 5708: 5437: 4989: 4956: 4760: 4553: 4385: 4379: 4276:, a 6-pin single-line 2.54mm header connector, used for I2C or SPI or UART; often on 4091: 4062: 4020: 2392: 660:
Controller (master) receive: Controller node is receiving data from a target (slave).
342:
pins and software. Many other bus technologies used in similar applications, such as
268: 245: 4716: 6007: 5354: 5306: 4374:(PMBus) and the Intelligent Platform Management Bus (IPMB, one of the protocols of 4028: 1227: 1094:
PMBus reserves IC addresses 0x28 and 0x37 for zone reads and writes, respectively.
932: 928: 885: 666:
Target (slave) receive: Target node is receiving data from the controller (master).
411: 396: 324: 5601: 4191:, utilizes 4-pin 2.0mm proprietary connectors, known as A2005 series, or 1125S-4P 1244:
carries IC; a few people use the 8P8C connectors and CAT5 cable normally used for
657:
Controller (master) transmit: Controller node is sending data to a target (slave).
6137: 5987: 5967: 5842: 5524: 5482: 5463: 5444: 5289: 5270: 5071: 5053: 5034: 5015: 4981: 4966: 4312: 4119: 2432: 2374: 2224:
is reserved for the SMBus host, which may be used by controller-capable devices,
992: 410:: serial data line (SDA) and serial clock line (SCL). Both are bidirectional and 384: 335: 304: 230: 218: 55: 5786: 5231:"Intelligent Platform Management Interface Specification Second Generation V2.0" 5103: 767:
configurations would take effect at the same time: when they receive that STOP.
663:
Target (slave) transmit: Target node is sending data to the controller (master).
303:
chips, etc. Common I2C applications include reading hardware monitors, sensors,
6438: 6132: 6057: 5982: 5886: 5861: 5475: 5027: 5008: 4868: 4268: 4237: 4087: 3305:// Wait for SDA value to be written by target, minimum of 4us for standard mode 3254:// Wait for SDA value to be written by target, minimum of 4us for standard mode 1272:
When there are many IC devices in a system, there can be a need to include bus
893: 889: 877: 865: 531: 407: 108: 5642:
IC-bus specification Rev 2.0; Philips Semiconductors; December 1998; Archived.
5167:. Version 3.0. System Management Interface Forum. 2014-12-20. pp. 81–82. 4131:
On various off the shelf modules, there are some main connectors and pinouts:
911:
and is a flow-control mechanism for targets. When used on SDA, this is called
6568: 6510: 6397: 6289: 6237: 6220: 6002: 5901: 5891: 5866: 5827: 5653:
IC-bus specification Rev 2.1; Philips Semiconductors; January 2000; Archived.
5302: 5064: 4452:
U.S. Patent 4,689,740 filed on November 2, 1981 by U.S. Philips Corporation.
4052: 3989: 3886: 1257: 1191: 437:, with a rarely used 10-bit extension. Common IC bus speeds are the 100  434: 28: 5675:
IC-bus specification Rev 4; NXP Semiconductors; February 13, 2012; Archived.
5339:
Constantine A. Murenin (2010-05-21). "5.2. IC bus scan through i2c_scan.c".
3113:// Wait for SDA value to be read by target, minimum of 4us for standard mode 1160:
where a transmission error would only cause an inconsequential brief visual
939:
of the bus) and may be additionally delayed by a target's clock stretching.
729:
Single message where a controller (master) reads data from a target (slave).
264:, have introduced compatible IC products to the market since the mid-1990s. 6247: 6190: 6042: 5947: 5263: 2418: 1219: 726:
Single message where a controller (master) writes data to a target (slave).
636: 5686:
IC-bus specification Rev 5; NXP Semiconductors; October 9, 2012; Archived.
6515: 6494: 6412: 6257: 6195: 6170: 6097: 5881: 5876: 5151:
Data Handbook IC12: I2C Peripherals, Philips ordering code 9397 750 00306
4389: 4059: 3953:
subsystem probes all possible sensor chips at once during boot, using an
3890: 2544: 2540: 1277: 1273: 1157: 482: 357: 146: 6334: 5664:
IC-bus specification Rev 3; NXP Semiconductors; June 19, 2007; Archived.
4240:
on 1.6mm thick circuitboard; pinout compatible with Raspberry Pi header
2543:
the IC protocol as an IC controller (master). The example is written in
1140:
it tells high-speed target devices to change to high-speed timing rules,
379: 6368: 6067: 5856: 4646: 4356: 4035: 3970: 3966: 3914: 2302: 1049: 1007: 981: 869: 112: 5621:"Philips sues eight more companies for infringement of I2C bus patent" 5496: 5358: 4257:
is a 5x2 2.54mm shrouded header connector, implementing together I2C,
4210:
2.0mm connectors, same connector as STEMMA but with different pin use
1170:
IC addressing allows multiple target devices to share the bus without
474:). These speeds are more widely used on embedded systems than on PCs. 6392: 6382: 6349: 6344: 6279: 6154: 5942: 5927: 5922: 4606: 4340: 3893:
developers can use the busio.I2C or machine.I2C classes respectively.
2484:
condition (S) signalled by SDA being pulled low while SCL stays high.
671: 486: 24: 5497:"Re: [PATCH 4/5] add i2c_probe_device and i2c_remove_device" 426:
or +3.3 V, although systems with other voltages are permitted.
41: 6402: 6339: 6072: 5932: 5624: 5342:
OpenBSD Hardware Sensors — Environmental Monitoring and Fan Control
4935: 4627: 4393: 4273: 4233: 4158: 4139: 4013: 3896: 2024:
Two groups of 8 addresses each are reserved for special functions:
1025: 819: 675: 419: 415: 261: 253: 2507:
condition (P) is signalled when SCL rises, followed by SDA rising.
346:(SPI), require more pins and signals to connect multiple devices. 6535: 6489: 6473: 6299: 6117: 6062: 5997: 5952: 5416:
https://www.cable-tester.com/i2c-pin-out-grove-from-seeed-studio/
5393: 5383:
https://hackaday.com/2022/05/04/the-connector-zoo-i2c-ecosystems/
5314: 4911:
Taking the leap off board: An introduction to I2C over long wires
4501:
with power-saving requirements for electric voltage and current.
4176:
2.0mm connectors (3-pin connectors are meant for analog/PWM use)
4045: 3935: 3928: 3920: 3880: 3870: 3866: 1237:
connector carries IC; the 10-pin iPack connector carries IC; the
1215: 1202: 1171: 815: 237: 131: 4986:
Extreme NXT: Extending the LEGO MINDSTORMS NXT to the Next Level
4098:-to-IC adapters. Not all of them require proprietary drivers or 2238: 682:, which are distinguished from data bits only by their timing.) 6468: 6359: 6324: 6319: 6314: 6309: 6127: 6017: 5977: 5937: 5252:
The 7-bit portion of the slave address for the BMC is 0010_000b
5196:"VESA Display Data Channel Command Interface (DDC/CI) Standard" 5088: 4308: 4207: 4173: 4143: 4065:
IC is supported by a set of extensions provided by TF Services.
4031:
devices, Windows 8 and later have an integrated I²C bus driver.
3985: 3981: 3954: 3924: 3902: 2555:// Hardware-specific support functions that MUST be customized: 1233:
Several standard connectors carry IC signals. For example, the
1161: 873: 811: 803: 468: 461: 438: 276: 6453: 5427:
https://www.cable-tester.com/i2c-pin-out-from-gravity-dfrobot/
3263:// Set SCL high to indicate a new valid SDA value is available 3104:// Set SCL high to indicate a new valid SDA value is available 1433:(SDA is set/sampled after SCL to avoid false state detection) 20: 6463: 6354: 6294: 6232: 6205: 6087: 6037: 5962: 5562:"What is TWI? How to Configure the TWI for I2C Communication" 4514:
Clarified version 2, without significant functional changes.
4400: 4083: 4002: 2407: 2396: 2363: 2340: 2321: 2306: 2280: 2258: 1087: 1062: 1011: 759: 747: 689:
If the target exists on the bus then it will respond with an
526: 300: 2019: 1506:
Driven high (or passive high) by receiver (after SCL falls)
1167:
the start and stop conditions are used to delimit transfers,
327:
settings (e.g. backlight, contrast, hue, color balance) via
6458: 6443: 6304: 6215: 6210: 6052: 5202: 4666: 4360: 4277: 4262: 4249: 3908: 3899:
supports IC communications natively as part of its MMBasic.
3869:
one can use the i2c.resource component for AmigaOS 4.x and
2359: 2291: 2269: 1261: 1249: 1238: 1234: 1000: 423: 296: 5781: 4558:
and added an assigned manufacturer ID table. It is only a
3350:// Write a byte to I2C bus. Return 0 if ack by the target. 2534: 915:
and ensures that there is only one transmitter at a time.
6407: 6032: 6027: 5405:
https://learn.adafruit.com/introducing-adafruit-stemma-qt
5340: 4418:(I3C) is a development of IC, under development in 2017. 4221:: utilizes 4-pin Molex SL 70553 series 2.54mm connectors 2220:
SMBus reserves some additional addresses. In particular,
1253: 881: 292: 288: 241: 225:. It is widely used for attaching lower-speed peripheral 3158:// If SDA is high, check that nobody else is driving SDA 848: 206:, multi-controller/multi-target (historically-termed as 4531:(using 20 mA drivers), and a device ID mechanism. 4243:
pinout: Vcc (2V to 6V), SDA, SCL, unused/interrupt, GND
1164:. The resemblance to other IC bus modes is limited to: 5338: 3203:// Clear the SCL to low in preparation for next change 746:
Pure IC systems support arbitrary message structures.
1292: 1183:
Some of the vendors provide a so called non-standard
783:(ARP) for dynamic address allocation and management. 190: 184: 5518:
avr-libc: Example using the two-wire interface (TWI)
4623: 2406:
AV processors and decoders, audio power amplifiers,
635:
The aforementioned reference design is a bus with a
750:is restricted to nine of those structures, such as 338:to control a network of device chips with just two 334:A particular strength of IC is the capability of a 5028:"I2C Interfacing Part 1: Adding Digital I/O Ports" 790: 4548:for new USDA (data) and USCL (clock) lines using 1053:caused to issue that command at any given time.) 6566: 5613: 5361:. Document ID: ab71498b6b1a60ff817b29d56997a418. 5084:"Multiple I2C buses · Testato/SoftwareWire Wiki" 4311:, with incompatible addressing; or by a PCF8563 3329:// Set SCL low in preparation for next operation 370:MCP23008 8-bit IC I/O expander in DIP-18 package 6150:Coherent Accelerator Processor Interface (CAPI) 4778:"7-bit, 8-bit, and 10-bit I2C Slave Addressing" 3917:supports IC for several hardware architectures. 3911:supports IC for several hardware architectures. 1556:Setting up for a (Sr) signal after an ACK/NACK 4979: 4949:Ferrari, Mario; Ferrari, Giulio (2018-04-29). 4948: 4123:high-level protocol data and show ASCII data. 1061:While IC only arbitrates between controllers, 233:in short-distance, intra-board communication. 5813: 5580:"The improved inter-integrated circuit (I3C)" 5301: 5162:"System Management Bus (SMBus) Specification" 2239:Non-reserved addresses in 7-bit address space 1267: 974: 307:, controlling actuators, accessing low-speed 5646: 5635: 5264:TWI Master Bit Band Driver; Atmel; July 2012 4980:Gasperi, Michael; Hurbain, Philippe (2010), 4844:Using The ZONE_READ And ZONE_WRITE Protocols 2663:// Do not drive SDA (set pin high-impedance) 2627:// Do not drive SCL (set pin high-impedance) 2515:data bits (including acknowledges) contains 1097: 383:An example schematic with one controller (a 271:components and systems which involve IC are 3859: 2807:// Repeated start setup time, minimum 4.7us 2609:// Return current level of SDA line, 0 or 1 2591:// Return current level of SCL line, 0 or 1 1197: 5820: 5806: 5690: 5679: 5668: 5657: 5594: 4744: 4742: 4740: 4738: 4736: 4350: 40: 5190: 5188: 2459:information, followed by a read message. 2395:and tuners, modulators and demodulators, 2020:Reserved addresses in 7-bit address space 1036:sometimes continue into the data stages. 5577: 5295: 5047:"Sending I2C reliabily over Cat5 cables" 4952:Building Robots with LEGO Mindstorms NXT 4126: 2339:TV signal processing, audio processing, 1477:Receiver sample bit (controller/target) 1201: 1018: 847: 794: 697:The address and the data bytes are sent 378: 362: 5494: 5469: 5450: 5431: 4907: 4733: 4605:" to "controller/target" to align with 1636: 1503:Held low by receiver (after SCL falls) 1082: 1056: 810:One specific example is the 24C32 type 6567: 5776:Official IC Specification Rev 6 (free) 5554: 5185: 3883:developers can use the "Wire" library. 3299:// You should add timeout to this loop 3149:// You should add timeout to this loop 2801:// You should add timeout to this loop 2535:Example of bit-banging the IC protocol 5801: 5782:Detailed IC Introduction & Primer 5748: 5728: 5332: 4427:History of IC specification releases 4105: 2750:// if started, do a restart condition 2438: 2005: 1994: 1758: 779:; and messages involved in the SMBus 430: 122:1-bit (SDA) with separate clock (SCL) 5751:The I2C Bus: From Theory to Practice 4069: 3877:by Wilhelm Noeker for older systems. 2852:// SCL is high, set SDA from 1 to 0. 1775: 1187:with a speed up to 1.4 Mbit/s. 717: 285:Extended Display Identification Data 5631:from the original on April 2, 2021. 5307:"/sys/dev/i2c/i2c_scan.c#probe_val" 4807:"8-Kbit serial IC bus EEPROM (PDF)" 4213:pinout: SDA, SCL, GND, Vcc (3.3/5V) 4194:pinout: GND, Vcc (3.3/5V), SDA, SCL 4179:pinout: GND, Vcc (3.3/5V), SDA, SCL 4164:pinout: GND, Vcc (3.3/5V), SDA, SCL 2969:// SCL is high, set SDA from 0 to 1 2960:// Stop bit setup time, minimum 4us 1641: 1474:Sender set bit (controller/target) 1304: 630: 13: 5722: 5104:"Sharing I2C bus | Microchip" 4982:"Chapter 13: IC Bus Communication" 4729:from the original on May 26, 2021. 4416:MIPI I3C sensor interface standard 4113: 2525: 2480:Data transfer is initiated with a 2470: 2431:display dependent devices such as 2143:Reserved for different bus format 1293:Sharing SCL between multiple buses 29:InterChip USB (IC-USB, HSIC, SSIC) 14: 6586: 5769: 5065:"I2C Bus Connectors & Cables" 4759:. October 1, 2021. Archived from 4335:standard used with DRAM sticks). 4307:may be used by a 24LC02 or 24C32 4149:pinout: GND, Vcc (3.3V), SDA, SCL 3155:// SCL is high, now data is valid 2466: 2211:10-bit target (slave) addressing 907:When used on SCL, this is called 843: 680:asynchronous serial communication 448:. There is also a 10 kbit/s 6551: 6550: 5590:from the original on 2018-02-03. 5507:from the original on 2016-08-17. 5311:Super User's BSD Cross Reference 4857:from the original on 2017-09-22. 4626: 4485: 4467: 4077: 2681:// Actively drive SDA signal low 2645:// Actively drive SCL signal low 1445:(Byte not received from sender) 1174:style target select signals, and 868:, both SCL and SDA lines are an 5733:. Elektor International Media. 5707:. April 4, 2014. Archived from 5571: 5530: 5511: 5488: 5420: 5409: 5398: 5387: 5376: 5365: 5276: 5257: 5243:from the original on 2016-03-27 5223: 5212:from the original on 2016-09-09 5174:from the original on 2016-01-29 5154: 5145: 5110: 5096: 5076: 5058: 5040: 5020: 5001: 4973: 4942: 4922: 4823:from the original on 2019-10-18 4788:from the original on 2013-06-01 4224:pinout: SCL, SDA, Vcc (5V), GND 3905:uses the i2c and hi2c commands. 3095:// SDA change propagation delay 791:Messaging example: 24C32 EEPROM 775:address (0x00) or to the SMBus 344:Serial Peripheral Interface Bus 331:, and changing speaker volume. 130:0.1, 0.4, 1.0, 3.4 or 5.0  5787:IC Pullup Resistor Calculation 5578:Thornton, Scott (2017-11-29). 5394:https://www.sparkfun.com/qwiic 5205:. 2004-10-29. pp. 15–16. 4908:Vasquez, Joshua (2017-08-16), 4901: 4875: 4861: 4835: 4799: 4770: 4709: 4693:"Financial Press Releases-NXP" 4685: 4289: 4172:: by Adafruit, utilizes 4-pin 1500:Capture bit (after SCL rises) 860:are optional series resistors. 395:, and a microcontroller), and 1: 6145:Intel Ultra Path Interconnect 5567:. Microchip Technology. 2018. 5118:"IC Address Allocation Table" 4678: 3938:3.9 (released 1 May 2006 1443:Receiver reply with NACK bit 1431:Sending one data bit (1) (0) 1242:Lego Mindstorms NXT connector 758:, involving a single target. 236:Several competitors, such as 6123:Intel QuickPath Interconnect 6113:Direct Media Interface (DMI) 5698:"IC-bus specification Rev 6" 5495:Delvare, Jean (2005-08-16). 5372:Introduction to HID over I2C 5127:. 1999-08-24. Archived from 4955:. Syngress. pp. 63–64. 4934:, 2017-08-19, archived from 4931:iPack Stackable Board Format 4890:, 2017-08-16, archived from 4750:"IC-bus specification Rev 7" 4421: 4323:decrease signal rise times. 3314:// SCL is high, read out bit 3245:// Let the target drive data 2954:// add timeout to this loop. 2160:Reserved for future purpose 1548:Line state (repeated start) 1439:(Byte received from sender) 1437:Receiver reply with ACK bit 7: 5438:Linear Technology's LTC4151 4619: 3569:// Read a byte from I2C bus 781:Address Resolution Protocol 281:dual in-line memory modules 194:”), alternatively known as 87:; 42 years ago 10: 6591: 6108:Compute Express Link (CXL) 5326:static u_int8_t probe_val; 3873:3.x or the shared library 3215:// Read a bit from I2C bus 1835:Rest of the read or write 1686:Rest of the read or write 1497:Set bit (after SCL falls) 1359:Bus claiming (controller) 1356:Free to claim arbitration 1268:Buffering and multiplexing 975:Clock stretching using SCL 387:), three target nodes (an 18: 6544: 6503: 6482: 6431: 6345:IEEE-1284 (parallel port) 6267: 6260:logical device interface) 6163: 5915: 5849: 5749:Paret, Dominique (1997). 4673:VESA Display Data Channel 3032:// Write a bit to I2C bus 2056: 2051: 2048: 2041: 2007: 2000: 1997: 1991: 1955: 1841: 1832: 1829: 1826: 1823: 1820: 1817: 1800: 1791: 1788: 1760: 1755: 1752: 1692: 1683: 1680: 1677: 1674: 1654: 1615:Falling edge (controller) 1605:Falling edge (controller) 1584:Same as start (S) signal 1573: 1555: 1535:Falling edge (controller) 1525:Falling edge (controller) 1515:Falling edge (controller) 1505: 1502: 1442: 1436: 1430: 1427: 1380:Falling edge (controller) 1365:Bus freeing (controller) 1362:Bus claimed (controller) 1098:Differences between modes 374: 165: 157: 152: 141: 138: 129: 126: 121: 118: 107: 104: 99: 84: 81: 69: 66: 61: 51: 48: 39: 4355:IC is the basis for the 4142:in 2017, utilizes 4-pin 3860:Operating system support 2552: 2447:consists of one or more 2268:TV video line decoders, 2177:HS-mode controller code 1664:IC message sequences... 1623:Rising edge (controller) 1574:Avoiding stop (P) state 1540:Rising edge (controller) 1530:Rising edge (controller) 1520:Rising edge (controller) 1489:Sender sees SDA is high 1486:Sender transmitter hi-Z 1480:Sender transmitter hi-Z 1390:Rising edge (controller) 1198:Circuit interconnections 1006:To ensure a minimal bus 856:are pull-up resistors, R 444:and the 400 kbit/s 287:(EDID) for monitors via 229:(ICs) to processors and 180:Inter-Integrated Circuit 19:Not to be confused with 16:Serial communication bus 5729:Himpe, Vincent (2011). 4351:Derivative technologies 2539:Below is an example of 1847:Bit position in byte X 1698:Bit position in byte X 1483:Sender sees SDA is low 1246:Ethernet physical layer 1210:board with IC interface 5907:List of bus bandwidths 5351:University of Waterloo 5283:i2c.resource component 5125:Philips Semiconductors 4588:Corrected two graphs. 4497:Added 3.4 Mbit/s 4479:Added 400 kbit/s 4236:utilizes 5-pin 2.54mm 3940:; 18 years ago 2476: 2475:Data transfer sequence 1995:Indicates 10-bit mode 1789:10-bit mode indicator 1211: 861: 807: 787:single-byte commands. 777:Alert Response Address 610:Ultra-fast mode (UFm) 403: 371: 299:connectors, accessing 273:serial presence detect 223:Philips Semiconductors 75:Philips Semiconductors 5602:US Patent 4689740 4662:System Management Bus 4642:List of network buses 4546:Ultra Fast-mode (UFm) 4368:System Management Bus 4366:(DDC) interface, the 4127:Popular cable systems 2474: 1807:IC message sequences 1592:Was held low for ACK 1454:Ready to sample (Bx) 1385:Held low (controller) 1205: 1019:Arbitration using SDA 937:parasitic capacitance 884:) bus design, thus a 851: 798: 762:extends SMBus with a 593:High-speed mode (Hs) 576:High-speed mode (Hs) 559:Fast mode plus (Fm+) 382: 366: 350:System Management Bus 315:, controlling simple 6350:IEEE-1394 (FireWire) 6088:PCI Extended (PCI-X) 5731:Mastering the IC Bus 5627:. October 17, 2001. 5584:Microcontroller Tips 5009:"NXT connector plug" 4657:Power Management Bus 4575:Corrected mistakes. 4544:Added 5 Mbit/s 4529:Fast-mode plus (Fm+) 4527:Added 1 Mbit/s 4499:High-speed mode (Hs) 4406:Microchip Technology 4372:Power Management Bus 4364:Display Data Channel 2558:#define I2CSPEED 100 1801:Lower address field 1637:Addressing structure 1579:Start here from NACK 1559:Repeated start (Sr) 1083:Arbitration in PMBus 1057:Arbitration in SMBus 699:most significant bit 329:Display Data Channel 258:Nordic Semiconductor 221:invented in 1982 by 216:serial communication 53:Serial communication 6191:Parallel ATA (PATA) 5123:(Selection Guide). 4766:on October 6, 2022. 4428: 4094:. Most options are 3977:kernels of OpenBSD. 3296:// Clock stretching 3146:// Clock stretching 2927:// Clock stretching 2798:// Clock stretching 2331:Display controller 2257:Digital receivers, 1953:10-bit address pos 1569:Start here from ACK 1549: 1424: 1314: 802:M24C08-BN6: serial 519:Standard mode (Sm) 494: 340:general-purpose I/O 323:displays, changing 227:integrated circuits 36: 6098:PCI Express (PCIe) 5714:on April 26, 2021. 5705:NXP Semiconductors 5542:tmsearch.uspto.gov 5523:2007-05-27 at the 5481:2017-11-07 at the 5462:2017-07-13 at the 5443:2017-08-09 at the 5288:2011-07-24 at the 5269:2017-03-29 at the 5070:2017-08-18 at the 5052:2017-08-18 at the 5033:2017-08-12 at the 5014:2017-08-20 at the 4814:STMicroelectronics 4757:NXP Semiconductors 4634:Electronics portal 4426: 4219:nodeLynk Interface 4106:Protocol analyzers 3996:i386/amd64 builds. 2477: 2439:Transaction format 1838:message goes here 1727:7-bit address pos 1689:message goes here 1547: 1422: 1312: 1212: 862: 808: 800:STMicroelectronics 492: 404: 372: 250:STMicroelectronics 71:NXP Semiconductors 62:Production history 34: 6562: 6561: 6548: 6275:Apple Desktop Bus 6252:PCI Express (via 6211:Serial ATA (SATA) 5897:Network on a chip 5760:978-0-471-96268-7 5740:978-0-905705-98-9 4697:investors.nxp.com 4617: 4616: 4554:pull-up resistors 4386:High-availability 4146:1.0mm connectors 4070:Development tools 4063:operating systems 4021:Microsoft Windows 2425: 2424: 2215: 2214: 2017: 2016: 1776:10-bit addressing 1773: 1772: 1655:IC address field 1634: 1633: 1545: 1544: 1420: 1419: 1415:Held low (target) 1368:Paused by target 1345:Clock stretching 718:Message protocols 628: 627: 422:used are +5  406:IC uses only two 397:pull-up resistors 246:Texas Instruments 182:; pronounced as “ 173: 172: 134:depending on mode 6582: 6554: 6553: 6546: 6008:HP Precision Bus 5822: 5815: 5808: 5799: 5798: 5764: 5744: 5716: 5715: 5713: 5702: 5694: 5688: 5683: 5677: 5672: 5666: 5661: 5655: 5650: 5644: 5639: 5633: 5632: 5617: 5611: 5610: 5609: 5605: 5598: 5592: 5591: 5575: 5569: 5568: 5566: 5558: 5552: 5551: 5549: 5548: 5534: 5528: 5515: 5509: 5508: 5503:(Mailing list). 5492: 5486: 5473: 5467: 5454: 5448: 5435: 5429: 5424: 5418: 5413: 5407: 5402: 5396: 5391: 5385: 5380: 5374: 5369: 5363: 5362: 5336: 5330: 5329: 5327: 5322: 5321: 5299: 5293: 5292:for AmigaOS 4.x. 5280: 5274: 5261: 5255: 5254: 5249: 5248: 5242: 5235: 5227: 5221: 5220: 5218: 5217: 5211: 5200: 5192: 5183: 5182: 5180: 5179: 5173: 5166: 5158: 5152: 5149: 5143: 5142: 5140: 5139: 5133: 5122: 5114: 5108: 5107: 5100: 5094: 5093: 5080: 5074: 5062: 5056: 5044: 5038: 5024: 5018: 5005: 4999: 4998: 4977: 4971: 4970: 4965:. Archived from 4946: 4940: 4939: 4926: 4920: 4919: 4914:, archived from 4905: 4899: 4898: 4896: 4889: 4879: 4873: 4872: 4871:. StackExchange. 4865: 4859: 4858: 4856: 4849: 4839: 4833: 4832: 4830: 4828: 4822: 4816:. October 2017. 4811: 4803: 4797: 4796: 4794: 4793: 4774: 4768: 4767: 4765: 4754: 4746: 4731: 4730: 4725:. May 26, 2021. 4713: 4707: 4706: 4704: 4703: 4689: 4636: 4631: 4630: 4429: 4425: 4306: 4157:: introduced by 4138:: introduced by 3995: 3976: 3952: 3948: 3946: 3941: 3855: 3852: 3849: 3846: 3843: 3840: 3837: 3834: 3831: 3828: 3825: 3822: 3819: 3816: 3813: 3810: 3807: 3804: 3801: 3798: 3795: 3792: 3789: 3786: 3783: 3780: 3777: 3774: 3771: 3768: 3765: 3762: 3759: 3756: 3753: 3750: 3747: 3744: 3741: 3738: 3735: 3732: 3729: 3726: 3723: 3720: 3717: 3714: 3711: 3708: 3705: 3702: 3699: 3696: 3693: 3690: 3687: 3684: 3681: 3678: 3675: 3672: 3669: 3666: 3663: 3660: 3657: 3654: 3651: 3648: 3645: 3642: 3639: 3636: 3633: 3630: 3627: 3624: 3621: 3618: 3615: 3612: 3609: 3606: 3603: 3600: 3597: 3594: 3591: 3588: 3585: 3582: 3579: 3576: 3573: 3570: 3567: 3564: 3561: 3558: 3555: 3552: 3549: 3546: 3543: 3540: 3537: 3534: 3531: 3528: 3525: 3522: 3519: 3516: 3513: 3510: 3507: 3504: 3501: 3498: 3495: 3492: 3489: 3486: 3483: 3480: 3477: 3474: 3471: 3468: 3465: 3462: 3459: 3456: 3453: 3450: 3447: 3444: 3441: 3438: 3435: 3432: 3429: 3426: 3423: 3420: 3417: 3414: 3411: 3408: 3405: 3402: 3399: 3396: 3393: 3390: 3387: 3384: 3381: 3378: 3375: 3372: 3369: 3366: 3363: 3360: 3357: 3354: 3351: 3348: 3345: 3342: 3339: 3336: 3333: 3330: 3327: 3324: 3321: 3318: 3315: 3312: 3309: 3306: 3303: 3300: 3297: 3294: 3291: 3288: 3285: 3282: 3279: 3276: 3273: 3270: 3267: 3264: 3261: 3258: 3255: 3252: 3249: 3246: 3243: 3240: 3237: 3234: 3231: 3228: 3225: 3222: 3219: 3216: 3213: 3210: 3207: 3204: 3201: 3198: 3195: 3194:arbitration_lost 3192: 3189: 3186: 3183: 3180: 3177: 3174: 3171: 3168: 3165: 3162: 3159: 3156: 3153: 3150: 3147: 3144: 3141: 3138: 3135: 3132: 3129: 3126: 3123: 3120: 3117: 3114: 3111: 3108: 3105: 3102: 3099: 3096: 3093: 3090: 3087: 3084: 3081: 3078: 3075: 3072: 3069: 3066: 3063: 3060: 3057: 3054: 3051: 3048: 3045: 3042: 3039: 3036: 3033: 3030: 3027: 3024: 3021: 3018: 3015: 3012: 3009: 3008:arbitration_lost 3006: 3003: 3000: 2997: 2994: 2991: 2988: 2985: 2982: 2979: 2976: 2973: 2970: 2967: 2964: 2961: 2958: 2955: 2952: 2949: 2946: 2943: 2940: 2937: 2934: 2931: 2928: 2925: 2922: 2919: 2916: 2913: 2910: 2907: 2904: 2901: 2898: 2895: 2892: 2889: 2886: 2883: 2880: 2877: 2874: 2871: 2868: 2865: 2862: 2859: 2856: 2853: 2850: 2847: 2844: 2843:arbitration_lost 2841: 2838: 2835: 2832: 2829: 2826: 2823: 2820: 2817: 2814: 2811: 2808: 2805: 2802: 2799: 2796: 2793: 2790: 2787: 2784: 2781: 2778: 2775: 2772: 2769: 2766: 2763: 2760: 2757: 2754: 2751: 2748: 2745: 2742: 2739: 2736: 2733: 2730: 2727: 2724: 2721: 2718: 2715: 2712: 2709: 2706: 2703: 2700: 2697: 2694: 2691: 2688: 2687:arbitration_lost 2685: 2682: 2679: 2676: 2673: 2670: 2667: 2664: 2661: 2658: 2655: 2652: 2649: 2646: 2643: 2640: 2637: 2634: 2631: 2628: 2625: 2622: 2619: 2616: 2613: 2610: 2607: 2604: 2601: 2598: 2595: 2592: 2589: 2586: 2583: 2580: 2577: 2574: 2571: 2568: 2565: 2562: 2559: 2556: 2521: 2514: 2433:pointing devices 2373:Storage memory, 2290:Video encoders, 2243: 2242: 2231: 2227: 2223: 2039: 2038: 2035: 2030: 1780: 1779: 1646: 1645: 1642:7-bit addressing 1550: 1546: 1425: 1421: 1315: 1311: 1305:Line state table 1230:or other cable. 933:pull-up resistor 929:RC time constant 909:clock stretching 886:pull-up resistor 631:Reference design 495: 491: 456:, 1 Mbit/s 431:reference design 325:computer display 305:real-time clocks 231:microcontrollers 95: 93: 88: 44: 37: 33: 6590: 6589: 6585: 6584: 6583: 6581: 6580: 6579: 6565: 6564: 6563: 6558: 6549: 6540: 6499: 6478: 6427: 6340:IEEE-488 (GPIB) 6263: 6159: 6138:Infinity Fabric 5968:Europe Card Bus 5911: 5845: 5826: 5772: 5761: 5741: 5725: 5723:Further reading 5720: 5719: 5711: 5700: 5696: 5695: 5691: 5684: 5680: 5673: 5669: 5662: 5658: 5651: 5647: 5640: 5636: 5619: 5618: 5614: 5607: 5600: 5599: 5595: 5576: 5572: 5564: 5560: 5559: 5555: 5546: 5544: 5538:"TESS -- Error" 5536: 5535: 5531: 5525:Wayback Machine 5516: 5512: 5493: 5489: 5483:Wayback Machine 5474: 5470: 5464:Wayback Machine 5457:Maxim's MAX7314 5455: 5451: 5445:Wayback Machine 5436: 5432: 5425: 5421: 5414: 5410: 5403: 5399: 5392: 5388: 5381: 5377: 5370: 5366: 5337: 5333: 5325: 5319: 5317: 5300: 5296: 5290:Wayback Machine 5281: 5277: 5271:Wayback Machine 5262: 5258: 5246: 5244: 5240: 5233: 5229: 5228: 5224: 5215: 5213: 5209: 5201:. Version 1.1. 5198: 5194: 5193: 5186: 5177: 5175: 5171: 5164: 5160: 5159: 5155: 5150: 5146: 5137: 5135: 5131: 5120: 5116: 5115: 5111: 5102: 5101: 5097: 5082: 5081: 5077: 5072:Wayback Machine 5063: 5059: 5054:Wayback Machine 5045: 5041: 5035:Wayback Machine 5025: 5021: 5016:Wayback Machine 5006: 5002: 4996: 4978: 4974: 4963: 4947: 4943: 4928: 4927: 4923: 4906: 4902: 4894: 4887: 4881: 4880: 4876: 4867: 4866: 4862: 4854: 4847: 4841: 4840: 4836: 4826: 4824: 4820: 4809: 4805: 4804: 4800: 4791: 4789: 4776: 4775: 4771: 4763: 4752: 4748: 4747: 4734: 4715: 4714: 4710: 4701: 4699: 4691: 4690: 4686: 4681: 4632: 4625: 4622: 4610: 4601:Changed terms " 4557: 4424: 4380:interrupt lines 4353: 4304: 4292: 4230:Breakout Garden 4206:utilizes 4-pin 4129: 4120:Logic analyzers 4116: 4114:Logic analyzers 4108: 4080: 4072: 3993: 3974: 3959:general-purpose 3950: 3944: 3942: 3939: 3862: 3857: 3856: 3853: 3850: 3847: 3844: 3841: 3838: 3835: 3832: 3829: 3826: 3823: 3820: 3817: 3814: 3811: 3808: 3805: 3802: 3799: 3796: 3793: 3790: 3787: 3784: 3781: 3778: 3775: 3772: 3769: 3766: 3763: 3760: 3757: 3754: 3751: 3748: 3745: 3742: 3739: 3736: 3733: 3730: 3727: 3724: 3721: 3718: 3715: 3712: 3709: 3706: 3703: 3700: 3697: 3694: 3691: 3688: 3685: 3682: 3679: 3676: 3673: 3670: 3667: 3664: 3661: 3658: 3655: 3652: 3649: 3646: 3643: 3640: 3637: 3634: 3631: 3628: 3625: 3622: 3619: 3616: 3613: 3610: 3607: 3604: 3601: 3598: 3595: 3592: 3589: 3586: 3583: 3580: 3577: 3574: 3571: 3568: 3565: 3562: 3559: 3556: 3553: 3550: 3547: 3544: 3541: 3538: 3535: 3532: 3529: 3526: 3523: 3520: 3517: 3514: 3511: 3508: 3505: 3502: 3499: 3496: 3493: 3490: 3487: 3484: 3481: 3478: 3475: 3472: 3469: 3466: 3463: 3460: 3457: 3454: 3451: 3448: 3445: 3442: 3439: 3436: 3433: 3430: 3427: 3424: 3421: 3418: 3415: 3412: 3409: 3406: 3403: 3400: 3397: 3394: 3391: 3388: 3385: 3382: 3379: 3376: 3373: 3370: 3367: 3364: 3361: 3358: 3355: 3352: 3349: 3346: 3343: 3340: 3337: 3334: 3331: 3328: 3325: 3322: 3319: 3316: 3313: 3310: 3307: 3304: 3301: 3298: 3295: 3292: 3289: 3286: 3283: 3280: 3277: 3274: 3271: 3268: 3265: 3262: 3259: 3256: 3253: 3250: 3247: 3244: 3241: 3238: 3235: 3232: 3229: 3226: 3223: 3220: 3217: 3214: 3211: 3208: 3205: 3202: 3199: 3196: 3193: 3190: 3187: 3184: 3181: 3178: 3175: 3172: 3169: 3166: 3163: 3160: 3157: 3154: 3151: 3148: 3145: 3142: 3139: 3136: 3133: 3130: 3127: 3124: 3121: 3118: 3115: 3112: 3109: 3106: 3103: 3100: 3097: 3094: 3091: 3088: 3085: 3082: 3079: 3076: 3073: 3070: 3067: 3064: 3061: 3058: 3055: 3052: 3049: 3046: 3043: 3040: 3037: 3034: 3031: 3028: 3025: 3022: 3019: 3016: 3013: 3010: 3007: 3004: 3001: 2998: 2995: 2992: 2989: 2986: 2983: 2980: 2977: 2974: 2971: 2968: 2965: 2962: 2959: 2956: 2953: 2950: 2947: 2944: 2941: 2938: 2935: 2932: 2929: 2926: 2923: 2920: 2917: 2914: 2911: 2908: 2906:// set SDA to 0 2905: 2902: 2899: 2896: 2893: 2890: 2887: 2884: 2881: 2878: 2875: 2872: 2869: 2866: 2863: 2860: 2857: 2854: 2851: 2848: 2845: 2842: 2839: 2836: 2833: 2830: 2827: 2824: 2821: 2818: 2815: 2812: 2809: 2806: 2803: 2800: 2797: 2794: 2791: 2788: 2785: 2782: 2779: 2776: 2773: 2770: 2767: 2764: 2761: 2758: 2755: 2753:// set SDA to 1 2752: 2749: 2746: 2743: 2740: 2737: 2734: 2731: 2728: 2725: 2722: 2719: 2716: 2713: 2710: 2707: 2704: 2701: 2698: 2695: 2692: 2689: 2686: 2683: 2680: 2677: 2674: 2671: 2668: 2665: 2662: 2659: 2656: 2653: 2650: 2647: 2644: 2641: 2638: 2635: 2632: 2629: 2626: 2623: 2620: 2617: 2614: 2611: 2608: 2605: 2602: 2599: 2596: 2593: 2590: 2587: 2584: 2581: 2578: 2575: 2572: 2569: 2566: 2563: 2560: 2557: 2554: 2537: 2528: 2526:Software Design 2516: 2512: 2469: 2441: 2375:real-time clock 2241: 2235: 2229: 2225: 2221: 2071: 2066: 2045: 2043: 2033: 2028: 2022: 1778: 1644: 1639: 1630:Passive pullup 1463:Bit setup (Bs) 1457:Bit setup (Bs) 1451:Bit setup (Bs) 1411:Passive pullup 1408:Passive pullup 1405:Passive pullup 1402:Passive pullup 1376:Passive pullup 1307: 1295: 1270: 1200: 1153:Ultra-Fast mode 1135:High speed mode 1100: 1085: 1059: 1021: 993:microcontroller 977: 859: 855: 846: 793: 720: 633: 624:Unidirectional 542:Fast mode (Fm) 507: 502: 472:ultra-fast mode 465:high-speed mode 402: 385:microcontroller 377: 336:microcontroller 185:eye-squared-see 91: 89: 86: 32: 17: 12: 11: 5: 6588: 6578: 6577: 6560: 6559: 6545: 6542: 6541: 6539: 6538: 6533: 6528: 6518: 6513: 6507: 6505: 6501: 6500: 6498: 6497: 6492: 6486: 6484: 6480: 6479: 6477: 6476: 6471: 6466: 6461: 6456: 6451: 6449:Intel HD Audio 6446: 6441: 6439:ADAT Lightpipe 6435: 6433: 6429: 6428: 6426: 6425: 6420: 6415: 6410: 6405: 6400: 6395: 6390: 6385: 6380: 6362: 6357: 6352: 6347: 6342: 6337: 6332: 6327: 6322: 6317: 6312: 6307: 6302: 6297: 6292: 6287: 6282: 6277: 6271: 6269: 6265: 6264: 6262: 6261: 6250: 6245: 6240: 6235: 6230: 6229: 6228: 6223: 6213: 6208: 6203: 6198: 6193: 6188: 6183: 6178: 6173: 6167: 6165: 6161: 6160: 6158: 6157: 6152: 6147: 6142: 6141: 6140: 6133:HyperTransport 6130: 6125: 6120: 6115: 6110: 6105: 6100: 6095: 6090: 6085: 6080: 6075: 6070: 6065: 6060: 6055: 6050: 6045: 6040: 6035: 6030: 6025: 6020: 6015: 6010: 6005: 6000: 5995: 5990: 5985: 5980: 5975: 5970: 5965: 5960: 5955: 5950: 5945: 5940: 5935: 5930: 5925: 5919: 5917: 5913: 5912: 5910: 5909: 5904: 5899: 5894: 5889: 5887:Bus contention 5884: 5879: 5874: 5869: 5864: 5862:Front-side bus 5859: 5853: 5851: 5847: 5846: 5843:computer buses 5825: 5824: 5817: 5810: 5802: 5796: 5795: 5790: 5784: 5779: 5771: 5770:External links 5768: 5767: 5766: 5759: 5746: 5739: 5724: 5721: 5718: 5717: 5689: 5678: 5667: 5656: 5645: 5634: 5612: 5593: 5570: 5553: 5529: 5510: 5487: 5468: 5449: 5430: 5419: 5408: 5397: 5386: 5375: 5364: 5331: 5305:(2015-05-29). 5294: 5275: 5256: 5222: 5184: 5153: 5144: 5109: 5095: 5075: 5057: 5039: 5026:Sivan Toledo. 5019: 5000: 4994: 4972: 4969:on 2018-04-29. 4961: 4941: 4921: 4900: 4874: 4860: 4834: 4798: 4769: 4732: 4708: 4683: 4682: 4680: 4677: 4676: 4675: 4670: 4664: 4659: 4654: 4649: 4644: 4638: 4637: 4621: 4618: 4615: 4614: 4612: 4609:specification. 4599: 4596: 4592: 4591: 4589: 4586: 4583: 4579: 4578: 4576: 4573: 4570: 4566: 4565: 4563: 4560:unidirectional 4552:logic without 4542: 4539: 4535: 4534: 4532: 4525: 4522: 4518: 4517: 4515: 4512: 4509: 4505: 4504: 4502: 4495: 4492: 4488: 4487: 4484: 4481:Fast-mode (Fm) 4477: 4474: 4470: 4469: 4466: 4463: 4460: 4456: 4455: 4453: 4450: 4447: 4443: 4442: 4439: 4436: 4433: 4423: 4420: 4352: 4349: 4291: 4288: 4287: 4286: 4285: 4284: 4269:Pmod Interface 4265: 4246: 4245: 4244: 4238:edge connector 4227: 4226: 4225: 4216: 4215: 4214: 4197: 4196: 4195: 4182: 4181: 4180: 4167: 4166: 4165: 4152: 4151: 4150: 4128: 4125: 4115: 4112: 4107: 4104: 4079: 4076: 4071: 4068: 4067: 4066: 4049: 4042: 4039: 4032: 4017: 4010: 3999: 3998: 3997: 3990:property lists 3978: 3918: 3912: 3906: 3900: 3894: 3884: 3878: 3861: 3858: 3428:i2c_start_cond 3356:i2c_write_byte 2720:i2c_start_cond 2714:// global data 2553: 2536: 2533: 2527: 2524: 2522:clock pulses. 2509: 2508: 2501: 2494: 2491: 2488: 2485: 2468: 2467:Timing diagram 2465: 2453:repeated start 2440: 2437: 2423: 2422: 2415: 2411: 2410: 2404: 2400: 2399: 2390: 2386: 2385: 2384:AV processors 2382: 2378: 2377: 2371: 2367: 2366: 2350:AV switching, 2348: 2344: 2343: 2337: 2333: 2332: 2329: 2325: 2324: 2314: 2310: 2309: 2300: 2296: 2295: 2288: 2284: 2283: 2277: 2273: 2272: 2266: 2262: 2261: 2255: 2251: 2250: 2249:Typical usage 2247: 2240: 2237: 2213: 2212: 2209: 2206: 2203: 2200: 2196: 2195: 2192: 2189: 2186: 2183: 2179: 2178: 2175: 2172: 2169: 2166: 2162: 2161: 2158: 2155: 2152: 2149: 2145: 2144: 2141: 2138: 2135: 2132: 2128: 2127: 2124: 2121: 2118: 2115: 2111: 2110: 2107: 2104: 2101: 2098: 2094: 2093: 2090: 2087: 2084: 2081: 2077: 2076: 2073: 2068: 2062: 2061: 2058: 2057:7-bit address 2054: 2053: 2050: 2047: 2037: 2036: 2031: 2021: 2018: 2015: 2014: 2010: 2009: 2006: 2004: 2001: 1999: 1996: 1993: 1989: 1988: 1985: 1982: 1979: 1976: 1973: 1970: 1967: 1964: 1962: 1959: 1956: 1954: 1950: 1949: 1946: 1943: 1940: 1937: 1934: 1931: 1928: 1925: 1922: 1919: 1916: 1913: 1910: 1907: 1904: 1901: 1897: 1896: 1893: 1890: 1887: 1884: 1881: 1878: 1875: 1872: 1869: 1866: 1863: 1860: 1857: 1854: 1851: 1848: 1844: 1843: 1840: 1831: 1828: 1825: 1822: 1819: 1816: 1812: 1811: 1808: 1805: 1802: 1799: 1796: 1793: 1790: 1787: 1784: 1777: 1774: 1771: 1770: 1766: 1765: 1762: 1759: 1757: 1754: 1750: 1749: 1746: 1743: 1740: 1737: 1734: 1731: 1728: 1724: 1723: 1720: 1717: 1714: 1711: 1708: 1705: 1702: 1699: 1695: 1694: 1691: 1682: 1679: 1676: 1673: 1669: 1668: 1665: 1662: 1659: 1656: 1653: 1650: 1643: 1640: 1638: 1635: 1632: 1631: 1628: 1625: 1620: 1617: 1612: 1608: 1607: 1602: 1599: 1596: 1593: 1590: 1586: 1585: 1582: 1575: 1572: 1565: 1561: 1560: 1557: 1554: 1543: 1542: 1537: 1532: 1527: 1522: 1517: 1512: 1508: 1507: 1504: 1501: 1498: 1495: 1491: 1490: 1487: 1484: 1481: 1478: 1475: 1472: 1468: 1467: 1464: 1461: 1458: 1455: 1452: 1448: 1447: 1441: 1435: 1429: 1418: 1417: 1412: 1409: 1406: 1403: 1400: 1396: 1395: 1392: 1387: 1382: 1377: 1374: 1370: 1369: 1366: 1363: 1360: 1357: 1354: 1350: 1349: 1343: 1337: 1331: 1325: 1319: 1306: 1303: 1294: 1291: 1269: 1266: 1264:data over IC. 1258:VGA connectors 1199: 1196: 1181: 1180: 1179: 1178: 1175: 1168: 1150: 1149: 1148: 1144: 1141: 1132: 1121:Fast mode plus 1118: 1099: 1096: 1084: 1081: 1080: 1079: 1075: 1071: 1058: 1055: 1020: 1017: 976: 973: 972: 971: 968: 965: 955: 954: 951: 894:current source 890:high impedance 878:open-collector 866:physical layer 857: 853: 845: 844:Physical layer 842: 792: 789: 738:repeated START 734: 733: 730: 727: 719: 716: 668: 667: 664: 661: 658: 648: 647: 644: 632: 629: 626: 625: 622: 617: 614: 611: 607: 606: 605:Bidirectional 603: 600: 597: 594: 590: 589: 588:Bidirectional 586: 583: 580: 577: 573: 572: 571:Bidirectional 569: 566: 563: 560: 556: 555: 554:Bidirectional 552: 549: 546: 543: 539: 538: 537:Bidirectional 535: 529: 523: 520: 516: 515: 512: 509: 504: 499: 458:fast mode plus 450:low-speed mode 400: 376: 373: 171: 170: 167: 163: 162: 159: 155: 154: 150: 149: 140: 136: 135: 128: 124: 123: 120: 116: 115: 109:Open-collector 106: 102: 101: 97: 96: 83: 79: 78: 68: 64: 63: 59: 58: 50: 46: 45: 15: 9: 6: 4: 3: 2: 6587: 6576: 6573: 6572: 6570: 6557: 6543: 6537: 6534: 6532: 6529: 6526: 6522: 6519: 6517: 6514: 6512: 6511:Multidrop bus 6509: 6508: 6506: 6502: 6496: 6493: 6491: 6488: 6487: 6485: 6481: 6475: 6472: 6470: 6467: 6465: 6462: 6460: 6457: 6455: 6452: 6450: 6447: 6445: 6442: 6440: 6437: 6436: 6434: 6430: 6424: 6421: 6419: 6418:External PCIe 6416: 6414: 6411: 6409: 6406: 6404: 6401: 6399: 6398:Parallel SCSI 6396: 6394: 6391: 6389: 6386: 6384: 6381: 6378: 6374: 6370: 6366: 6363: 6361: 6358: 6356: 6353: 6351: 6348: 6346: 6343: 6341: 6338: 6336: 6333: 6331: 6328: 6326: 6323: 6321: 6318: 6316: 6313: 6311: 6308: 6306: 6303: 6301: 6298: 6296: 6293: 6291: 6290:Commodore bus 6288: 6286: 6283: 6281: 6278: 6276: 6273: 6272: 6270: 6266: 6259: 6255: 6251: 6249: 6246: 6244: 6241: 6239: 6238:Fibre Channel 6236: 6234: 6231: 6227: 6224: 6222: 6219: 6218: 6217: 6214: 6212: 6209: 6207: 6204: 6202: 6199: 6197: 6194: 6192: 6189: 6187: 6184: 6182: 6179: 6177: 6174: 6172: 6169: 6168: 6166: 6162: 6156: 6153: 6151: 6148: 6146: 6143: 6139: 6136: 6135: 6134: 6131: 6129: 6126: 6124: 6121: 6119: 6116: 6114: 6111: 6109: 6106: 6104: 6101: 6099: 6096: 6094: 6091: 6089: 6086: 6084: 6081: 6079: 6076: 6074: 6071: 6069: 6066: 6064: 6061: 6059: 6056: 6054: 6051: 6049: 6046: 6044: 6041: 6039: 6036: 6034: 6031: 6029: 6026: 6024: 6021: 6019: 6016: 6014: 6011: 6009: 6006: 6004: 6001: 5999: 5996: 5994: 5991: 5989: 5986: 5984: 5981: 5979: 5976: 5974: 5971: 5969: 5966: 5964: 5961: 5959: 5956: 5954: 5951: 5949: 5946: 5944: 5941: 5939: 5936: 5934: 5931: 5929: 5926: 5924: 5921: 5920: 5918: 5914: 5908: 5905: 5903: 5902:Plug and play 5900: 5898: 5895: 5893: 5892:Bus mastering 5890: 5888: 5885: 5883: 5880: 5878: 5875: 5873: 5870: 5868: 5867:Back-side bus 5865: 5863: 5860: 5858: 5855: 5854: 5852: 5848: 5844: 5841: 5837: 5835: 5830: 5823: 5818: 5816: 5811: 5809: 5804: 5803: 5800: 5794: 5791: 5788: 5785: 5783: 5780: 5777: 5774: 5773: 5762: 5756: 5752: 5747: 5742: 5736: 5732: 5727: 5726: 5710: 5706: 5699: 5693: 5687: 5682: 5676: 5671: 5665: 5660: 5654: 5649: 5643: 5638: 5630: 5626: 5622: 5616: 5603: 5597: 5589: 5585: 5581: 5574: 5563: 5557: 5543: 5539: 5533: 5526: 5522: 5519: 5514: 5506: 5502: 5498: 5491: 5484: 5480: 5477: 5472: 5465: 5461: 5458: 5453: 5446: 5442: 5439: 5434: 5428: 5423: 5417: 5412: 5406: 5401: 5395: 5390: 5384: 5379: 5373: 5368: 5360: 5356: 5352: 5348: 5344: 5343: 5335: 5328: 5316: 5312: 5308: 5304: 5303:Theo de Raadt 5298: 5291: 5287: 5284: 5279: 5272: 5268: 5265: 5260: 5253: 5239: 5232: 5226: 5208: 5204: 5197: 5191: 5189: 5170: 5163: 5157: 5148: 5134:on 2017-10-16 5130: 5126: 5119: 5113: 5105: 5099: 5091: 5090: 5085: 5079: 5073: 5069: 5066: 5061: 5055: 5051: 5048: 5043: 5036: 5032: 5029: 5023: 5017: 5013: 5010: 5004: 4997: 4995:9781430224549 4991: 4987: 4983: 4976: 4968: 4964: 4962:9780080554334 4958: 4954: 4953: 4945: 4938:on 2017-08-19 4937: 4933: 4932: 4925: 4918:on 2017-08-16 4917: 4913: 4912: 4904: 4897:on 2017-08-16 4893: 4886: 4885: 4878: 4870: 4864: 4853: 4846: 4845: 4838: 4819: 4815: 4808: 4802: 4787: 4783: 4779: 4773: 4762: 4758: 4751: 4745: 4743: 4741: 4739: 4737: 4728: 4724: 4723: 4718: 4712: 4698: 4694: 4688: 4684: 4674: 4671: 4668: 4665: 4663: 4660: 4658: 4655: 4653: 4650: 4648: 4645: 4643: 4640: 4639: 4635: 4629: 4624: 4613: 4608: 4604: 4600: 4597: 4594: 4593: 4590: 4587: 4584: 4581: 4580: 4577: 4574: 4571: 4568: 4567: 4564: 4561: 4555: 4551: 4547: 4543: 4540: 4537: 4536: 4533: 4530: 4526: 4523: 4520: 4519: 4516: 4513: 4510: 4507: 4506: 4503: 4500: 4496: 4493: 4490: 4489: 4482: 4478: 4475: 4472: 4471: 4464: 4461: 4458: 4457: 4454: 4451: 4448: 4445: 4444: 4440: 4437: 4434: 4431: 4430: 4419: 4417: 4413: 4409: 4407: 4402: 4397: 4395: 4391: 4387: 4383: 4381: 4377: 4373: 4369: 4365: 4362: 4358: 4348: 4346: 4342: 4336: 4334: 4328: 4324: 4320: 4316: 4314: 4310: 4300: 4296: 4282: 4281: 4279: 4275: 4271: 4270: 4266: 4264: 4260: 4256: 4252: 4251: 4247: 4242: 4241: 4239: 4235: 4231: 4228: 4223: 4222: 4220: 4217: 4212: 4211: 4209: 4205: 4201: 4198: 4193: 4192: 4190: 4186: 4183: 4178: 4177: 4175: 4171: 4168: 4163: 4162: 4160: 4156: 4153: 4148: 4147: 4145: 4141: 4137: 4134: 4133: 4132: 4124: 4121: 4111: 4103: 4101: 4097: 4093: 4089: 4085: 4078:Host adapters 4075: 4064: 4061: 4058: 4054: 4053:Sinclair QDOS 4050: 4047: 4043: 4040: 4037: 4033: 4030: 4026: 4022: 4018: 4015: 4011: 4008: 4004: 4000: 3991: 3988:framework as 3987: 3983: 3979: 3972: 3968: 3963: 3962:off-the-shelf 3960: 3956: 3949:), a central 3937: 3933: 3932: 3930: 3926: 3922: 3919: 3916: 3913: 3910: 3907: 3904: 3901: 3898: 3895: 3892: 3888: 3887:CircuitPython 3885: 3882: 3879: 3876: 3872: 3868: 3864: 3863: 3737:i2c_stop_cond 3710:i2c_write_bit 3578:i2c_read_byte 3548:i2c_stop_cond 3479:i2c_write_bit 3038:i2c_write_bit 2891:i2c_stop_cond 2551: 2549: 2546: 2542: 2532: 2523: 2519: 2506: 2502: 2499: 2495: 2492: 2489: 2486: 2483: 2479: 2478: 2473: 2464: 2460: 2456: 2454: 2450: 2446: 2436: 2434: 2430: 2420: 2416: 2413: 2412: 2409: 2405: 2402: 2401: 2398: 2394: 2391: 2388: 2387: 2383: 2380: 2379: 2376: 2372: 2369: 2368: 2365: 2361: 2357: 2353: 2349: 2346: 2345: 2342: 2338: 2335: 2334: 2330: 2327: 2326: 2323: 2319: 2315: 2312: 2311: 2308: 2304: 2301: 2298: 2297: 2293: 2289: 2286: 2285: 2282: 2278: 2275: 2274: 2271: 2267: 2264: 2263: 2260: 2256: 2253: 2252: 2248: 2245: 2244: 2236: 2233: 2218: 2210: 2207: 2204: 2201: 2198: 2197: 2193: 2190: 2187: 2184: 2181: 2180: 2176: 2173: 2170: 2167: 2164: 2163: 2159: 2156: 2153: 2150: 2147: 2146: 2142: 2139: 2136: 2133: 2130: 2129: 2126:CBUS address 2125: 2122: 2119: 2116: 2113: 2112: 2108: 2105: 2102: 2099: 2096: 2095: 2092:General call 2091: 2088: 2085: 2082: 2079: 2078: 2074: 2069: 2064: 2063: 2059: 2055: 2040: 2032: 2027: 2026: 2025: 2012: 2011: 2002: 1990: 1986: 1983: 1980: 1977: 1974: 1971: 1968: 1965: 1963: 1960: 1957: 1952: 1951: 1947: 1944: 1941: 1938: 1935: 1932: 1929: 1926: 1923: 1920: 1917: 1914: 1911: 1908: 1905: 1902: 1899: 1898: 1894: 1891: 1888: 1885: 1882: 1879: 1876: 1873: 1870: 1867: 1864: 1861: 1858: 1855: 1852: 1849: 1846: 1845: 1839: 1836: 1814: 1813: 1809: 1806: 1803: 1797: 1794: 1785: 1782: 1781: 1768: 1767: 1763: 1751: 1747: 1744: 1741: 1738: 1735: 1732: 1729: 1726: 1725: 1721: 1718: 1715: 1712: 1709: 1706: 1703: 1700: 1697: 1696: 1690: 1687: 1684:Byte X, etc. 1671: 1670: 1666: 1663: 1660: 1657: 1651: 1648: 1647: 1629: 1627:Passive high 1626: 1624: 1621: 1618: 1616: 1613: 1610: 1609: 1606: 1603: 1601:Passive high 1600: 1598:Passive high 1597: 1594: 1591: 1588: 1587: 1583: 1581: 1580: 1576: 1571: 1570: 1566: 1563: 1562: 1558: 1552: 1551: 1541: 1538: 1536: 1533: 1531: 1528: 1526: 1523: 1521: 1518: 1516: 1513: 1510: 1509: 1499: 1496: 1493: 1492: 1488: 1485: 1482: 1479: 1476: 1473: 1470: 1469: 1465: 1462: 1459: 1456: 1453: 1450: 1449: 1446: 1440: 1434: 1426: 1416: 1413: 1410: 1407: 1404: 1401: 1398: 1397: 1393: 1391: 1388: 1386: 1383: 1381: 1378: 1375: 1372: 1371: 1367: 1364: 1361: 1358: 1355: 1352: 1351: 1348: 1344: 1342: 1338: 1336: 1332: 1330: 1326: 1324: 1321:Inactive bus 1320: 1317: 1316: 1310: 1302: 1299: 1290: 1286: 1282: 1279: 1275: 1265: 1263: 1259: 1255: 1251: 1247: 1243: 1240: 1236: 1231: 1229: 1223: 1221: 1217: 1209: 1204: 1195: 1193: 1192:underclocking 1188: 1186: 1176: 1173: 1169: 1166: 1165: 1163: 1159: 1154: 1151: 1145: 1142: 1139: 1138: 1136: 1133: 1130: 1126: 1122: 1119: 1116: 1112: 1109: 1108: 1107: 1105: 1104:standard mode 1095: 1092: 1089: 1076: 1072: 1068: 1067: 1066: 1064: 1054: 1051: 1045: 1041: 1037: 1033: 1029: 1027: 1016: 1013: 1009: 1004: 1002: 996: 994: 988: 985: 983: 969: 966: 963: 962: 961: 958: 952: 949: 948: 947: 943: 940: 938: 934: 930: 924: 920: 916: 914: 910: 905: 902: 897: 895: 891: 887: 883: 879: 875: 871: 867: 850: 841: 839: 835: 830: 828: 823: 821: 817: 813: 805: 801: 797: 788: 784: 782: 778: 774: 768: 765: 761: 757: 753: 749: 744: 741: 739: 731: 728: 725: 724: 723: 715: 711: 707: 703: 700: 695: 692: 687: 683: 681: 677: 673: 665: 662: 659: 656: 655: 654: 651: 645: 642: 641: 640: 638: 623: 621: 618: 615: 612: 609: 608: 604: 601: 598: 595: 592: 591: 587: 584: 581: 578: 575: 574: 570: 567: 564: 561: 558: 557: 553: 550: 547: 544: 541: 540: 536: 533: 530: 528: 524: 521: 518: 517: 513: 510: 505: 500: 497: 496: 490: 488: 484: 479: 475: 473: 470: 467:, and 5  466: 463: 459: 455: 451: 447: 443: 442:standard mode 440: 436: 435:address space 432: 427: 425: 421: 417: 413: 409: 398: 394: 390: 386: 381: 369: 365: 361: 359: 355: 351: 347: 345: 341: 337: 332: 330: 326: 322: 318: 314: 310: 306: 302: 298: 294: 290: 286: 282: 278: 274: 270: 265: 263: 259: 255: 251: 247: 243: 239: 234: 232: 228: 224: 220: 217: 213: 209: 205: 201: 197: 193: 192: 187: 186: 181: 177: 168: 164: 160: 156: 151: 148: 144: 137: 133: 125: 117: 114: 110: 103: 98: 80: 76: 72: 65: 60: 57: 54: 47: 43: 38: 30: 26: 22: 6575:Serial buses 6364: 6043:TURBOchannel 5833: 5750: 5730: 5709:the original 5692: 5681: 5670: 5659: 5648: 5637: 5615: 5596: 5583: 5573: 5556: 5545:. Retrieved 5541: 5532: 5513: 5501:linux-kernel 5500: 5490: 5476:TI's UCD9224 5471: 5452: 5433: 5422: 5411: 5400: 5389: 5378: 5367: 5341: 5334: 5324: 5318:. Retrieved 5310: 5297: 5278: 5259: 5251: 5245:. Retrieved 5225: 5214:. Retrieved 5176:. Retrieved 5156: 5147: 5136:. Retrieved 5129:the original 5112: 5098: 5087: 5078: 5060: 5042: 5022: 5003: 4985: 4975: 4967:the original 4951: 4944: 4936:the original 4930: 4924: 4916:the original 4910: 4903: 4892:the original 4883: 4877: 4863: 4843: 4837: 4825:. Retrieved 4813: 4801: 4790:. Retrieved 4781: 4772: 4761:the original 4720: 4711: 4700:. Retrieved 4696: 4687: 4603:master/slave 4545: 4528: 4498: 4480: 4414: 4410: 4398: 4384: 4354: 4337: 4329: 4325: 4321: 4317: 4301: 4297: 4293: 4267: 4248: 4229: 4218: 4199: 4189:Seeed Studio 4184: 4169: 4154: 4135: 4130: 4117: 4109: 4081: 4073: 3874: 3701:i2c_read_bit 3527:i2c_read_bit 3221:i2c_read_bit 2538: 2529: 2517: 2510: 2504: 2497: 2481: 2461: 2457: 2452: 2448: 2444: 2442: 2426: 2419:colour space 2234: 2219: 2216: 2052:Description 2023: 1837: 1834: 1833:Byte X etc. 1688: 1685: 1622: 1614: 1604: 1595:Rising edge 1578: 1577: 1568: 1567: 1539: 1534: 1529: 1524: 1519: 1514: 1444: 1438: 1432: 1414: 1389: 1384: 1379: 1346: 1340: 1334: 1328: 1322: 1308: 1300: 1296: 1287: 1283: 1278:multiplexers 1271: 1232: 1224: 1220:Raspberry Pi 1213: 1189: 1184: 1182: 1158:LED displays 1152: 1134: 1128: 1124: 1120: 1114: 1110: 1103: 1101: 1093: 1086: 1060: 1046: 1042: 1038: 1034: 1030: 1022: 1005: 997: 989: 986: 978: 959: 956: 944: 941: 925: 921: 917: 908: 906: 900: 898: 863: 837: 833: 831: 826: 824: 809: 785: 780: 776: 773:general call 772: 769: 763: 756:write word N 755: 751: 745: 742: 737: 735: 721: 712: 708: 704: 696: 688: 684: 669: 652: 649: 634: 602:Open drain* 585:Open drain* 568:Open drain* 551:Open drain* 508:capacitance 485:of 400  480: 476: 471: 464: 457: 453: 449: 445: 441: 433:has a 7-bit 428: 405: 360:connectors. 348: 333: 266: 235: 212:single-ended 208:master/slave 199: 195: 179: 175: 174: 6516:CoreConnect 6495:ExpressCard 6423:Thunderbolt 6413:Camera Link 6196:Bus and Tag 5882:Address bus 5877:Control bus 5872:Daisy chain 5765:(314 pages) 5745:(248 pages) 5353:: UWSpace. 4827:19 November 4782:Total Phase 4390:AdvancedTCA 4290:Limitations 3891:MicroPython 3875:i2c.library 2541:bit-banging 2445:transaction 2421:converters 2246:MSB (4-bit) 2109:Start byte 2049:8-bit byte 1792:Upper addr 1423:Line state 1394:Don't care 1313:Line state 1078:recognized. 913:arbitration 818:(or 4  806:with IC bus 752:read word N 596:3.4 Mbit/s 579:1.7 Mbit/s 545:400 kbit/s 522:100 kbit/s 483:capacitance 460:, 3.4  358:PCI Express 204:synchronous 191:eye-two-see 147:half-duplex 105:Data signal 6369:ACCESS.bus 6268:Peripheral 6068:InfiniBand 6063:HP GSC bus 5857:System bus 5547:2018-04-29 5359:10012/5234 5320:2019-03-04 5247:2017-12-01 5216:2017-12-01 5178:2017-12-01 5138:2017-10-01 4792:2018-04-29 4717:"MCP23008" 4702:2018-04-29 4679:References 4647:ACCESS.bus 4357:ACCESS.bus 4036:Windows CE 3971:hw.sensors 3967:hw.sensors 3945:2006-05-01 3915:ChibiOS/RT 3419:send_start 3365:send_start 3170:&& 2303:ACCESS.bus 2294:expanders 2194:Device ID 2060:R/W value 2013:0 = Write 1900:Bit value 1769:0 = Write 1466:NACK (A') 1185:Turbo mode 1050:idempotent 1008:throughput 982:open-drain 870:open-drain 672:start bits 532:Open drain 514:Direction 418:. Typical 113:open-drain 6330:Lightning 6280:Atari SIO 6155:SpaceWire 5988:Zorro III 5928:S-100 bus 5923:SS-50 bus 5916:Standards 5836:standards 5829:Technical 5753:. Wiley. 5349:thesis). 4722:Microchip 4669:Connector 4550:push-pull 4462:Original 4422:Revisions 4388:systems ( 4370:(SMBus), 4155:STEMMA QT 4027:embedded/ 3761:I2C_delay 3728:send_stop 3596:send_stop 3539:send_stop 3509:<<= 3374:send_stop 3332:clear_SCL 3308:I2C_delay 3257:I2C_delay 3206:clear_SCL 3116:I2C_delay 3098:I2C_delay 3086:clear_SDA 2978:I2C_delay 2963:I2C_delay 2915:I2C_delay 2909:clear_SDA 2867:clear_SCL 2861:I2C_delay 2855:clear_SDA 2810:I2C_delay 2762:I2C_delay 2669:clear_SDA 2633:clear_SCL 2564:I2C_delay 2455:symbols. 2003:1 = Read 1764:1 = Read 1619:Held low 1252:and most 1206:A 16-bit 1129:fast mode 1115:Fast mode 1111:Fast mode 852:IC bus: R 676:stop bits 620:Push–pull 613:5 Mbit/s 562:1 Mbit/s 493:IC modes 454:fast mode 446:fast mode 416:resistors 412:pulled up 368:Microchip 283:(DIMMs), 169:Clock Pin 6569:Category 6556:Category 6531:Wishbone 6504:Embedded 6483:Portable 6403:Profibus 6335:DMX512-A 6221:Parallel 6073:Ethernet 5983:Zorro II 5933:Multibus 5834:de facto 5629:Archived 5625:EE Times 5588:Archived 5521:Archived 5505:Archived 5479:Archived 5460:Archived 5441:Archived 5286:Archived 5267:Archived 5238:Archived 5207:Archived 5169:Archived 5068:Archived 5050:Archived 5031:Archived 5012:Archived 4852:Archived 4818:Archived 4786:Archived 4727:Archived 4620:See also 4435:Version 4394:MicroTCA 4274:Digilent 4234:Pimoroni 4159:Adafruit 4140:Sparkfun 4014:Mac OS X 3951:i2c_scan 3897:Maximite 3821:I2CSPEED 3776:volatile 3689:<< 3623:unsigned 3605:unsigned 3572:unsigned 3395:unsigned 3380:unsigned 3323:read_SDA 3278:read_SCL 3176:read_SDA 3128:read_SCL 2990:read_SDA 2936:read_SCL 2825:read_SDA 2780:read_SCL 2597:read_SDA 2579:read_SCL 2449:messages 2230:1100 001 2226:0001 100 2222:0001 000 2072:(3-bit) 2067:(4-bit) 2042:Reserved 2034:1111 XXX 2029:0000 XXX 1460:ACK (A) 1147:ability. 1125:standard 1048:must be 1026:Ethernet 935:and the 678:used in 420:voltages 262:Intersil 254:Motorola 161:Data Pin 139:Protocol 82:Designed 67:Designer 6536:SLIMbus 6490:PC Card 6474:TOSLINK 6164:Storage 6118:RapidIO 5998:FASTBUS 5953:STD Bus 5850:General 5315:OpenBSD 5007:Philo. 4607:I3C bus 4449:Patent 4280:boards 4204:DFRobot 4200:Gravity 4092:Windows 4057:Minerva 4046:RISC OS 3994:GENERIC 3975:GENERIC 3943: ( 3936:OpenBSD 3929:OpenBSD 3921:FreeBSD 3881:Arduino 3871:MorphOS 3867:AmigaOS 3266:set_SCL 3248:set_SDA 3107:set_SCL 3071:set_SDA 3017:started 2972:set_SDA 2921:set_SCL 2873:started 2768:set_SCL 2756:set_SDA 2741:started 2702:started 2651:set_SDA 2615:set_SCL 2044:address 1827:Byte 2 1821:Byte 1 1783:Field: 1678:Byte 1 1649:Field: 1274:buffers 1216:Arduino 1172:SPI bus 931:of the 864:At the 599:100 pF 582:400 pF 565:550 pF 548:400 pF 506:Maximum 501:Maximum 429:The IC 408:signals 277:EEPROMs 238:Siemens 202:, is a 127:Bitrate 90: ( 6469:S/PDIF 6360:1-Wire 6325:RS-485 6320:RS-423 6315:RS-422 6310:RS-232 6171:ST-506 6128:NVLink 5978:STEbus 5938:Unibus 5757:  5737:  5608:  5089:GitHub 5037:. 2006 4992:  4959:  4438:Notes 4359:, the 4309:EEPROM 4255:Olimex 4208:JST PH 4174:JST PH 4170:STEMMA 4144:JST SH 3986:envsys 3982:NetBSD 3955:ad hoc 3934:Since 3925:NetBSD 3903:PICAXE 3746:return 3557:return 3338:return 2545:pseudo 2443:An IC 2281:codecs 2075:1-bit 2046:index 1818:Start 1675:Start 1327:Start 1260:carry 1162:glitch 874:MOSFET 812:EEPROM 804:EEPROM 511:Drive 503:speed 469:Mbit/s 462:Mbit/s 439:kbit/s 375:Design 275:(SPD) 188:” or “ 153:Pinout 143:Serial 132:Mbit/s 73:(then 35:IC bus 6464:McASP 6432:Audio 6377:SMBus 6373:PMBus 6355:UNI/O 6295:HP-IL 6248:SATAe 6233:ESCON 6206:HIPPI 6038:NuBus 5993:CAMAC 5963:Q-Bus 5958:SMBus 5943:VAXBI 5840:wired 5778:- NXP 5712:(PDF) 5701:(PDF) 5565:(PDF) 5347:MMath 5241:(PDF) 5234:(PDF) 5210:(PDF) 5199:(PDF) 5172:(PDF) 5165:(PDF) 5132:(PDF) 5121:(PDF) 4895:(PDF) 4888:(PDF) 4855:(PDF) 4848:(PDF) 4821:(PDF) 4810:(PDF) 4764:(PDF) 4753:(PDF) 4595:2021 4582:2014 4569:2012 4562:bus. 4538:2012 4521:2007 4508:2000 4491:1998 4473:1992 4459:1982 4446:1981 4441:Refs 4432:Year 4401:Atmel 4272:: by 4253:: by 4232:: by 4202:: by 4187:: by 4185:Grove 4136:Qwiic 4084:Linux 4007:SMBus 4003:Linux 3488:& 3272:while 3122:while 3023:false 2930:while 2774:while 2708:false 2482:start 2408:SMBus 2397:SMBus 2364:SMBus 2341:SMBus 2322:PMBus 2316:VESA 2307:PMBus 2259:SMBus 2202:1111 2185:1111 2168:0000 2151:0000 2134:0000 2117:0000 2100:0000 2083:0000 1992:Note 1842:Stop 1815:Type 1795:R/W' 1753:Note 1693:Stop 1672:Type 1658:R/W' 1564:Note 1553:Type 1471:Note 1428:Type 1353:Note 1347:(CS) 1339:Stop 1333:Idle 1318:Type 1088:PMBus 1063:SMBus 1012:SMBus 1001:ASICs 876:) or 834:write 827:write 764:Group 760:PMBus 748:SMBus 637:clock 498:Mode 414:with 301:NVRAM 119:Width 27:; or 6521:AMBA 6459:MADI 6444:AES3 6305:MIDI 6258:NVMe 6254:AHCI 6216:SCSI 6201:DSSI 6176:ESDI 6053:SBus 6013:EISA 5948:MBus 5838:for 5831:and 5789:- TI 5755:ISBN 5735:ISBN 5203:VESA 4990:ISBN 4957:ISBN 4829:2019 4667:UEXT 4511:2.1 4376:IPMI 4361:VESA 4305:0x51 4278:FPGA 4263:UART 4261:and 4250:UEXT 4100:APIs 4055:and 3927:and 3909:eCos 3889:and 3818:< 3767:void 3758:void 3749:byte 3716:nack 3686:byte 3677:byte 3656:< 3626:char 3611:byte 3608:char 3593:bool 3587:nack 3584:bool 3575:char 3560:nack 3521:nack 3506:byte 3491:0x80 3485:byte 3458:< 3407:nack 3404:bool 3386:byte 3383:char 3371:bool 3362:bool 3353:bool 3236:bool 3227:void 3218:bool 3080:else 3044:bool 3035:void 2897:void 2888:void 2879:true 2726:void 2717:void 2699:bool 2693:void 2684:void 2675:void 2666:void 2657:void 2648:void 2639:void 2630:void 2621:void 2612:void 2603:void 2594:bool 2585:void 2576:bool 2570:void 2561:void 2505:stop 2500:bit. 2498:stop 2414:1110 2403:1101 2393:PLLs 2389:1100 2381:1011 2370:1010 2360:IPMB 2356:DACs 2354:and 2352:ADCs 2347:1001 2336:1000 2328:0111 2313:0110 2299:0101 2292:GPIO 2287:0100 2276:0011 2270:IPMB 2265:0010 2254:0001 2205:0XX 2188:1XX 2171:1XX 2154:011 2137:010 2120:001 2103:000 2086:000 2008:LSB 1998:MSB 1830:ACK 1824:ACK 1761:LSB 1756:MSB 1681:ACK 1611:SCL 1589:SDA 1511:SCL 1494:SDA 1399:SCL 1373:SDA 1341:(P) 1335:(i) 1329:(S) 1323:(N) 1262:DDC2 1256:and 1250:HDMI 1239:6P6C 1235:UEXT 1228:CAT5 1218:and 1127:and 838:read 816:kbit 754:and 674:and 525:400 391:, a 356:and 321:OLED 313:ADCs 311:and 309:DACs 297:HDMI 295:and 260:and 100:Data 92:1982 85:1982 49:Type 6525:AXI 6454:I²S 6408:USB 6393:D²B 6388:SPI 6383:I3C 6365:I²C 6300:HIL 6285:DCB 6256:or 6243:SSA 6226:SAS 6186:SMD 6181:IPI 6103:AGP 6093:PXI 6083:PCI 6078:UPA 6058:VLB 6048:MCA 6033:VPX 6028:VXS 6023:VXI 6018:VME 6003:LPC 5973:ISA 5355:hdl 4652:I3C 4345:SPI 4343:or 4341:I3C 4333:SPD 4313:RTC 4259:SPI 4096:USB 4090:or 4088:Mac 4051:In 4044:In 4034:In 4029:SoC 4025:HID 4019:In 4012:In 4001:In 3980:In 3865:In 3797:for 3788:int 3779:int 3740:(); 3704:(); 3668:bit 3653:bit 3641:bit 3635:for 3629:bit 3551:(); 3530:(); 3470:bit 3455:bit 3443:bit 3437:for 3431:(); 3398:bit 3341:bit 3335:(); 3326:(); 3317:bit 3311:(); 3269:(); 3260:(); 3251:(); 3239:bit 3209:(); 3197:(); 3167:bit 3119:(); 3110:(); 3101:(); 3089:(); 3074:(); 3062:bit 3047:bit 3011:(); 2981:(); 2975:(); 2966:(); 2924:(); 2918:(); 2912:(); 2870:(); 2864:(); 2858:(); 2846:(); 2813:(); 2771:(); 2765:(); 2759:(); 2520:+ 1 2429:DDC 2417:AV 2318:DDC 2279:AV 2070:LSB 2065:MSB 1958:10 1276:or 1254:DVI 1208:ADC 901:any 882:BJT 691:ACK 393:DAC 389:ADC 354:PCI 319:or 317:LCD 293:DVI 289:VGA 279:on 242:NEC 219:bus 210:), 200:IIC 198:or 196:I2C 166:SCL 158:SDA 111:or 56:bus 25:I3C 21:I²S 6571:: 6375:, 6371:, 5703:. 5623:. 5586:. 5582:. 5540:. 5499:. 5323:. 5313:. 5309:. 5250:. 5187:^ 5086:. 4988:, 4984:, 4812:. 4784:. 4780:. 4755:. 4735:^ 4719:. 4695:. 4598:7 4585:6 4572:5 4541:4 4524:3 4494:2 4486:— 4476:1 4468:— 4392:, 4382:. 4347:. 4102:. 4086:, 4060:QL 3923:, 3833:++ 3722:if 3719:); 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3845:v 3842:{ 3839:) 3836:i 3830:; 3827:2 3824:/ 3815:i 3812:; 3809:0 3806:= 3803:i 3800:( 3794:; 3791:i 3785:; 3782:v 3773:{ 3770:) 3764:( 3755:} 3752:; 3743:} 3734:{ 3731:) 3725:( 3713:( 3707:} 3698:| 3695:) 3692:1 3683:( 3680:= 3674:{ 3671:) 3662:; 3659:8 3650:; 3647:0 3644:= 3638:( 3632:; 3620:; 3617:0 3614:= 3602:{ 3599:) 3590:, 3581:( 3566:} 3563:; 3554:} 3545:{ 3542:) 3536:( 3524:= 3518:} 3515:; 3512:1 3500:0 3494:) 3476:{ 3473:) 3464:; 3461:8 3452:; 3449:0 3446:= 3440:( 3434:} 3425:{ 3422:) 3416:( 3410:; 3401:; 3392:{ 3389:) 3377:, 3368:, 3359:( 3347:} 3344:; 3320:= 3302:} 3293:{ 3290:) 3287:0 3275:( 3242:; 3233:{ 3230:) 3224:( 3212:} 3200:} 3191:{ 3185:0 3173:( 3164:( 3152:} 3143:{ 3140:) 3137:0 3125:( 3092:} 3083:{ 3077:} 3068:{ 3065:) 3059:( 3053:{ 3050:) 3041:( 3029:} 3026:; 3020:= 3014:} 3005:{ 3002:) 2999:0 2987:( 2957:} 2951:{ 2948:) 2945:0 2933:( 2903:{ 2900:) 2894:( 2885:} 2882:; 2876:= 2849:} 2840:{ 2837:) 2834:0 2822:( 2816:} 2804:} 2795:{ 2792:) 2789:0 2777:( 2747:{ 2744:) 2738:( 2732:{ 2729:) 2723:( 2711:; 2705:= 2690:( 2672:( 2654:( 2636:( 2618:( 2600:( 2582:( 2567:( 2548:C 2518:n 2513:n 880:( 872:( 858:s 854:p 424:V 401:p 399:R 178:( 94:) 77:) 31:.

Index

I²S
I3C
InterChip USB (IC-USB, HSIC, SSIC)

Serial communication
bus
NXP Semiconductors
Philips Semiconductors
Open-collector
open-drain
Mbit/s
Serial
half-duplex
eye-squared-see
eye-two-see
synchronous
master/slave
single-ended
serial communication
bus
Philips Semiconductors
integrated circuits
microcontrollers
Siemens
NEC
Texas Instruments
STMicroelectronics
Motorola
Nordic Semiconductor
Intersil

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