Knowledge

CAS latency

Source ๐Ÿ“

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modules' CAS latencies are specified in clock ticks instead of time, when comparing latencies at different clock speeds, latencies must be translated into absolute times to make a fair comparison; a higher numerical CAS latency may still be less time if the clock is faster. Likewise, a memory module
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performs two transfers per clock cycle, and it is usually described by this transfer rate. Because the CAS latency is specified in clock cycles, and not transfers (which occur on both the rising and falling edges of the clock), it is important to ensure it is the clock rate (half of the transfer
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size of 64 bytes, requiring eight transfers from a 64-bit-wide (eight bytes) memory to fill. The CAS latency can only accurately measure the time to transfer the first word of memory; the time to transfer all eight words depends on the data transfer rate as well. Fortunately, the processor
190:, each of which composes a separate DRAM array. Each bank contains 2=16384 rows of 2=8192 bits each. One byte of memory (from each chip; 64 bits total from the whole DIMM) is accessed by supplying a 3-bit bank number, a 14-bit row address, and a 13-bit column address. 280:
can occur, resulting in a loss of bandwidth. For a completely unknown memory access (AKA Random access), the relevant latency is the time to close any open row, plus the time to open the desired row, followed by the CAS latency to read data from it. Due to
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When no word line is active, the array is idle and the bit lines are held in a precharged state, with a voltage halfway between high and low. This indeterminate signal is deflected towards high or low by the storage capacitor when a row is made active.
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is determined solely by the clock speed. Unfortunately, this maximum bandwidth can only be attained if the address of the data to be read is known long enough in advance; if the address of the data being accessed is not predictable,
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signal are presented to the memory module and the time at which the corresponding data is made available by the memory module. The desired row must already be active; if it is not, additional time is required.
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Because memory modules have multiple internal banks, and data can be output from one during access latency for another, the output pins can be kept 100% busy regardless of the CAS latency through
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that amplifies the small voltage change produced by the storage capacitor. This amplified signal is then output from the DRAM chip as well as driven back up the bit line to
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With asynchronous DRAM, memory was accessed by a memory controller on the memory bus based on a set timing rather than a clock, and was separate from the system bus.
3476: 111:, the interval is specified in clock cycles. Because the latency is dependent upon a number of clock ticks instead of absolute time, the actual time for an 3608: 3574: 3566: 285:, however, it is common to access several words in the same row. In this case, the CAS latency alone determines the elapsed time. 108: 3544: 3593: 243: 79: 61: 225: 46: 3416:
Command rate = Data rate / 2 for double data rate (DDR), Command rate = Data rate for single data rate (SDR).
3480: 221: 104: 103:, is the delay in clock cycles between the READ command and the moment data is available. In asynchronous 3517: 17: 260:, however, has a CAS latency that is dependent upon the clock rate. Accordingly, the CAS latency of an 156:
To access memory, a row must first be selected and loaded into the sense amplifiers. This row is then
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module to respond to a CAS event might vary between uses of the same module if the clock rate differs.
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Another complicating factor is the use of burst transfers. A modern microprocessor might have a
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AnandTech: Everything You Always Wanted To Know About SDRAM Memory But Were Afraid To Ask
327:—per second (MT/s), while clock rates are given in MHz, million cycles per second. 3579: 297:
could have its CAS latency cycle count reduced to preserve the same CAS latency time.
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Dynamic RAM is arranged in a rectangular array. Each row is selected by a horizontal
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present in that row, connecting each storage capacitor to its corresponding vertical
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User-entered Memory Timing Comparisons and Memory timing examples (CAS latency only)
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In the table below, data rates are given in million transfers—also known as
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order, and the first critical word can be used by the microprocessor immediately.
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typically does not need to wait for all eight words; the burst is usually sent in
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The CAS latency is the delay between the time at which the column address and the
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Time delay between data read command and availability of data in a computer's RAM
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Keeth, Brent; Baker, R. Jacob; Johnson, Brian; Lin, Feng (December 4, 2007).
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of storage space. Each chip is divided internally into eight banks of 2=128
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Synchronous DRAM Architectures, Organizations, and Alternative Technologies
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Memory technology evolution: an overview of system memory technologies
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memory module is specified in clock ticks instead of absolute time.
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rate) which is being used to compute CAS latency times.
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DRAM Circuit Design: Fundamental and High-Speed Topics
3532: 3425:Cycle time = 1 / Command rate = 2 ร— Transfer time. 367: 364: 361: 355: 352: 349: 346: 3617: 193: 178:memory module might contain eight separate one- 160:and columns may be accessed for read or write. 3581:PCSTATS: Memory Bandwidth vs. Latency Timings 3575:DDR4 RAM Actual Timings Full Comparison Grid 3474: 118: 336:Memory timing examples (CAS latency only) 3435: 3433: 3431: 330: 244:Learn how and when to remove this message 80:Learn how and when to remove this message 3596:Tight Timings vs High Clock Frequencies 3512: 3510: 3343: 3340: 3337: 3334: 3258: 3255: 3252: 3249: 3201: 3198: 3195: 3192: 3116: 3113: 3110: 3107: 3031: 3028: 3025: 3022: 2960: 2957: 2954: 2951: 2889: 2886: 2883: 2880: 2839: 2836: 2833: 2830: 2796: 2793: 2790: 2787: 2739: 2736: 2733: 2730: 2668: 2665: 2662: 2659: 2639: 2636: 2633: 2630: 2610: 2607: 2604: 2601: 2539: 2536: 2533: 2530: 2510: 2507: 2504: 2501: 2481: 2478: 2475: 2472: 2382: 2379: 2376: 2373: 2339: 2336: 2333: 2330: 2282: 2279: 2276: 2273: 2239: 2236: 2233: 2230: 2210: 2207: 2204: 2201: 2181: 2178: 2175: 2172: 2124: 2121: 2118: 2115: 2053: 2050: 2047: 2044: 1982: 1979: 1976: 1973: 1897: 1894: 1891: 1888: 1840: 1837: 1834: 1831: 1783: 1780: 1777: 1774: 1726: 1723: 1720: 1717: 1669: 1666: 1663: 1660: 1633: 1630: 1627: 1624: 1604: 1601: 1598: 1595: 1575: 1572: 1569: 1566: 1546: 1543: 1540: 1537: 1517: 1514: 1511: 1508: 1460: 1457: 1454: 1451: 1389: 1386: 1383: 1380: 1360: 1357: 1354: 1351: 1275: 1272: 1269: 1266: 1246: 1243: 1240: 1237: 1147: 1144: 1141: 1138: 1118: 1115: 1112: 1109: 1061: 1058: 1055: 1052: 962: 959: 956: 953: 933: 930: 927: 924: 862: 859: 856: 853: 833: 830: 827: 824: 743: 740: 737: 734: 672: 669: 666: 663: 629: 626: 623: 620: 586: 583: 580: 577: 543: 540: 537: 534: 481: 478: 475: 472: 452: 449: 446: 443: 14: 3618: 3428: 2870: 1650: 816: 526: 3494:Jacob, Bruce L. (December 10, 2002), 3493: 435: 372: 3507: 3475:Stokes, Jon "Hannibal" (1998โ€“2004). 226:adding citations to reliable sources 197: 29: 141:. Each bit line is connected to a 125:DRAM ยง Principles of operation 24: 3487: 25: 3637: 3557: 202: 34: 213:needs additional citations for 3526: 3479:. Ars Technica. Archived from 3468: 3419: 3410: 3407:Transfer time = 1 / Data rate. 3401: 182:DRAM chips, each offering 128 13: 1: 3461: 194:Effect on memory access speed 93:Column address strobe latency 3346: 3317: 3303: 3289: 3275: 3261: 3232: 3218: 3204: 3175: 3161: 3147: 3133: 3119: 3090: 3076: 3062: 3048: 3034: 3005: 2991: 2977: 2963: 2934: 2920: 2906: 2892: 2856: 2842: 2813: 2799: 2770: 2756: 2742: 2713: 2699: 2685: 2671: 2642: 2613: 2584: 2570: 2556: 2542: 2513: 2484: 2455: 2441: 2427: 2413: 2399: 2385: 2356: 2342: 2313: 2299: 2285: 2256: 2242: 2213: 2184: 2155: 2141: 2127: 2098: 2084: 2070: 2056: 2027: 2013: 1999: 1985: 1956: 1942: 1928: 1914: 1900: 1871: 1857: 1843: 1814: 1800: 1786: 1757: 1743: 1729: 1700: 1686: 1672: 1636: 1607: 1578: 1549: 1520: 1491: 1477: 1463: 1434: 1420: 1406: 1392: 1363: 1334: 1320: 1306: 1292: 1278: 1249: 1220: 1206: 1192: 1178: 1164: 1150: 1121: 1092: 1078: 1064: 1035: 1021: 1007: 993: 979: 965: 936: 907: 893: 879: 865: 836: 802: 788: 774: 760: 746: 717: 703: 689: 675: 646: 632: 603: 589: 560: 546: 512: 498: 484: 455: 421: 392: 7: 3449: 3442:th word = ร— Transfer time. 3355: 3352: 3349: 3326: 3323: 3320: 3312: 3309: 3306: 3298: 3295: 3292: 3284: 3281: 3278: 3270: 3267: 3264: 3241: 3238: 3235: 3227: 3224: 3221: 3213: 3210: 3207: 3184: 3181: 3178: 3170: 3167: 3164: 3156: 3153: 3150: 3142: 3139: 3136: 3128: 3125: 3122: 3099: 3096: 3093: 3085: 3082: 3079: 3071: 3068: 3065: 3057: 3054: 3051: 3043: 3040: 3037: 3014: 3011: 3008: 3000: 2997: 2994: 2986: 2983: 2980: 2972: 2969: 2966: 2943: 2940: 2937: 2929: 2926: 2923: 2915: 2912: 2909: 2901: 2898: 2895: 2865: 2862: 2859: 2851: 2848: 2845: 2822: 2819: 2816: 2808: 2805: 2802: 2779: 2776: 2773: 2765: 2762: 2759: 2751: 2748: 2745: 2722: 2719: 2716: 2708: 2705: 2702: 2694: 2691: 2688: 2680: 2677: 2674: 2651: 2648: 2645: 2622: 2619: 2616: 2593: 2590: 2587: 2579: 2576: 2573: 2565: 2562: 2559: 2551: 2548: 2545: 2522: 2519: 2516: 2493: 2490: 2487: 2464: 2461: 2458: 2450: 2447: 2444: 2436: 2433: 2430: 2422: 2419: 2416: 2408: 2405: 2402: 2394: 2391: 2388: 2365: 2362: 2359: 2351: 2348: 2345: 2322: 2319: 2316: 2308: 2305: 2302: 2294: 2291: 2288: 2265: 2262: 2259: 2251: 2248: 2245: 2222: 2219: 2216: 2193: 2190: 2187: 2164: 2161: 2158: 2150: 2147: 2144: 2136: 2133: 2130: 2107: 2104: 2101: 2093: 2090: 2087: 2079: 2076: 2073: 2065: 2062: 2059: 2036: 2033: 2030: 2022: 2019: 2016: 2008: 2005: 2002: 1994: 1991: 1988: 1965: 1962: 1959: 1951: 1948: 1945: 1937: 1934: 1931: 1923: 1920: 1917: 1909: 1906: 1903: 1880: 1877: 1874: 1866: 1863: 1860: 1852: 1849: 1846: 1823: 1820: 1817: 1809: 1806: 1803: 1795: 1792: 1789: 1766: 1763: 1760: 1752: 1749: 1746: 1738: 1735: 1732: 1709: 1706: 1703: 1695: 1692: 1689: 1681: 1678: 1675: 1645: 1642: 1639: 1616: 1613: 1610: 1587: 1584: 1581: 1558: 1555: 1552: 1529: 1526: 1523: 1500: 1497: 1494: 1486: 1483: 1480: 1472: 1469: 1466: 1443: 1440: 1437: 1429: 1426: 1423: 1415: 1412: 1409: 1401: 1398: 1395: 1372: 1369: 1366: 1343: 1340: 1337: 1329: 1326: 1323: 1315: 1312: 1309: 1301: 1298: 1295: 1287: 1284: 1281: 1258: 1255: 1252: 1229: 1226: 1223: 1215: 1212: 1209: 1201: 1198: 1195: 1187: 1184: 1181: 1173: 1170: 1167: 1159: 1156: 1153: 1130: 1127: 1124: 1101: 1098: 1095: 1087: 1084: 1081: 1073: 1070: 1067: 1044: 1041: 1038: 1030: 1027: 1024: 1016: 1013: 1010: 1002: 999: 996: 988: 985: 982: 974: 971: 968: 945: 942: 939: 916: 913: 910: 902: 899: 896: 888: 885: 882: 874: 871: 868: 845: 842: 839: 811: 808: 805: 797: 794: 791: 783: 780: 777: 769: 766: 763: 755: 752: 749: 726: 723: 720: 712: 709: 706: 698: 695: 692: 684: 681: 678: 655: 652: 649: 641: 638: 635: 612: 609: 606: 598: 595: 592: 569: 566: 563: 555: 552: 549: 521: 518: 515: 507: 504: 501: 493: 490: 487: 464: 461: 458: 430: 427: 424: 418: 415: 412: 409: 401: 398: 395: 389: 386: 383: 380: 171:As an example, a typical 1 60:the claims made and adding 10: 3642: 122: 3603:Understanding RAM Timings 3539:. John Wiley & Sons. 3387: 3384: 3381: 3378: 3375: 3372: 3369: 3366: 3363: 3360: 3331: 3246: 3189: 3104: 3019: 2948: 2877: 2827: 2784: 2727: 2656: 2627: 2598: 2527: 2498: 2469: 2370: 2327: 2270: 2227: 2198: 2169: 2112: 2041: 1970: 1885: 1828: 1771: 1714: 1657: 1621: 1592: 1563: 1534: 1505: 1448: 1377: 1348: 1263: 1234: 1135: 1106: 1049: 950: 921: 850: 821: 731: 660: 617: 574: 531: 469: 440: 358: 343: 340: 271:; the maximum attainable 3503:, University of Maryland 3394: 119:RAM operation background 3588:How Memory Access Works 3594:Tom's Hardware Guide: 331:Memory timing examples 165:column address strobe 123:Further information: 222:improve this article 337: 318:critical word first 335: 45:possibly contains 3392: 3391: 254: 253: 246: 90: 89: 82: 47:original research 16:(Redirected from 3633: 3551: 3550: 3530: 3524: 3523: 3514: 3505: 3504: 3502: 3491: 3485: 3484: 3472: 3443: 3437: 3426: 3423: 3417: 3414: 3408: 3405: 338: 334: 301:Double data rate 283:spatial locality 258:Synchronous DRAM 249: 242: 238: 235: 229: 206: 198: 109:synchronous DRAM 85: 78: 74: 71: 65: 62:inline citations 38: 37: 30: 21: 3641: 3640: 3636: 3635: 3634: 3632: 3631: 3630: 3626:Computer memory 3616: 3615: 3560: 3555: 3554: 3547: 3531: 3527: 3522:, HP, July 2008 3516: 3515: 3508: 3500: 3492: 3488: 3473: 3469: 3464: 3452: 3447: 3446: 3438: 3429: 3424: 3420: 3415: 3411: 3406: 3402: 3397: 3335:6600 MT/s 3250:6400 MT/s 3193:6200 MT/s 3108:6000 MT/s 3023:5600 MT/s 2952:5200 MT/s 2881:4800 MT/s 2831:4800 MT/s 2788:4600 MT/s 2731:4400 MT/s 2660:4266 MT/s 2631:4200 MT/s 2602:4133 MT/s 2531:4000 MT/s 2502:3866 MT/s 2473:3733 MT/s 2374:3600 MT/s 2331:3533 MT/s 2274:3466 MT/s 2231:3400 MT/s 2202:3333 MT/s 2173:3300 MT/s 2116:3200 MT/s 2045:3000 MT/s 1974:2800 MT/s 1889:2666 MT/s 1832:2400 MT/s 1775:2133 MT/s 1718:1866 MT/s 1661:1600 MT/s 1625:3300 MT/s 1596:3200 MT/s 1567:3100 MT/s 1538:3000 MT/s 1509:2933 MT/s 1452:2800 MT/s 1381:2666 MT/s 1352:2600 MT/s 1267:2400 MT/s 1238:2200 MT/s 1139:2133 MT/s 1110:2000 MT/s 1053:1866 MT/s 954:1600 MT/s 925:1375 MT/s 854:1333 MT/s 825:1066 MT/s 735:1066 MT/s 333: 288:Because modern 278:pipeline stalls 250: 239: 233: 230: 219: 207: 196: 143:sense amplifier 127: 121: 86: 75: 69: 66: 51: 39: 35: 28: 23: 22: 15: 12: 11: 5: 3639: 3629: 3628: 3614: 3613: 3606: 3599: 3591: 3584: 3577: 3569: 3559: 3558:External links 3556: 3553: 3552: 3546:978-0470184752 3545: 3525: 3506: 3486: 3483:on 2012-11-01. 3466: 3465: 3463: 3460: 3459: 3458: 3456:Memory timings 3451: 3448: 3445: 3444: 3427: 3418: 3409: 3399: 3398: 3396: 3393: 3390: 3389: 3386: 3383: 3380: 3377: 3374: 3371: 3370:Transfer time 3368: 3365: 3362: 3358: 3357: 3356:11.36 ns 3354: 3353:10.76 ns 3351: 3350:10.30 ns 3348: 3345: 3344:0.303 ns 3342: 3341:3300 MHz 3339: 3338:0.152 ns 3336: 3333: 3329: 3328: 3327:11.09 ns 3325: 3324:10.47 ns 3322: 3321:10.00 ns 3319: 3315: 3314: 3313:11.72 ns 3311: 3310:11.09 ns 3308: 3307:10.63 ns 3305: 3301: 3300: 3299:12.34 ns 3297: 3296:11.72 ns 3294: 3293:11.25 ns 3291: 3287: 3286: 3285:12.97 ns 3283: 3282:12.34 ns 3280: 3279:11.88 ns 3277: 3273: 3272: 3271:13.59 ns 3269: 3268:12.97 ns 3266: 3265:12.50 ns 3263: 3260: 3259:0.313 ns 3257: 3256:3200 MHz 3254: 3253:0.156 ns 3251: 3248: 3244: 3243: 3242:12.74 ns 3240: 3239:12.10 ns 3237: 3236:11.61 ns 3234: 3230: 3229: 3228:13.39 ns 3226: 3225:12.74 ns 3223: 3222:12.26 ns 3220: 3216: 3215: 3214:14.03 ns 3212: 3211:13.39 ns 3209: 3208:12.90 ns 3206: 3203: 3202:0.323 ns 3200: 3199:3100 MHz 3197: 3196:0.161 ns 3194: 3191: 3187: 3186: 3185:11.17 ns 3183: 3182:10.50 ns 3180: 3179:10.00 ns 3177: 3173: 3172: 3171:11.83 ns 3169: 3168:11.17 ns 3166: 3165:10.67 ns 3163: 3159: 3158: 3157:13.17 ns 3155: 3154:12.50 ns 3152: 3151:12.00 ns 3149: 3145: 3144: 3143:13.83 ns 3141: 3140:13.17 ns 3138: 3137:12.67 ns 3135: 3131: 3130: 3129:14.50 ns 3127: 3126:13.83 ns 3124: 3123:13.33 ns 3121: 3118: 3117:0.333 ns 3115: 3114:3000 MHz 3112: 3111:0.167 ns 3109: 3106: 3102: 3101: 3100:11.96 ns 3098: 3097:11.25 ns 3095: 3094:10.71 ns 3092: 3088: 3087: 3086:13.39 ns 3084: 3083:12.68 ns 3081: 3080:12.14 ns 3078: 3074: 3073: 3072:14.11 ns 3070: 3069:13.39 ns 3067: 3066:12.86 ns 3064: 3060: 3059: 3058:14.82 ns 3056: 3055:14.11 ns 3053: 3052:13.57 ns 3050: 3046: 3045: 3044:15.54 ns 3042: 3041:14.82 ns 3039: 3038:14.29 ns 3036: 3033: 3032:0.357 ns 3030: 3029:2800 MHz 3027: 3026:0.179 ns 3024: 3021: 3017: 3016: 3015:14.42 ns 3013: 3012:13.65 ns 3010: 3009:13.08 ns 3007: 3003: 3002: 3001:15.19 ns 2999: 2998:14.42 ns 2996: 2995:13.85 ns 2993: 2989: 2988: 2987:15.96 ns 2985: 2984:15.19 ns 2982: 2981:14.62 ns 2979: 2975: 2974: 2973:16.73 ns 2971: 2970:15.96 ns 2968: 2967:15.38 ns 2965: 2962: 2961:0.385 ns 2959: 2958:2600 MHz 2956: 2955:0.192 ns 2953: 2950: 2946: 2945: 2944:15.63 ns 2942: 2941:14.79 ns 2939: 2938:14.17 ns 2936: 2932: 2931: 2930:16.46 ns 2928: 2927:15.63 ns 2925: 2924:15.00 ns 2922: 2918: 2917: 2916:17.29 ns 2914: 2913:16.46 ns 2911: 2910:15.83 ns 2908: 2904: 2903: 2902:18.13 ns 2900: 2899:17.29 ns 2897: 2896:16.67 ns 2894: 2891: 2890:0.417 ns 2888: 2887:2400 MHz 2885: 2884:0.208 ns 2882: 2879: 2875: 2874: 2868: 2867: 2864: 2861: 2858: 2854: 2853: 2850: 2847: 2844: 2841: 2840:0.417 ns 2838: 2837:2400 MHz 2835: 2834:0.208 ns 2832: 2829: 2825: 2824: 2821: 2818: 2815: 2811: 2810: 2807: 2804: 2801: 2798: 2797:0.435 ns 2795: 2794:2300 MHz 2792: 2791:0.217 ns 2789: 2786: 2782: 2781: 2778: 2775: 2772: 2768: 2767: 2764: 2761: 2758: 2754: 2753: 2752:10.23 ns 2750: 2747: 2744: 2741: 2740:0.454 ns 2738: 2737:2200 MHz 2735: 2734:0.227 ns 2732: 2729: 2725: 2724: 2721: 2718: 2715: 2711: 2710: 2707: 2704: 2701: 2697: 2696: 2695:10.08 ns 2693: 2690: 2687: 2683: 2682: 2681:10.55 ns 2679: 2676: 2673: 2670: 2669:0.469 ns 2667: 2666:2133 MHz 2664: 2663:0.234 ns 2661: 2658: 2654: 2653: 2652:10.71 ns 2650: 2647: 2644: 2641: 2640:0.476 ns 2638: 2637:2100 MHz 2635: 2634:0.238 ns 2632: 2629: 2625: 2624: 2623:10.89 ns 2621: 2618: 2615: 2612: 2611:0.484 ns 2609: 2608:2066 MHz 2606: 2605:0.242 ns 2603: 2600: 2596: 2595: 2592: 2589: 2586: 2582: 2581: 2580:10.25 ns 2578: 2575: 2572: 2568: 2567: 2566:10.75 ns 2564: 2561: 2558: 2554: 2553: 2552:11.25 ns 2550: 2549:10.25 ns 2547: 2544: 2541: 2540:0.500 ns 2538: 2537:2000 MHz 2535: 2534:0.250 ns 2532: 2529: 2525: 2524: 2523:11.12 ns 2521: 2520:10.09 ns 2518: 2515: 2512: 2511:0.517 ns 2509: 2508:1933 MHz 2506: 2505:0.259 ns 2503: 2500: 2496: 2495: 2494:10.98 ns 2492: 2489: 2486: 2483: 2482:0.536 ns 2480: 2479:1866 MHz 2477: 2476:0.268 ns 2474: 2471: 2467: 2466: 2463: 2460: 2457: 2453: 2452: 2451:10.28 ns 2449: 2446: 2443: 2439: 2438: 2437:10.83 ns 2435: 2432: 2429: 2425: 2424: 2423:11.39 ns 2421: 2420:10.28 ns 2418: 2415: 2411: 2410: 2409:11.94 ns 2407: 2406:10.83 ns 2404: 2403:10.00 ns 2401: 2397: 2396: 2395:12.50 ns 2393: 2392:11.39 ns 2390: 2389:10.56 ns 2387: 2384: 2383:0.556 ns 2381: 2380:1800 MHz 2378: 2377:0.278 ns 2375: 2372: 2368: 2367: 2366:10.47 ns 2364: 2361: 2358: 2354: 2353: 2352:11.04 ns 2350: 2347: 2344: 2341: 2340:0.566 ns 2338: 2337:1766 MHz 2335: 2334:0.283 ns 2332: 2329: 2325: 2324: 2323:11.25 ns 2321: 2320:10.10 ns 2318: 2315: 2311: 2310: 2309:11.83 ns 2307: 2306:10.67 ns 2304: 2301: 2297: 2296: 2295:12.40 ns 2293: 2292:11.25 ns 2290: 2289:10.38 ns 2287: 2284: 2283:0.577 ns 2281: 2280:1733 MHz 2278: 2277:0.288 ns 2275: 2272: 2268: 2267: 2266:10.29 ns 2264: 2261: 2258: 2254: 2253: 2252:11.47 ns 2250: 2249:10.29 ns 2247: 2244: 2241: 2240:0.588 ns 2238: 2237:1700 MHz 2235: 2234:0.294 ns 2232: 2229: 2225: 2224: 2223:11.70 ns 2221: 2220:10.50 ns 2218: 2215: 2212: 2211:0.600 ns 2209: 2208:1666 MHz 2206: 2205:0.300 ns 2203: 2200: 2196: 2195: 2194:11.82 ns 2192: 2191:10.61 ns 2189: 2186: 2183: 2182:0.606 ns 2180: 2179:1650 MHz 2177: 2176:0.303 ns 2174: 2171: 2167: 2166: 2165:10.94 ns 2163: 2160: 2157: 2153: 2152: 2151:11.56 ns 2149: 2148:10.31 ns 2146: 2143: 2139: 2138: 2137:12.19 ns 2135: 2134:10.94 ns 2132: 2131:10.00 ns 2129: 2126: 2125:0.625 ns 2123: 2122:1600 MHz 2120: 2119:0.313 ns 2117: 2114: 2110: 2109: 2108:11.67 ns 2106: 2105:10.33 ns 2103: 2100: 2096: 2095: 2094:12.33 ns 2092: 2091:11.00 ns 2089: 2088:10.00 ns 2086: 2082: 2081: 2080:13.00 ns 2078: 2077:11.67 ns 2075: 2074:10.67 ns 2072: 2068: 2067: 2066:13.67 ns 2064: 2063:12.33 ns 2061: 2060:11.33 ns 2058: 2055: 2054:0.667 ns 2052: 2051:1500 MHz 2049: 2048:0.333 ns 2046: 2043: 2039: 2038: 2037:12.50 ns 2035: 2034:11.07 ns 2032: 2031:10.00 ns 2029: 2025: 2024: 2023:13.21 ns 2021: 2020:11.79 ns 2018: 2017:10.71 ns 2015: 2011: 2010: 2009:13.93 ns 2007: 2006:12.50 ns 2004: 2003:11.43 ns 2001: 1997: 1996: 1995:14.64 ns 1993: 1992:13.21 ns 1990: 1989:12.14 ns 1987: 1984: 1983:0.714 ns 1981: 1980:1400 MHz 1978: 1977:0.357 ns 1975: 1972: 1968: 1967: 1966:12.38 ns 1964: 1963:10.88 ns 1961: 1958: 1954: 1953: 1952:13.88 ns 1950: 1949:12.38 ns 1947: 1946:11.25 ns 1944: 1940: 1939: 1938:14.63 ns 1936: 1935:13.13 ns 1933: 1932:12.00 ns 1930: 1926: 1925: 1924:15.38 ns 1922: 1921:13.88 ns 1919: 1918:12.75 ns 1916: 1912: 1911: 1910:16.88 ns 1908: 1907:15.38 ns 1905: 1904:14.25 ns 1902: 1899: 1898:0.750 ns 1896: 1895:1333 MHz 1893: 1892:0.375 ns 1890: 1887: 1883: 1882: 1881:15.42 ns 1879: 1878:13.75 ns 1876: 1875:12.50 ns 1873: 1869: 1868: 1867:16.25 ns 1865: 1864:14.58 ns 1862: 1861:13.33 ns 1859: 1855: 1854: 1853:17.08 ns 1851: 1850:15.42 ns 1848: 1847:14.17 ns 1845: 1842: 1841:0.833 ns 1839: 1838:1200 MHz 1836: 1835:0.417 ns 1833: 1830: 1826: 1825: 1824:16.41 ns 1822: 1821:14.53 ns 1819: 1818:13.13 ns 1816: 1812: 1811: 1810:17.34 ns 1808: 1807:15.47 ns 1805: 1804:14.06 ns 1802: 1798: 1797: 1796:18.28 ns 1794: 1793:16.41 ns 1791: 1790:15.00 ns 1788: 1785: 1784:0.938 ns 1782: 1781:1066 MHz 1779: 1778:0.469 ns 1776: 1773: 1769: 1768: 1767:16.61 ns 1765: 1764:14.46 ns 1762: 1761:12.86 ns 1759: 1755: 1754: 1753:17.68 ns 1751: 1750:15.54 ns 1748: 1747:13.93 ns 1745: 1741: 1740: 1739:18.75 ns 1737: 1736:16.61 ns 1734: 1733:15.00 ns 1731: 1728: 1727:1.071 ns 1725: 1722: 1721:0.536 ns 1719: 1716: 1712: 1711: 1710:16.88 ns 1708: 1707:14.38 ns 1705: 1704:12.50 ns 1702: 1698: 1697: 1696:18.13 ns 1694: 1693:15.63 ns 1691: 1690:13.75 ns 1688: 1684: 1683: 1682:19.38 ns 1680: 1679:16.88 ns 1677: 1676:15.00 ns 1674: 1671: 1670:1.250 ns 1668: 1665: 1664:0.625 ns 1662: 1659: 1655: 1654: 1648: 1647: 1646:11.82 ns 1644: 1643:10.61 ns 1641: 1638: 1635: 1634:0.606 ns 1632: 1631:1650 MHz 1629: 1628:0.303 ns 1626: 1623: 1619: 1618: 1617:12.19 ns 1615: 1614:10.94 ns 1612: 1611:10.00 ns 1609: 1606: 1605:0.625 ns 1603: 1602:1600 MHz 1600: 1599:0.313 ns 1597: 1594: 1590: 1589: 1588:10.00 ns 1586: 1583: 1580: 1577: 1576:0.645 ns 1574: 1573:1550 MHz 1571: 1570:0.323 ns 1568: 1565: 1561: 1560: 1559:10.33 ns 1557: 1554: 1551: 1548: 1547:0.667 ns 1545: 1544:1500 MHz 1542: 1541:0.333 ns 1539: 1536: 1532: 1531: 1530:10.57 ns 1528: 1525: 1522: 1519: 1518:0.682 ns 1516: 1515:1466 MHz 1513: 1512:0.341 ns 1510: 1507: 1503: 1502: 1501:10.36 ns 1499: 1496: 1493: 1489: 1488: 1487:11.07 ns 1485: 1482: 1479: 1475: 1474: 1473:13.93 ns 1471: 1470:12.50 ns 1468: 1467:11.43 ns 1465: 1462: 1461:0.714 ns 1459: 1458:1400 MHz 1456: 1455:0.357 ns 1453: 1450: 1446: 1445: 1444:10.88 ns 1442: 1439: 1436: 1432: 1431: 1430:11.63 ns 1428: 1427:10.13 ns 1425: 1422: 1418: 1417: 1416:12.38 ns 1414: 1413:10.88 ns 1411: 1408: 1404: 1403: 1402:13.88 ns 1400: 1399:12.38 ns 1397: 1396:11.25 ns 1394: 1391: 1390:0.750 ns 1388: 1387:1333 MHz 1385: 1384:0.375 ns 1382: 1379: 1375: 1374: 1373:11.15 ns 1371: 1368: 1365: 1362: 1361:0.769 ns 1359: 1358:1300 MHz 1356: 1355:0.385 ns 1353: 1350: 1346: 1345: 1344:10.42 ns 1342: 1339: 1336: 1332: 1331: 1330:11.25 ns 1328: 1325: 1322: 1318: 1317: 1316:12.08 ns 1314: 1313:10.42 ns 1311: 1308: 1304: 1303: 1302:12.92 ns 1300: 1299:11.25 ns 1297: 1296:10.00 ns 1294: 1290: 1289: 1288:13.75 ns 1286: 1285:12.08 ns 1283: 1282:10.83 ns 1280: 1277: 1276:0.833 ns 1274: 1273:1200 MHz 1271: 1270:0.417 ns 1268: 1265: 1261: 1260: 1257: 1254: 1251: 1248: 1247:0.909 ns 1245: 1244:1100 MHz 1242: 1241:0.455 ns 1239: 1236: 1232: 1231: 1228: 1225: 1222: 1218: 1217: 1216:10.78 ns 1214: 1211: 1208: 1204: 1203: 1202:11.72 ns 1200: 1197: 1194: 1190: 1189: 1188:12.66 ns 1186: 1185:10.78 ns 1183: 1180: 1176: 1175: 1174:13.59 ns 1172: 1171:11.72 ns 1169: 1168:10.31 ns 1166: 1162: 1161: 1160:14.53 ns 1158: 1157:12.66 ns 1155: 1154:11.25 ns 1152: 1149: 1148:0.938 ns 1146: 1145:1066 MHz 1143: 1142:0.469 ns 1140: 1137: 1133: 1132: 1131:12.50 ns 1129: 1128:10.50 ns 1126: 1123: 1120: 1119:1.000 ns 1117: 1116:1000 MHz 1114: 1113:0.500 ns 1111: 1108: 1104: 1103: 1102:12.32 ns 1100: 1099:10.18 ns 1097: 1094: 1090: 1089: 1088:13.39 ns 1086: 1085:11.25 ns 1083: 1080: 1076: 1075: 1074:14.46 ns 1072: 1071:12.32 ns 1069: 1068:10.71 ns 1066: 1063: 1062:1.071 ns 1060: 1057: 1056:0.536 ns 1054: 1051: 1047: 1046: 1045:11.88 ns 1043: 1040: 1037: 1033: 1032: 1031:13.13 ns 1029: 1028:10.63 ns 1026: 1023: 1019: 1018: 1017:14.38 ns 1015: 1014:11.88 ns 1012: 1011:10.00 ns 1009: 1005: 1004: 1003:15.63 ns 1001: 1000:13.13 ns 998: 997:11.25 ns 995: 991: 990: 989:16.88 ns 987: 986:14.38 ns 984: 983:12.50 ns 981: 977: 976: 975:18.13 ns 973: 972:15.63 ns 970: 969:13.75 ns 967: 964: 963:1.250 ns 961: 958: 957:0.625 ns 955: 952: 948: 947: 946:12.36 ns 944: 941: 938: 935: 934:1.455 ns 932: 929: 928:0.727 ns 926: 923: 919: 918: 917:14.25 ns 915: 914:11.25 ns 912: 909: 905: 904: 903:15.75 ns 901: 900:12.75 ns 898: 897:10.50 ns 895: 891: 890: 889:17.25 ns 887: 886:14.25 ns 884: 883:12.00 ns 881: 877: 876: 875:18.75 ns 873: 872:15.75 ns 870: 869:13.50 ns 867: 864: 863:1.500 ns 861: 858: 857:0.750 ns 855: 852: 848: 847: 846:19.69 ns 844: 843:15.94 ns 841: 840:13.13 ns 838: 835: 834:1.875 ns 832: 829: 828:0.938 ns 826: 823: 820: 814: 813: 812:14.06 ns 810: 809:10.31 ns 807: 804: 800: 799: 798:15.00 ns 796: 795:11.25 ns 793: 790: 786: 785: 784:15.94 ns 782: 781:12.19 ns 779: 776: 772: 771: 770:17.81 ns 768: 767:14.06 ns 765: 764:11.25 ns 762: 758: 757: 756:19.69 ns 754: 753:15.94 ns 751: 750:13.13 ns 748: 745: 744:1.875 ns 742: 739: 738:0.938 ns 736: 733: 729: 728: 727:18.75 ns 725: 724:13.75 ns 722: 721:10.00 ns 719: 715: 714: 713:20.00 ns 711: 710:15.00 ns 708: 707:11.25 ns 705: 701: 700: 699:21.25 ns 697: 696:16.25 ns 694: 693:12.50 ns 691: 687: 686: 685:23.75 ns 683: 682:18.75 ns 680: 679:15.00 ns 677: 674: 673:2.500 ns 671: 668: 667:1.250 ns 665: 664:800 MT/s 662: 658: 657: 656:22.50 ns 654: 653:16.50 ns 651: 650:12.00 ns 648: 644: 643: 642:25.50 ns 640: 639:19.50 ns 637: 636:15.00 ns 634: 631: 630:3.000 ns 628: 625: 624:1.500 ns 622: 621:667 MT/s 619: 615: 614: 613:24.38 ns 611: 610:16.88 ns 608: 607:11.25 ns 605: 601: 600: 599:28.13 ns 597: 596:20.63 ns 594: 593:15.00 ns 591: 588: 587:3.750 ns 585: 582: 581:1.875 ns 579: 578:533 MT/s 576: 572: 571: 570:32.50 ns 568: 567:22.50 ns 565: 564:15.00 ns 562: 558: 557: 556:37.50 ns 554: 553:27.50 ns 551: 550:20.00 ns 548: 545: 544:5.000 ns 542: 539: 538:2.500 ns 536: 535:400 MT/s 533: 530: 524: 523: 522:27.50 ns 520: 519:17.50 ns 517: 516:10.00 ns 514: 510: 509: 508:30.00 ns 506: 505:20.00 ns 503: 502:12.50 ns 500: 496: 495: 494:32.50 ns 492: 491:22.50 ns 489: 488:15.00 ns 486: 483: 482:5.000 ns 480: 477: 476:2.500 ns 474: 473:400 MT/s 471: 467: 466: 465:36.00 ns 463: 462:24.00 ns 460: 459:15.00 ns 457: 454: 453:6.000 ns 451: 448: 447:3.000 ns 445: 444:333 MT/s 442: 439: 433: 432: 429: 426: 423: 420: 417: 414: 411: 408: 404: 403: 400: 397: 394: 391: 388: 385: 382: 379: 376: 370: 369: 366: 363: 360: 357: 354: 351: 350:Transfer time 348: 345: 342: 332: 329: 252: 251: 234:September 2020 210: 208: 201: 195: 192: 120: 117: 95:, also called 88: 87: 42: 40: 33: 26: 9: 6: 4: 3: 2: 3638: 3627: 3624: 3623: 3621: 3612: 3611: 3607: 3605: 3604: 3600: 3598: 3597: 3592: 3590: 3589: 3585: 3583: 3582: 3578: 3576: 3573: 3572:Google Sheet: 3570: 3568: 3565: 3564:Google Sheet: 3562: 3561: 3548: 3542: 3538: 3537: 3529: 3521: 3520: 3513: 3511: 3499: 3498: 3490: 3482: 3478: 3471: 3467: 3457: 3454: 3453: 3441: 3436: 3434: 3432: 3422: 3413: 3404: 3400: 3373:Command rate 3359: 3330: 3316: 3302: 3288: 3274: 3245: 3231: 3217: 3188: 3174: 3160: 3146: 3132: 3103: 3089: 3075: 3061: 3047: 3018: 3004: 2990: 2976: 2947: 2933: 2919: 2905: 2876: 2873: 2869: 2866:9.38 ns 2863:8.54 ns 2860:7.92 ns 2855: 2852:9.79 ns 2849:8.96 ns 2846:8.33 ns 2826: 2823:9.35 ns 2820:8.48 ns 2817:7.82 ns 2812: 2809:9.78 ns 2806:8.91 ns 2803:8.26 ns 2783: 2780:9.32 ns 2777:8.41 ns 2774:7.73 ns 2769: 2766:9.77 ns 2763:8.86 ns 2760:8.18 ns 2755: 2749:9.32 ns 2746:8.64 ns 2726: 2723:9.14 ns 2720:8.20 ns 2717:7.50 ns 2712: 2709:9.61 ns 2706:8.67 ns 2703:7.97 ns 2698: 2692:9.14 ns 2689:8.44 ns 2684: 2678:9.61 ns 2675:8.91 ns 2655: 2649:9.76 ns 2646:9.05 ns 2626: 2620:9.92 ns 2617:9.19 ns 2597: 2594:9.75 ns 2591:8.75 ns 2588:8.00 ns 2583: 2577:9.25 ns 2574:8.50 ns 2569: 2563:9.75 ns 2560:9.00 ns 2555: 2546:9.50 ns 2526: 2517:9.31 ns 2497: 2491:9.91 ns 2488:9.11 ns 2468: 2465:9.72 ns 2462:8.61 ns 2459:7.78 ns 2454: 2448:9.17 ns 2445:8.33 ns 2440: 2434:9.72 ns 2431:8.89 ns 2426: 2417:9.44 ns 2412: 2398: 2369: 2363:9.34 ns 2360:8.49 ns 2355: 2349:9.91 ns 2346:9.06 ns 2326: 2317:9.23 ns 2312: 2303:9.81 ns 2298: 2269: 2263:9.12 ns 2260:8.24 ns 2255: 2246:9.41 ns 2226: 2217:9.60 ns 2197: 2188:9.70 ns 2168: 2162:9.69 ns 2159:8.75 ns 2154: 2145:9.38 ns 2140: 2111: 2102:9.33 ns 2097: 2083: 2069: 2040: 2026: 2012: 1998: 1969: 1960:9.75 ns 1955: 1941: 1927: 1913: 1884: 1870: 1856: 1827: 1813: 1799: 1770: 1756: 1742: 1724:933 MHz 1713: 1699: 1685: 1667:800 MHz 1656: 1653: 1649: 1640:9.70 ns 1620: 1591: 1585:8.71 ns 1582:7.74 ns 1562: 1556:9.00 ns 1553:8.00 ns 1533: 1527:9.20 ns 1524:8.18 ns 1504: 1498:8.93 ns 1495:7.86 ns 1490: 1484:9.64 ns 1481:8.57 ns 1476: 1447: 1441:9.38 ns 1438:8.25 ns 1433: 1424:9.00 ns 1419: 1410:9.75 ns 1405: 1376: 1370:9.62 ns 1367:8.46 ns 1347: 1341:8.75 ns 1338:7.50 ns 1333: 1327:9.58 ns 1324:8.33 ns 1319: 1310:9.17 ns 1305: 1291: 1262: 1259:9.55 ns 1256:7.73 ns 1253:6.36 ns 1233: 1230:9.84 ns 1227:7.97 ns 1224:6.56 ns 1219: 1213:8.91 ns 1210:7.50 ns 1205: 1199:9.84 ns 1196:8.44 ns 1191: 1182:9.38 ns 1177: 1163: 1134: 1125:9.00 ns 1105: 1096:8.57 ns 1091: 1082:9.64 ns 1077: 1059:933 MHz 1048: 1042:9.38 ns 1039:7.50 ns 1034: 1025:8.75 ns 1020: 1006: 992: 978: 960:800 MHz 949: 943:9.45 ns 940:7.27 ns 931:687 MHz 920: 911:9.00 ns 906: 892: 878: 860:666 MHz 849: 831:533 MHz 819: 815: 806:7.50 ns 801: 792:8.44 ns 787: 778:9.38 ns 773: 759: 741:533 MHz 730: 716: 702: 688: 670:400 MHz 659: 645: 627:333 MHz 616: 602: 584:266 MHz 573: 559: 541:200 MHz 529: 525: 511: 497: 479:200 MHz 468: 450:166 MHz 438: 434: 416:133 MHz 406: 405: 387:100 MHz 377: 375: 371: 353:Command rate 339: 328: 326: 325:megatransfers 321: 319: 314: 309: 306: 302: 298: 296: 291: 286: 284: 279: 274: 270: 265: 263: 259: 248: 245: 237: 227: 223: 217: 216: 211:This section 209: 205: 200: 199: 191: 189: 185: 181: 177: 174: 169: 166: 161: 159: 154: 150: 148: 144: 140: 136: 132: 126: 116: 114: 110: 106: 102: 98: 94: 84: 81: 73: 63: 59: 55: 49: 48: 43:This article 41: 32: 31: 19: 3609: 3602: 3595: 3587: 3580: 3571: 3563: 3535: 3528: 3518: 3496: 3489: 3481:the original 3470: 3439: 3421: 3412: 3403: 3388:Eighth word 3385:Fourth word 3379:CAS latency 368:Eighth word 365:Fourth word 359:CAS latency 322: 317: 310: 299: 295:underclocked 287: 266: 255: 240: 231: 220:Please help 215:verification 212: 170: 164: 162: 157: 155: 151: 146: 142: 138: 130: 128: 100: 96: 92: 91: 76: 67: 44: 3382:First word 3376:Cycle time 3361:Generation 362:First word 356:Cycle time 341:Generation 97:CAS latency 18:CAS Latency 3462:References 3367:Data rate 3332:DDR5-6600 3247:DDR5-6400 3190:DDR5-6200 3105:DDR5-6000 3020:DDR5-5600 2949:DDR5-5200 2878:DDR5-4800 2872:DDR5 SDRAM 2828:DDR4-4800 2785:DDR4-4600 2728:DDR4-4400 2657:DDR4-4266 2628:DDR4-4200 2599:DDR4-4133 2528:DDR4-4000 2499:DDR4-3866 2470:DDR4-3733 2371:DDR4-3600 2328:DDR4-3533 2271:DDR4-3466 2228:DDR4-3400 2199:DDR4-3333 2170:DDR4-3300 2113:DDR4-3200 2042:DDR4-3000 1971:DDR4-2800 1886:DDR4-2666 1829:DDR4-2400 1772:DDR4-2133 1715:DDR4-1866 1658:DDR4-1600 1652:DDR4 SDRAM 1622:DDR3-3300 1593:DDR3-3200 1564:DDR3-3100 1535:DDR3-3000 1506:DDR3-2933 1449:DDR3-2800 1378:DDR3-2666 1349:DDR3-2600 1264:DDR3-2400 1235:DDR3-2200 1136:DDR3-2133 1107:DDR3-2000 1050:DDR3-1866 951:DDR3-1600 922:DDR3-1375 851:DDR3-1333 822:DDR3-1066 818:DDR3 SDRAM 732:DDR2-1066 528:DDR2 SDRAM 390:10.000 ns 384:10.000 ns 347:Data rate 313:cache line 269:pipelining 54:improve it 661:DDR2-800 618:DDR2-667 575:DDR2-533 532:DDR2-400 437:DDR SDRAM 431:75.00 ns 428:45.00 ns 425:22.50 ns 419:7.500 ns 413:7.500 ns 410:133 MT/s 402:90.00 ns 399:50.00 ns 396:20.00 ns 381:100 MT/s 293:which is 273:bandwidth 149:the row. 131:word line 70:July 2019 58:verifying 3620:Category 3450:See also 470:DDR-400 441:DDR-333 139:bit line 180:gibibit 158:active, 147:refresh 135:MOSFETs 52:Please 3543:  407:PC133 378:PC100 303:(DDR) 188:Mibits 3501:(PDF) 3395:Notes 3364:Type 374:SDRAM 344:Type 262:SDRAM 176:SDRAM 113:SDRAM 3541:ISBN 789:4.5 704:4.5 499:2.5 456:2.5 290:DRAM 105:DRAM 3347:34 3318:32 3304:34 3290:36 3276:38 3262:40 3233:36 3219:38 3205:40 3176:30 3162:32 3148:36 3134:38 3120:40 3091:30 3077:34 3063:36 3049:38 3035:40 3006:34 2992:36 2978:38 2964:40 2935:34 2921:36 2907:38 2893:40 2857:19 2843:20 2814:18 2800:19 2771:17 2757:18 2743:19 2714:16 2700:17 2686:18 2672:19 2643:19 2614:19 2585:16 2571:17 2557:18 2543:19 2514:18 2485:17 2456:14 2442:15 2428:16 2414:17 2400:18 2386:19 2357:15 2343:16 2314:16 2300:17 2286:18 2257:14 2243:16 2214:16 2185:16 2156:14 2142:15 2128:16 2099:14 2085:15 2071:16 2057:17 2028:14 2014:15 2000:16 1986:17 1957:13 1943:15 1929:16 1915:17 1901:19 1872:15 1858:16 1844:17 1815:14 1801:15 1787:16 1758:12 1744:13 1730:14 1701:10 1687:11 1673:12 1637:16 1608:16 1579:12 1550:12 1521:12 1492:11 1478:12 1464:16 1435:11 1421:12 1407:13 1393:15 1364:11 1321:10 1307:11 1293:12 1279:13 1179:10 1165:11 1151:12 1065:10 980:10 966:11 305:RAM 224:by 184:MiB 173:GiB 99:or 56:by 3622:: 3509:^ 3430:^ 1335:9 1250:7 1221:7 1207:8 1193:9 1122:9 1093:8 1079:9 1036:6 1022:7 1008:8 994:9 937:5 908:6 894:7 880:8 866:9 837:7 803:4 775:5 761:6 747:7 718:4 690:5 676:6 647:4 633:5 604:3 590:4 561:3 547:4 513:2 485:3 422:3 393:2 101:CL 3549:. 3440:N 247:) 241:( 236:) 232:( 218:. 83:) 77:( 72:) 68:( 50:. 20:)

Index

CAS Latency
original research
improve it
verifying
inline citations
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DRAM
synchronous DRAM
SDRAM
DRAM ยง Principles of operation
MOSFETs
GiB
SDRAM
gibibit
MiB
Mibits

verification
improve this article
adding citations to reliable sources
Learn how and when to remove this message
Synchronous DRAM
SDRAM
pipelining
bandwidth
pipeline stalls
spatial locality
DRAM
underclocked
Double data rate

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